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You searched for subject:( SystemC). Showing records 1 – 30 of 112 total matches.

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NSYSU

1. Huang, Ming-Siang. Acceleration strategies for SystemC kernel.

Degree: Master, Institute Of Computer Science And Engineering, 2018, NSYSU

 Many manufacturers integrate several modules in the chip to enhance production efficiency in response to the increasing consumersâ needs, which elevates the complexity of chips.… (more)

Subjects/Keywords: SystemC; SoC; OSCI

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APA (6th Edition):

Huang, M. (2018). Acceleration strategies for SystemC kernel. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0527118-144248

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Ming-Siang. “Acceleration strategies for SystemC kernel.” 2018. Thesis, NSYSU. Accessed September 25, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0527118-144248.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Ming-Siang. “Acceleration strategies for SystemC kernel.” 2018. Web. 25 Sep 2020.

Vancouver:

Huang M. Acceleration strategies for SystemC kernel. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Sep 25]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0527118-144248.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang M. Acceleration strategies for SystemC kernel. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0527118-144248

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Vanderbilt University

2. Moondra, Arul. Simulation using Transaction Level Modeling : Implementation for ARA Modules.

Degree: MS, Computer Science, 2015, Vanderbilt University

 Embedded systems are usually composed of deeply integrated hardware and software components. Design tools that offer co-simulation of hardware and software are very popular due… (more)

Subjects/Keywords: Abstraction; SystemC; TLM; ARA

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APA (6th Edition):

Moondra, A. (2015). Simulation using Transaction Level Modeling : Implementation for ARA Modules. (Thesis). Vanderbilt University. Retrieved from http://hdl.handle.net/1803/14663

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Moondra, Arul. “Simulation using Transaction Level Modeling : Implementation for ARA Modules.” 2015. Thesis, Vanderbilt University. Accessed September 25, 2020. http://hdl.handle.net/1803/14663.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Moondra, Arul. “Simulation using Transaction Level Modeling : Implementation for ARA Modules.” 2015. Web. 25 Sep 2020.

Vancouver:

Moondra A. Simulation using Transaction Level Modeling : Implementation for ARA Modules. [Internet] [Thesis]. Vanderbilt University; 2015. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/1803/14663.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Moondra A. Simulation using Transaction Level Modeling : Implementation for ARA Modules. [Thesis]. Vanderbilt University; 2015. Available from: http://hdl.handle.net/1803/14663

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Chen, Chi-sheng. On the Design and Implementation of an Efficient OSCI TLM-2.0 Interface for QEMU and SystemC Based Virtual Platform.

Degree: Master, Computer Science and Engineering, 2011, NSYSU

 In order to improve the performance of simulation and the convenience of use with OSCI TLM-2.0 Standard on QEMU and SystemC based virtual platform we… (more)

Subjects/Keywords: QEMU; SystemC; QSC; OSCI TLM-2.0; QEMU-SystemC

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APA (6th Edition):

Chen, C. (2011). On the Design and Implementation of an Efficient OSCI TLM-2.0 Interface for QEMU and SystemC Based Virtual Platform. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-034335

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Chi-sheng. “On the Design and Implementation of an Efficient OSCI TLM-2.0 Interface for QEMU and SystemC Based Virtual Platform.” 2011. Thesis, NSYSU. Accessed September 25, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-034335.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Chi-sheng. “On the Design and Implementation of an Efficient OSCI TLM-2.0 Interface for QEMU and SystemC Based Virtual Platform.” 2011. Web. 25 Sep 2020.

Vancouver:

Chen C. On the Design and Implementation of an Efficient OSCI TLM-2.0 Interface for QEMU and SystemC Based Virtual Platform. [Internet] [Thesis]. NSYSU; 2011. [cited 2020 Sep 25]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-034335.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen C. On the Design and Implementation of an Efficient OSCI TLM-2.0 Interface for QEMU and SystemC Based Virtual Platform. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805111-034335

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade de Brasília

4. Roberto Silva Cantanhede. Suporte a simulação distribuída em SystemC.

Degree: 2007, Universidade de Brasília

The ever increasing evolution of microelectronics allows the integration of more and more complex systems in semiconductor devices. Present day System on Chip (SoC) may… (more)

Subjects/Keywords: SystemC; simulação distribuida; segmentação; CIENCIA DA COMPUTACAO

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APA (6th Edition):

Cantanhede, R. S. (2007). Suporte a simulação distribuída em SystemC. (Thesis). Universidade de Brasília. Retrieved from http://bdtd.bce.unb.br/tedesimplificado/tde_busca/arquivo.php?codArquivo=2974

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cantanhede, Roberto Silva. “Suporte a simulação distribuída em SystemC.” 2007. Thesis, Universidade de Brasília. Accessed September 25, 2020. http://bdtd.bce.unb.br/tedesimplificado/tde_busca/arquivo.php?codArquivo=2974.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cantanhede, Roberto Silva. “Suporte a simulação distribuída em SystemC.” 2007. Web. 25 Sep 2020.

Vancouver:

Cantanhede RS. Suporte a simulação distribuída em SystemC. [Internet] [Thesis]. Universidade de Brasília; 2007. [cited 2020 Sep 25]. Available from: http://bdtd.bce.unb.br/tedesimplificado/tde_busca/arquivo.php?codArquivo=2974.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cantanhede RS. Suporte a simulação distribuída em SystemC. [Thesis]. Universidade de Brasília; 2007. Available from: http://bdtd.bce.unb.br/tedesimplificado/tde_busca/arquivo.php?codArquivo=2974

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

5. Lin, Ching-Yuan. Performance Modeling for a 3D Graphics SoC.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 The design of SoC is growing into more complicated, hence it is necessary to determine an efficient way to develop an SoC. If we can… (more)

Subjects/Keywords: 3D Graphics; Tile-based; analysis; SystemC; TLM

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APA (6th Edition):

Lin, C. (2009). Performance Modeling for a 3D Graphics SoC. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Ching-Yuan. “Performance Modeling for a 3D Graphics SoC.” 2009. Thesis, NSYSU. Accessed September 25, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Ching-Yuan. “Performance Modeling for a 3D Graphics SoC.” 2009. Web. 25 Sep 2020.

Vancouver:

Lin C. Performance Modeling for a 3D Graphics SoC. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Sep 25]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin C. Performance Modeling for a 3D Graphics SoC. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Oklahoma State University

6. Qayum, Mohammad Abdul. Design of a Mips Instruction Set Simulator for Multicore Processor Research in Systemc.

Degree: School of Electrical & Computer Engineering, 2010, Oklahoma State University

 The main focus of this thesis is to design a MIPS Instruction Set Simulator (ISS) for multicore computer architecture research. This MIPS ISS is tested… (more)

Subjects/Keywords: cycle accurate; isa; iss; mips; multicore; systemc`

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APA (6th Edition):

Qayum, M. A. (2010). Design of a Mips Instruction Set Simulator for Multicore Processor Research in Systemc. (Thesis). Oklahoma State University. Retrieved from http://hdl.handle.net/11244/10263

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Qayum, Mohammad Abdul. “Design of a Mips Instruction Set Simulator for Multicore Processor Research in Systemc.” 2010. Thesis, Oklahoma State University. Accessed September 25, 2020. http://hdl.handle.net/11244/10263.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Qayum, Mohammad Abdul. “Design of a Mips Instruction Set Simulator for Multicore Processor Research in Systemc.” 2010. Web. 25 Sep 2020.

Vancouver:

Qayum MA. Design of a Mips Instruction Set Simulator for Multicore Processor Research in Systemc. [Internet] [Thesis]. Oklahoma State University; 2010. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/11244/10263.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Qayum MA. Design of a Mips Instruction Set Simulator for Multicore Processor Research in Systemc. [Thesis]. Oklahoma State University; 2010. Available from: http://hdl.handle.net/11244/10263

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universitat Autònoma de Barcelona

7. Montón i Macián, Màrius. Checkpointing for virtual platforms and systemC-TLM-2.0.

Degree: Departament de Microelectrònica i Sistemes Electrònics, 2010, Universitat Autònoma de Barcelona

 One advantage of using a virtual platform or virtual prototype over real hardware for embedded software development and testing is the ability of some simulators… (more)

Subjects/Keywords: Virtual platforms; SystemC; TLM; Simulation; Tecnologies; 004

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APA (6th Edition):

Montón i Macián, M. (2010). Checkpointing for virtual platforms and systemC-TLM-2.0. (Thesis). Universitat Autònoma de Barcelona. Retrieved from http://hdl.handle.net/10803/32099

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Montón i Macián, Màrius. “Checkpointing for virtual platforms and systemC-TLM-2.0.” 2010. Thesis, Universitat Autònoma de Barcelona. Accessed September 25, 2020. http://hdl.handle.net/10803/32099.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Montón i Macián, Màrius. “Checkpointing for virtual platforms and systemC-TLM-2.0.” 2010. Web. 25 Sep 2020.

Vancouver:

Montón i Macián M. Checkpointing for virtual platforms and systemC-TLM-2.0. [Internet] [Thesis]. Universitat Autònoma de Barcelona; 2010. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/10803/32099.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Montón i Macián M. Checkpointing for virtual platforms and systemC-TLM-2.0. [Thesis]. Universitat Autònoma de Barcelona; 2010. Available from: http://hdl.handle.net/10803/32099

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Queens University

8. Ma, Nicholas. Modeling and evaluation of multi-core multithreading processor architectures in SystemC .

Degree: Electrical and Computer Engineering, 2007, Queens University

 Processor design has evolved over the years to take advantage of new technology and innovative concepts in order to improve performance. Diminishing returns for improvements… (more)

Subjects/Keywords: SystemC ; CMT ; Processors

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APA (6th Edition):

Ma, N. (2007). Modeling and evaluation of multi-core multithreading processor architectures in SystemC . (Thesis). Queens University. Retrieved from http://hdl.handle.net/1974/510

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ma, Nicholas. “Modeling and evaluation of multi-core multithreading processor architectures in SystemC .” 2007. Thesis, Queens University. Accessed September 25, 2020. http://hdl.handle.net/1974/510.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ma, Nicholas. “Modeling and evaluation of multi-core multithreading processor architectures in SystemC .” 2007. Web. 25 Sep 2020.

Vancouver:

Ma N. Modeling and evaluation of multi-core multithreading processor architectures in SystemC . [Internet] [Thesis]. Queens University; 2007. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/1974/510.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ma N. Modeling and evaluation of multi-core multithreading processor architectures in SystemC . [Thesis]. Queens University; 2007. Available from: http://hdl.handle.net/1974/510

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Université de Grenoble

9. Belhadj Amor, Zeineb. Validation de systèmes sur puce complexes du niveau transactionnel au niveau transfert de registres : Validation of complex systems on a chip, from TLM level to RTL.

Degree: Docteur es, Micro et nanoélectronique, 2014, Université de Grenoble

Cette thèse se situe dans le contexte de la vérification fonctionnelle des circuits intégrés complexes. L’objectif de ce travail est de créer un flot de… (more)

Subjects/Keywords: ABV; Vérification; Raffinement; SystemC; TLM; RTL; PSL; ABV; Vérification; Refinement; SystemC; TLM; RTL; PSL; 620

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APA (6th Edition):

Belhadj Amor, Z. (2014). Validation de systèmes sur puce complexes du niveau transactionnel au niveau transfert de registres : Validation of complex systems on a chip, from TLM level to RTL. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2014GRENT083

Chicago Manual of Style (16th Edition):

Belhadj Amor, Zeineb. “Validation de systèmes sur puce complexes du niveau transactionnel au niveau transfert de registres : Validation of complex systems on a chip, from TLM level to RTL.” 2014. Doctoral Dissertation, Université de Grenoble. Accessed September 25, 2020. http://www.theses.fr/2014GRENT083.

MLA Handbook (7th Edition):

Belhadj Amor, Zeineb. “Validation de systèmes sur puce complexes du niveau transactionnel au niveau transfert de registres : Validation of complex systems on a chip, from TLM level to RTL.” 2014. Web. 25 Sep 2020.

Vancouver:

Belhadj Amor Z. Validation de systèmes sur puce complexes du niveau transactionnel au niveau transfert de registres : Validation of complex systems on a chip, from TLM level to RTL. [Internet] [Doctoral dissertation]. Université de Grenoble; 2014. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2014GRENT083.

Council of Science Editors:

Belhadj Amor Z. Validation de systèmes sur puce complexes du niveau transactionnel au niveau transfert de registres : Validation of complex systems on a chip, from TLM level to RTL. [Doctoral Dissertation]. Université de Grenoble; 2014. Available from: http://www.theses.fr/2014GRENT083

10. Delbergue, Guillaume. Advances in SystemC/TLM virtual platforms : configuration, communication and parallelism : Contribution à l'amélioration des plateformes virtuelles SystemC/TLM : configuration, communication et parallélisme.

Degree: Docteur es, Électronique, 2017, Bordeaux

 Le marché de l’Internet des Objets (IdO) est en pleine progression. Il va continuer à croître et à se développer à un rythme soutenu dans… (more)

Subjects/Keywords: SystemC; TLM; Plateforme Virtuelle; Configuration; Communication; Parallélisme; SystemC; TLM; Virtual Platform; Configuration; Communication; Parallelism

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APA (6th Edition):

Delbergue, G. (2017). Advances in SystemC/TLM virtual platforms : configuration, communication and parallelism : Contribution à l'amélioration des plateformes virtuelles SystemC/TLM : configuration, communication et parallélisme. (Doctoral Dissertation). Bordeaux. Retrieved from http://www.theses.fr/2017BORD0916

Chicago Manual of Style (16th Edition):

Delbergue, Guillaume. “Advances in SystemC/TLM virtual platforms : configuration, communication and parallelism : Contribution à l'amélioration des plateformes virtuelles SystemC/TLM : configuration, communication et parallélisme.” 2017. Doctoral Dissertation, Bordeaux. Accessed September 25, 2020. http://www.theses.fr/2017BORD0916.

MLA Handbook (7th Edition):

Delbergue, Guillaume. “Advances in SystemC/TLM virtual platforms : configuration, communication and parallelism : Contribution à l'amélioration des plateformes virtuelles SystemC/TLM : configuration, communication et parallélisme.” 2017. Web. 25 Sep 2020.

Vancouver:

Delbergue G. Advances in SystemC/TLM virtual platforms : configuration, communication and parallelism : Contribution à l'amélioration des plateformes virtuelles SystemC/TLM : configuration, communication et parallélisme. [Internet] [Doctoral dissertation]. Bordeaux; 2017. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2017BORD0916.

Council of Science Editors:

Delbergue G. Advances in SystemC/TLM virtual platforms : configuration, communication and parallelism : Contribution à l'amélioration des plateformes virtuelles SystemC/TLM : configuration, communication et parallélisme. [Doctoral Dissertation]. Bordeaux; 2017. Available from: http://www.theses.fr/2017BORD0916

11. Li, Fangyan. Simulation multi-moteurs multi-niveaux pour la validation des spécifications système et optimisation de la consommation : Multi-engine multi-level simulation for system specification validation and power consumption optimization.

Degree: Docteur es, Électronique, 2016, Nice

Ce travail vise la modélisation au niveau système, en langage SystemC-AMS, et la simulation d'un émetteur-récepteur au standard Bluetooth Low Energy (BLE). L'objectif est d'analyser… (more)

Subjects/Keywords: Simulation; Système embarqué; SystemC; SystemC-TLM; SystemC-AMS; BT; BLE; Modélisation RF; Taux d'erreur par bit; Simulation; Networked embedded system; SystemC; SystemC-TLM; SystemC-AMS; BT; BLE; RF system modelling; Bit error rate

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, F. (2016). Simulation multi-moteurs multi-niveaux pour la validation des spécifications système et optimisation de la consommation : Multi-engine multi-level simulation for system specification validation and power consumption optimization. (Doctoral Dissertation). Nice. Retrieved from http://www.theses.fr/2016NICE4008

Chicago Manual of Style (16th Edition):

Li, Fangyan. “Simulation multi-moteurs multi-niveaux pour la validation des spécifications système et optimisation de la consommation : Multi-engine multi-level simulation for system specification validation and power consumption optimization.” 2016. Doctoral Dissertation, Nice. Accessed September 25, 2020. http://www.theses.fr/2016NICE4008.

MLA Handbook (7th Edition):

Li, Fangyan. “Simulation multi-moteurs multi-niveaux pour la validation des spécifications système et optimisation de la consommation : Multi-engine multi-level simulation for system specification validation and power consumption optimization.” 2016. Web. 25 Sep 2020.

Vancouver:

Li F. Simulation multi-moteurs multi-niveaux pour la validation des spécifications système et optimisation de la consommation : Multi-engine multi-level simulation for system specification validation and power consumption optimization. [Internet] [Doctoral dissertation]. Nice; 2016. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2016NICE4008.

Council of Science Editors:

Li F. Simulation multi-moteurs multi-niveaux pour la validation des spécifications système et optimisation de la consommation : Multi-engine multi-level simulation for system specification validation and power consumption optimization. [Doctoral Dissertation]. Nice; 2016. Available from: http://www.theses.fr/2016NICE4008

12. Haulisson Jody Batista da Costa. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro.

Degree: 2009, Universidade Federal do Rio Grande do Norte

Este trabalho apresenta resultados de simulação de uma plataforma de identificação compatível com o Sistema de Coleta de Dados Brasileiro do INPE, modelado com SystemC-AMS.… (more)

Subjects/Keywords: Modelagem em SystemC-AMS; Coleta de dados; Especificação de sistemas; Modeling in SystemC-AMS; Data collection; System specification; ENGENHARIA ELETRICA

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APA (6th Edition):

Costa, H. J. B. d. (2009). Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro. (Thesis). Universidade Federal do Rio Grande do Norte. Retrieved from http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=3042

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Costa, Haulisson Jody Batista da. “Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro.” 2009. Thesis, Universidade Federal do Rio Grande do Norte. Accessed September 25, 2020. http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=3042.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Costa, Haulisson Jody Batista da. “Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro.” 2009. Web. 25 Sep 2020.

Vancouver:

Costa HJBd. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro. [Internet] [Thesis]. Universidade Federal do Rio Grande do Norte; 2009. [cited 2020 Sep 25]. Available from: http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=3042.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Costa HJBd. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro. [Thesis]. Universidade Federal do Rio Grande do Norte; 2009. Available from: http://bdtd.bczm.ufrn.br/tedesimplificado//tde_busca/arquivo.php?codArquivo=3042

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

13. Muñoz Quispe, Joel Iván. Ferramenta CAD para extração de modelo de cobertura de saída por itens em verificação funcional.

Degree: Mestrado, Microeletrônica, 2011, University of São Paulo

 Nos ambientes de desenvolvimento de sistemas integrados da atualidade, os requisitos dos sistemas devidos ao alto grau de funcionalidades incorporadas vêm-se incrementando, gerando uma alta… (more)

Subjects/Keywords: CAD for verification; CAD para verificação; Cobertura; Coverage; Functional verification; Microelectronics; Microeletrônica; SystemC; SystemC; Verificação funcional

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Muñoz Quispe, J. I. (2011). Ferramenta CAD para extração de modelo de cobertura de saída por itens em verificação funcional. (Masters Thesis). University of São Paulo. Retrieved from http://www.teses.usp.br/teses/disponiveis/3/3140/tde-15032012-120402/ ;

Chicago Manual of Style (16th Edition):

Muñoz Quispe, Joel Iván. “Ferramenta CAD para extração de modelo de cobertura de saída por itens em verificação funcional.” 2011. Masters Thesis, University of São Paulo. Accessed September 25, 2020. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-15032012-120402/ ;.

MLA Handbook (7th Edition):

Muñoz Quispe, Joel Iván. “Ferramenta CAD para extração de modelo de cobertura de saída por itens em verificação funcional.” 2011. Web. 25 Sep 2020.

Vancouver:

Muñoz Quispe JI. Ferramenta CAD para extração de modelo de cobertura de saída por itens em verificação funcional. [Internet] [Masters thesis]. University of São Paulo; 2011. [cited 2020 Sep 25]. Available from: http://www.teses.usp.br/teses/disponiveis/3/3140/tde-15032012-120402/ ;.

Council of Science Editors:

Muñoz Quispe JI. Ferramenta CAD para extração de modelo de cobertura de saída por itens em verificação funcional. [Masters Thesis]. University of São Paulo; 2011. Available from: http://www.teses.usp.br/teses/disponiveis/3/3140/tde-15032012-120402/ ;


Universidade do Rio Grande do Norte

14. Costa, Haulisson Jody Batista da. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro .

Degree: 2009, Universidade do Rio Grande do Norte

 This work presents simulation results of an identification platform compatible with the INPE Brazilian Data Collection System, modeled with SystemC-AMS. SystemC-AMS that is a library… (more)

Subjects/Keywords: Modelagem em SystemC-AMS; Coleta de dados; Especificação de sistemas; Modeling in SystemC-AMS; Data collection; System specification

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Costa, H. J. B. d. (2009). Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro . (Masters Thesis). Universidade do Rio Grande do Norte. Retrieved from http://repositorio.ufrn.br/handle/123456789/15295

Chicago Manual of Style (16th Edition):

Costa, Haulisson Jody Batista da. “Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro .” 2009. Masters Thesis, Universidade do Rio Grande do Norte. Accessed September 25, 2020. http://repositorio.ufrn.br/handle/123456789/15295.

MLA Handbook (7th Edition):

Costa, Haulisson Jody Batista da. “Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro .” 2009. Web. 25 Sep 2020.

Vancouver:

Costa HJBd. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro . [Internet] [Masters thesis]. Universidade do Rio Grande do Norte; 2009. [cited 2020 Sep 25]. Available from: http://repositorio.ufrn.br/handle/123456789/15295.

Council of Science Editors:

Costa HJBd. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro . [Masters Thesis]. Universidade do Rio Grande do Norte; 2009. Available from: http://repositorio.ufrn.br/handle/123456789/15295


Universidade do Rio Grande do Norte

15. Costa, Haulisson Jody Batista da. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro .

Degree: 2009, Universidade do Rio Grande do Norte

 This work presents simulation results of an identification platform compatible with the INPE Brazilian Data Collection System, modeled with SystemC-AMS. SystemC-AMS that is a library… (more)

Subjects/Keywords: Modelagem em SystemC-AMS; Coleta de dados; Especificação de sistemas; Modeling in SystemC-AMS; Data collection; System specification

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Costa, H. J. B. d. (2009). Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro . (Thesis). Universidade do Rio Grande do Norte. Retrieved from http://repositorio.ufrn.br/handle/123456789/15295

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Costa, Haulisson Jody Batista da. “Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro .” 2009. Thesis, Universidade do Rio Grande do Norte. Accessed September 25, 2020. http://repositorio.ufrn.br/handle/123456789/15295.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Costa, Haulisson Jody Batista da. “Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro .” 2009. Web. 25 Sep 2020.

Vancouver:

Costa HJBd. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro . [Internet] [Thesis]. Universidade do Rio Grande do Norte; 2009. [cited 2020 Sep 25]. Available from: http://repositorio.ufrn.br/handle/123456789/15295.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Costa HJBd. Modelagem em SystemC-AMS de uma plataforma compatível com o sistema de coleta de dados brasileiro . [Thesis]. Universidade do Rio Grande do Norte; 2009. Available from: http://repositorio.ufrn.br/handle/123456789/15295

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Brno University of Technology

16. Ondruš, Tomáš. Transformace popisu procesoru v jazyce CodAL do struktur SystemC: Transformation of a Processor Description in CodAL to SystemC Structures.

Degree: 2019, Brno University of Technology

 The goal of this thesis is to create a generator of simulators and hardware representation of application specific processors in a SystemC language. An aim… (more)

Subjects/Keywords: SystemC; Codasip; CodAL; TLM; generátor; procesor; ASIP; transakčné systémy; SystemC; Codasip; CodAL; TLM; generator; processor; ASIP; transaction oriented systems

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ondruš, T. (2019). Transformace popisu procesoru v jazyce CodAL do struktur SystemC: Transformation of a Processor Description in CodAL to SystemC Structures. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/64146

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ondruš, Tomáš. “Transformace popisu procesoru v jazyce CodAL do struktur SystemC: Transformation of a Processor Description in CodAL to SystemC Structures.” 2019. Thesis, Brno University of Technology. Accessed September 25, 2020. http://hdl.handle.net/11012/64146.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ondruš, Tomáš. “Transformace popisu procesoru v jazyce CodAL do struktur SystemC: Transformation of a Processor Description in CodAL to SystemC Structures.” 2019. Web. 25 Sep 2020.

Vancouver:

Ondruš T. Transformace popisu procesoru v jazyce CodAL do struktur SystemC: Transformation of a Processor Description in CodAL to SystemC Structures. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/11012/64146.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ondruš T. Transformace popisu procesoru v jazyce CodAL do struktur SystemC: Transformation of a Processor Description in CodAL to SystemC Structures. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/64146

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

17. Chaves Café, Daniel. Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique.

Degree: Docteur es, Informatique (STIC), 2015, Supélec

À l'ère de systèmes électroniques intégrés, les ingénieurs font face au défi de concevoir et de tester des systèmes hétérogènes contenant des parties analogiques, numériques,… (more)

Subjects/Keywords: Modélisation hétérogène; SysML; SystemC-AMS; VHDL-AMS; Adaptation sémantique; Heterogeneous modeling; SysML; SystemC-AMS; VHDL-AMS; Semantic adaptation; 378.242

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chaves Café, D. (2015). Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique. (Doctoral Dissertation). Supélec. Retrieved from http://www.theses.fr/2015SUPL0019

Chicago Manual of Style (16th Edition):

Chaves Café, Daniel. “Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique.” 2015. Doctoral Dissertation, Supélec. Accessed September 25, 2020. http://www.theses.fr/2015SUPL0019.

MLA Handbook (7th Edition):

Chaves Café, Daniel. “Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique.” 2015. Web. 25 Sep 2020.

Vancouver:

Chaves Café D. Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique. [Internet] [Doctoral dissertation]. Supélec; 2015. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2015SUPL0019.

Council of Science Editors:

Chaves Café D. Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique. [Doctoral Dissertation]. Supélec; 2015. Available from: http://www.theses.fr/2015SUPL0019

18. Huck, Emmanuel. Simulation de haut niveau de systèmes d'exploitations distribués pour l'exploration matérielle et logicielle d'architectures multi-noeuds hétérogènes : High level simulation of distributed operating system for hardware and software exploration of heterogeneous multi-nodes architectures.

Degree: Docteur es, STIC (sciences et technologies de l'information et de la communication), 2011, Cergy-Pontoise

Concevoir un système embarqué implique de trouver un compromis algorithme/architecture en fonction des contraintes temps-réel. Thèse : pour un MPSoC et plus particulièrement avec les… (more)

Subjects/Keywords: Modélisation TLM; Rtos; Co-simulation; MPSoC; Reconfigurable; SystemC; TLM Modelisation; Rtos; Co-simulation; MPSoC; Reconfigurable; SystemC

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huck, E. (2011). Simulation de haut niveau de systèmes d'exploitations distribués pour l'exploration matérielle et logicielle d'architectures multi-noeuds hétérogènes : High level simulation of distributed operating system for hardware and software exploration of heterogeneous multi-nodes architectures. (Doctoral Dissertation). Cergy-Pontoise. Retrieved from http://www.theses.fr/2011CERG0557

Chicago Manual of Style (16th Edition):

Huck, Emmanuel. “Simulation de haut niveau de systèmes d'exploitations distribués pour l'exploration matérielle et logicielle d'architectures multi-noeuds hétérogènes : High level simulation of distributed operating system for hardware and software exploration of heterogeneous multi-nodes architectures.” 2011. Doctoral Dissertation, Cergy-Pontoise. Accessed September 25, 2020. http://www.theses.fr/2011CERG0557.

MLA Handbook (7th Edition):

Huck, Emmanuel. “Simulation de haut niveau de systèmes d'exploitations distribués pour l'exploration matérielle et logicielle d'architectures multi-noeuds hétérogènes : High level simulation of distributed operating system for hardware and software exploration of heterogeneous multi-nodes architectures.” 2011. Web. 25 Sep 2020.

Vancouver:

Huck E. Simulation de haut niveau de systèmes d'exploitations distribués pour l'exploration matérielle et logicielle d'architectures multi-noeuds hétérogènes : High level simulation of distributed operating system for hardware and software exploration of heterogeneous multi-nodes architectures. [Internet] [Doctoral dissertation]. Cergy-Pontoise; 2011. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2011CERG0557.

Council of Science Editors:

Huck E. Simulation de haut niveau de systèmes d'exploitations distribués pour l'exploration matérielle et logicielle d'architectures multi-noeuds hétérogènes : High level simulation of distributed operating system for hardware and software exploration of heterogeneous multi-nodes architectures. [Doctoral Dissertation]. Cergy-Pontoise; 2011. Available from: http://www.theses.fr/2011CERG0557

19. Nguyen, Tuan-Anh. Conception d'une plate-forme de prototypage virtuel de réseaux d'interconnexion : Designing a virtual prototyping framework of interconnection networks.

Degree: Docteur es, Signal, Image, Automatique, 2014, Université Paris-Est

Les systèmes HPC ("High-Performance Computing") sont des systèmes conçus avec des centaines de milliers de nœuds de calcul interconnectés entre eux par un réseau de… (more)

Subjects/Keywords: Prototypage virtuel; Performance; Réseaux d'interconnexion; Simulation parallèle; Multi-SystemC; Virtual prototyping; Performance; Interconnection networks; Parallel simulation; Multi-SystemC

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Nguyen, T. (2014). Conception d'une plate-forme de prototypage virtuel de réseaux d'interconnexion : Designing a virtual prototyping framework of interconnection networks. (Doctoral Dissertation). Université Paris-Est. Retrieved from http://www.theses.fr/2014PEST1095

Chicago Manual of Style (16th Edition):

Nguyen, Tuan-Anh. “Conception d'une plate-forme de prototypage virtuel de réseaux d'interconnexion : Designing a virtual prototyping framework of interconnection networks.” 2014. Doctoral Dissertation, Université Paris-Est. Accessed September 25, 2020. http://www.theses.fr/2014PEST1095.

MLA Handbook (7th Edition):

Nguyen, Tuan-Anh. “Conception d'une plate-forme de prototypage virtuel de réseaux d'interconnexion : Designing a virtual prototyping framework of interconnection networks.” 2014. Web. 25 Sep 2020.

Vancouver:

Nguyen T. Conception d'une plate-forme de prototypage virtuel de réseaux d'interconnexion : Designing a virtual prototyping framework of interconnection networks. [Internet] [Doctoral dissertation]. Université Paris-Est; 2014. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2014PEST1095.

Council of Science Editors:

Nguyen T. Conception d'une plate-forme de prototypage virtuel de réseaux d'interconnexion : Designing a virtual prototyping framework of interconnection networks. [Doctoral Dissertation]. Université Paris-Est; 2014. Available from: http://www.theses.fr/2014PEST1095

20. Chaves Café, Daniel. Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique.

Degree: Docteur es, Informatique (STIC), 2015, CentraleSupélec

À l'ère de systèmes électroniques intégrés, les ingénieurs font face au défi de concevoir et de tester des systèmes hétérogènes contenant des parties analogiques, numériques,… (more)

Subjects/Keywords: Modélisation hétérogène; SysML; SystemC-AMS; VHDL-AMS; Adaptation sémantique; Heterogeneous modeling; SysML; SystemC-AMS; VHDL-AMS; Semantic adaptation; 378.242

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chaves Café, D. (2015). Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique. (Doctoral Dissertation). CentraleSupélec. Retrieved from http://www.theses.fr/2015CSUP0019

Chicago Manual of Style (16th Edition):

Chaves Café, Daniel. “Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique.” 2015. Doctoral Dissertation, CentraleSupélec. Accessed September 25, 2020. http://www.theses.fr/2015CSUP0019.

MLA Handbook (7th Edition):

Chaves Café, Daniel. “Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique.” 2015. Web. 25 Sep 2020.

Vancouver:

Chaves Café D. Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique. [Internet] [Doctoral dissertation]. CentraleSupélec; 2015. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2015CSUP0019.

Council of Science Editors:

Chaves Café D. Multi-level modeling for verification and synthesis of complex systems in a multi-physics context. : Modélisation Multi-Paradigme pour la Synthèse et la Validation de Systèmes Complexes en Environnement Multi-Physique. [Doctoral Dissertation]. CentraleSupélec; 2015. Available from: http://www.theses.fr/2015CSUP0019

21. Vernay, Benoît. Modélisation et simulation haut-niveau de micro-systèmes électromécaniques pour le prototypage virtuel multi-physique en SystemC-AMS : System-level modeling and simulation of microelectromechanical systems for multi-physics virtual prototyping in SystemC-AMS.

Degree: Docteur es, Informatique, 2016, Université Pierre et Marie Curie – Paris VI

L'évolution des systèmes embarqués se traduit aujourd'hui par des ensembles complexes, dits systèmes cyber-physiques, opérant principalement en réseau et interagissant fortement avec leur environnement.Intégrés à… (more)

Subjects/Keywords: Micro-systèmes; MEMS; Prototypage virtuel; Simulation haut-niveau; SystemC; SystemC-AMS; MEMS; Microsystems; Virtual prototyping; 005.18

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Vernay, B. (2016). Modélisation et simulation haut-niveau de micro-systèmes électromécaniques pour le prototypage virtuel multi-physique en SystemC-AMS : System-level modeling and simulation of microelectromechanical systems for multi-physics virtual prototyping in SystemC-AMS. (Doctoral Dissertation). Université Pierre et Marie Curie – Paris VI. Retrieved from http://www.theses.fr/2016PA066171

Chicago Manual of Style (16th Edition):

Vernay, Benoît. “Modélisation et simulation haut-niveau de micro-systèmes électromécaniques pour le prototypage virtuel multi-physique en SystemC-AMS : System-level modeling and simulation of microelectromechanical systems for multi-physics virtual prototyping in SystemC-AMS.” 2016. Doctoral Dissertation, Université Pierre et Marie Curie – Paris VI. Accessed September 25, 2020. http://www.theses.fr/2016PA066171.

MLA Handbook (7th Edition):

Vernay, Benoît. “Modélisation et simulation haut-niveau de micro-systèmes électromécaniques pour le prototypage virtuel multi-physique en SystemC-AMS : System-level modeling and simulation of microelectromechanical systems for multi-physics virtual prototyping in SystemC-AMS.” 2016. Web. 25 Sep 2020.

Vancouver:

Vernay B. Modélisation et simulation haut-niveau de micro-systèmes électromécaniques pour le prototypage virtuel multi-physique en SystemC-AMS : System-level modeling and simulation of microelectromechanical systems for multi-physics virtual prototyping in SystemC-AMS. [Internet] [Doctoral dissertation]. Université Pierre et Marie Curie – Paris VI; 2016. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2016PA066171.

Council of Science Editors:

Vernay B. Modélisation et simulation haut-niveau de micro-systèmes électromécaniques pour le prototypage virtuel multi-physique en SystemC-AMS : System-level modeling and simulation of microelectromechanical systems for multi-physics virtual prototyping in SystemC-AMS. [Doctoral Dissertation]. Université Pierre et Marie Curie – Paris VI; 2016. Available from: http://www.theses.fr/2016PA066171


Université de Grenoble

22. Ferro, Luca. Vérification de propriétés logico-temporelles de spécifications SystemC TLM : Verification of temporal properties for SystemC TLM specifications.

Degree: Docteur es, Sciences et technologie industrielles, 2011, Université de Grenoble

Au-delà de la formidable évolution en termes de complexité du circuit électronique en soi, son adoption et sa diffusion ont connu, au fil des dernières… (more)

Subjects/Keywords: SystemC; TLM; Vérification; ABV; Assertion-Based Verification; Méthodes formelles; SystemC; TLM; Verification; ABV; Assertion-Based Verification; Formal Methods

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ferro, L. (2011). Vérification de propriétés logico-temporelles de spécifications SystemC TLM : Verification of temporal properties for SystemC TLM specifications. (Doctoral Dissertation). Université de Grenoble. Retrieved from http://www.theses.fr/2011GRENT032

Chicago Manual of Style (16th Edition):

Ferro, Luca. “Vérification de propriétés logico-temporelles de spécifications SystemC TLM : Verification of temporal properties for SystemC TLM specifications.” 2011. Doctoral Dissertation, Université de Grenoble. Accessed September 25, 2020. http://www.theses.fr/2011GRENT032.

MLA Handbook (7th Edition):

Ferro, Luca. “Vérification de propriétés logico-temporelles de spécifications SystemC TLM : Verification of temporal properties for SystemC TLM specifications.” 2011. Web. 25 Sep 2020.

Vancouver:

Ferro L. Vérification de propriétés logico-temporelles de spécifications SystemC TLM : Verification of temporal properties for SystemC TLM specifications. [Internet] [Doctoral dissertation]. Université de Grenoble; 2011. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2011GRENT032.

Council of Science Editors:

Ferro L. Vérification de propriétés logico-temporelles de spécifications SystemC TLM : Verification of temporal properties for SystemC TLM specifications. [Doctoral Dissertation]. Université de Grenoble; 2011. Available from: http://www.theses.fr/2011GRENT032

23. Becker, Denis. Simulation Parallèle en SystemC/TLM de Composants Matériels décrits pour la Synthèse de Haut-Niveau : Parallel SystemC/TLM Simulation of Hardware Components described for High-Level Synthesis.

Degree: Docteur es, Informatique, 2017, Université Grenoble Alpes (ComUE)

 Les systèmes sur puce sont constitués d'une partie matérielle (un circuit intégré) et d'une partie logicielle (un programme) qui utilise les ressources matérielles de la… (more)

Subjects/Keywords: Simulation; SystemC/TLM; Parallélisme; Synthèse de Haut-Niveau; Matériel; Simulation; SystemC/TLM; Parallelism; High-Level Synthesis; Hardware; 004

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Becker, D. (2017). Simulation Parallèle en SystemC/TLM de Composants Matériels décrits pour la Synthèse de Haut-Niveau : Parallel SystemC/TLM Simulation of Hardware Components described for High-Level Synthesis. (Doctoral Dissertation). Université Grenoble Alpes (ComUE). Retrieved from http://www.theses.fr/2017GREAM082

Chicago Manual of Style (16th Edition):

Becker, Denis. “Simulation Parallèle en SystemC/TLM de Composants Matériels décrits pour la Synthèse de Haut-Niveau : Parallel SystemC/TLM Simulation of Hardware Components described for High-Level Synthesis.” 2017. Doctoral Dissertation, Université Grenoble Alpes (ComUE). Accessed September 25, 2020. http://www.theses.fr/2017GREAM082.

MLA Handbook (7th Edition):

Becker, Denis. “Simulation Parallèle en SystemC/TLM de Composants Matériels décrits pour la Synthèse de Haut-Niveau : Parallel SystemC/TLM Simulation of Hardware Components described for High-Level Synthesis.” 2017. Web. 25 Sep 2020.

Vancouver:

Becker D. Simulation Parallèle en SystemC/TLM de Composants Matériels décrits pour la Synthèse de Haut-Niveau : Parallel SystemC/TLM Simulation of Hardware Components described for High-Level Synthesis. [Internet] [Doctoral dissertation]. Université Grenoble Alpes (ComUE); 2017. [cited 2020 Sep 25]. Available from: http://www.theses.fr/2017GREAM082.

Council of Science Editors:

Becker D. Simulation Parallèle en SystemC/TLM de Composants Matériels décrits pour la Synthèse de Haut-Niveau : Parallel SystemC/TLM Simulation of Hardware Components described for High-Level Synthesis. [Doctoral Dissertation]. Université Grenoble Alpes (ComUE); 2017. Available from: http://www.theses.fr/2017GREAM082


Delft University of Technology

24. Karunanithi, V. (author). A Framework for Designing and Testing the Digital Signal Processing unit of a Pulsar Based Navigation System.

Degree: 2012, Delft University of Technology

Navigation systems using pulsar signals have been of great interest ever since the discovery of pulsars in 1967 and various studies were carried out ever… (more)

Subjects/Keywords: Pulsar Navigation; Dispersion; Inter Stellar Medium (ISM); Fast Fourier Transform; Polyphase Filter Bank; SystemC; SystemC-AMS

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Karunanithi, V. (. (2012). A Framework for Designing and Testing the Digital Signal Processing unit of a Pulsar Based Navigation System. (Masters Thesis). Delft University of Technology. Retrieved from http://resolver.tudelft.nl/uuid:19b96d86-b170-4153-a5f2-a70a131fc98c

Chicago Manual of Style (16th Edition):

Karunanithi, V (author). “A Framework for Designing and Testing the Digital Signal Processing unit of a Pulsar Based Navigation System.” 2012. Masters Thesis, Delft University of Technology. Accessed September 25, 2020. http://resolver.tudelft.nl/uuid:19b96d86-b170-4153-a5f2-a70a131fc98c.

MLA Handbook (7th Edition):

Karunanithi, V (author). “A Framework for Designing and Testing the Digital Signal Processing unit of a Pulsar Based Navigation System.” 2012. Web. 25 Sep 2020.

Vancouver:

Karunanithi V(. A Framework for Designing and Testing the Digital Signal Processing unit of a Pulsar Based Navigation System. [Internet] [Masters thesis]. Delft University of Technology; 2012. [cited 2020 Sep 25]. Available from: http://resolver.tudelft.nl/uuid:19b96d86-b170-4153-a5f2-a70a131fc98c.

Council of Science Editors:

Karunanithi V(. A Framework for Designing and Testing the Digital Signal Processing unit of a Pulsar Based Navigation System. [Masters Thesis]. Delft University of Technology; 2012. Available from: http://resolver.tudelft.nl/uuid:19b96d86-b170-4153-a5f2-a70a131fc98c


Brno University of Technology

25. Sýkora, Michal. Implementace modulární aritmetiky do obvodů FPGA a ASIC: Implementation of modular arithmetic in FPGAs and ASICs.

Degree: 2019, Brno University of Technology

 This thesis is focused on analysis, design and implementation of modular arithmetic in FPGAs and ASICs. Its main objective is to create a C++/SystemC library,… (more)

Subjects/Keywords: ASIC; FPGA; Modulárna aritmetika; Modulárne násobenie; Montgomeryho redukcia; SystemC; ASIC; FPGA; Modular arithmetic; Modular multiplication; Montgomery reduction; SystemC

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sýkora, M. (2019). Implementace modulární aritmetiky do obvodů FPGA a ASIC: Implementation of modular arithmetic in FPGAs and ASICs. (Thesis). Brno University of Technology. Retrieved from http://hdl.handle.net/11012/41548

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sýkora, Michal. “Implementace modulární aritmetiky do obvodů FPGA a ASIC: Implementation of modular arithmetic in FPGAs and ASICs.” 2019. Thesis, Brno University of Technology. Accessed September 25, 2020. http://hdl.handle.net/11012/41548.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sýkora, Michal. “Implementace modulární aritmetiky do obvodů FPGA a ASIC: Implementation of modular arithmetic in FPGAs and ASICs.” 2019. Web. 25 Sep 2020.

Vancouver:

Sýkora M. Implementace modulární aritmetiky do obvodů FPGA a ASIC: Implementation of modular arithmetic in FPGAs and ASICs. [Internet] [Thesis]. Brno University of Technology; 2019. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/11012/41548.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sýkora M. Implementace modulární aritmetiky do obvodů FPGA a ASIC: Implementation of modular arithmetic in FPGAs and ASICs. [Thesis]. Brno University of Technology; 2019. Available from: http://hdl.handle.net/11012/41548

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Norte

26. Queiroz, Eridenes Fernandes de. Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow .

Degree: 2015, Universidade do Rio Grande do Norte

 This work aims at modeling power consumption at the nodes of a Wireless Sensor Network (WSN). For doing so, a finite state machine was implemented… (more)

Subjects/Keywords: Medição elétrica; Consumo de energia; IEEE 802.15.4; SystemC-AMS; Stateflow

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Queiroz, E. F. d. (2015). Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow . (Thesis). Universidade do Rio Grande do Norte. Retrieved from http://repositorio.ufrn.br/handle/123456789/20159

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Queiroz, Eridenes Fernandes de. “Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow .” 2015. Thesis, Universidade do Rio Grande do Norte. Accessed September 25, 2020. http://repositorio.ufrn.br/handle/123456789/20159.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Queiroz, Eridenes Fernandes de. “Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow .” 2015. Web. 25 Sep 2020.

Vancouver:

Queiroz EFd. Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow . [Internet] [Thesis]. Universidade do Rio Grande do Norte; 2015. [cited 2020 Sep 25]. Available from: http://repositorio.ufrn.br/handle/123456789/20159.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Queiroz EFd. Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow . [Thesis]. Universidade do Rio Grande do Norte; 2015. Available from: http://repositorio.ufrn.br/handle/123456789/20159

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Universidade do Rio Grande do Norte

27. Queiroz, Eridenes Fernandes de. Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow .

Degree: 2015, Universidade do Rio Grande do Norte

 This work aims at modeling power consumption at the nodes of a Wireless Sensor Network (WSN). For doing so, a finite state machine was implemented… (more)

Subjects/Keywords: Medição elétrica; Consumo de energia; IEEE 802.15.4; SystemC-AMS; Stateflow

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Queiroz, E. F. d. (2015). Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow . (Masters Thesis). Universidade do Rio Grande do Norte. Retrieved from http://repositorio.ufrn.br/handle/123456789/20159

Chicago Manual of Style (16th Edition):

Queiroz, Eridenes Fernandes de. “Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow .” 2015. Masters Thesis, Universidade do Rio Grande do Norte. Accessed September 25, 2020. http://repositorio.ufrn.br/handle/123456789/20159.

MLA Handbook (7th Edition):

Queiroz, Eridenes Fernandes de. “Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow .” 2015. Web. 25 Sep 2020.

Vancouver:

Queiroz EFd. Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow . [Internet] [Masters thesis]. Universidade do Rio Grande do Norte; 2015. [cited 2020 Sep 25]. Available from: http://repositorio.ufrn.br/handle/123456789/20159.

Council of Science Editors:

Queiroz EFd. Modelagem do consumo de energia de redes de sensores sem fio usando SystemC-AMS e stateflow . [Masters Thesis]. Universidade do Rio Grande do Norte; 2015. Available from: http://repositorio.ufrn.br/handle/123456789/20159

28. Τραχάνης, Δημήτριος. Δημιουργία ενός SystemC TLM μοντέλου του CAN controller.

Degree: 2011, University of Patras

Η ραγδαία αύξηση της πολυπλοκότητας των συστημάτων σε ολοκληρωμένα κυκλώματα (System-on-Chip, SoC), η πίεση του χρόνου για την είσοδό τους στην αγορά, καθώς και το… (more)

Subjects/Keywords: Μοντέλο συστήματος; Ελεγκτής CAN; 621.395; System model; CAN controller; SystemC TLM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Τραχάνης, . (2011). Δημιουργία ενός SystemC TLM μοντέλου του CAN controller. (Masters Thesis). University of Patras. Retrieved from http://hdl.handle.net/10889/5374

Chicago Manual of Style (16th Edition):

Τραχάνης, Δημήτριος. “Δημιουργία ενός SystemC TLM μοντέλου του CAN controller.” 2011. Masters Thesis, University of Patras. Accessed September 25, 2020. http://hdl.handle.net/10889/5374.

MLA Handbook (7th Edition):

Τραχάνης, Δημήτριος. “Δημιουργία ενός SystemC TLM μοντέλου του CAN controller.” 2011. Web. 25 Sep 2020.

Vancouver:

Τραχάνης . Δημιουργία ενός SystemC TLM μοντέλου του CAN controller. [Internet] [Masters thesis]. University of Patras; 2011. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/10889/5374.

Council of Science Editors:

Τραχάνης . Δημιουργία ενός SystemC TLM μοντέλου του CAN controller. [Masters Thesis]. University of Patras; 2011. Available from: http://hdl.handle.net/10889/5374

29. Gangrade, Rohit. GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation.

Degree: MS, Computer Engineering, 2016, Texas A&M University

 With increasing number of cores on a chip, the complexity of modeling hardware using virtual prototype is increasing rapidly. Typical SOCs today have multipro-cessors connected… (more)

Subjects/Keywords: MPSOC; SystemC; GPU; NOC

…Synthetic Benchmarks for GPU . . . 7.3.1 Memory Optimization . . . . Typical SystemC Benchmarks… …single core, multicore and GPU host . . 10 3.1 Architecture of SystemC language… …15 3.2 SystemC execution kernel . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3… …SystemC execution flow . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4 SystemC… …Schematic of MIPS based microprocessor designed in SystemC . . . . 42 4.3 Working of simulator… 

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gangrade, R. (2016). GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/156987

Chicago Manual of Style (16th Edition):

Gangrade, Rohit. “GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation.” 2016. Masters Thesis, Texas A&M University. Accessed September 25, 2020. http://hdl.handle.net/1969.1/156987.

MLA Handbook (7th Edition):

Gangrade, Rohit. “GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation.” 2016. Web. 25 Sep 2020.

Vancouver:

Gangrade R. GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation. [Internet] [Masters thesis]. Texas A&M University; 2016. [cited 2020 Sep 25]. Available from: http://hdl.handle.net/1969.1/156987.

Council of Science Editors:

Gangrade R. GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation. [Masters Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/156987


NSYSU

30. Yang, Ming-Shiun. Performance Analysis for Multiprocessor Target Platform in QEMU-SystemC.

Degree: Master, Computer Science and Engineering, 2017, NSYSU

 With the development of embedded systems, there are more and more functions in the system and the chip speed increasingly faster and faster. Multiprocessor architecture… (more)

Subjects/Keywords: SystemC; QEMU; SW/HW Co-Verification; Performance Analysis; Multiprocessor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yang, M. (2017). Performance Analysis for Multiprocessor Target Platform in QEMU-SystemC. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811117-123237

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Ming-Shiun. “Performance Analysis for Multiprocessor Target Platform in QEMU-SystemC.” 2017. Thesis, NSYSU. Accessed September 25, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811117-123237.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Ming-Shiun. “Performance Analysis for Multiprocessor Target Platform in QEMU-SystemC.” 2017. Web. 25 Sep 2020.

Vancouver:

Yang M. Performance Analysis for Multiprocessor Target Platform in QEMU-SystemC. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Sep 25]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811117-123237.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang M. Performance Analysis for Multiprocessor Target Platform in QEMU-SystemC. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811117-123237

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

[1] [2] [3] [4]

.