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Degree: MSEE

You searched for subject:( Suffix tree algorithm). Showing records 1 – 11 of 11 total matches.

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Louisiana State University

1. Venkat Rao, Dinesh Prasad. Designing switches for routing in circuit-switched trees.

Degree: MSEE, Electrical and Computer Engineering, 2005, Louisiana State University

 Reconfigurable computing provides a fast and flexible solution for intensive computing processes. Thus, it acts as a bridge between software controlled and hardware based processors.… (more)

Subjects/Keywords: reconfigurable switches; circuit-switched tree; configuration algorithm; reconfigurable computing

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APA (6th Edition):

Venkat Rao, D. P. (2005). Designing switches for routing in circuit-switched trees. (Masters Thesis). Louisiana State University. Retrieved from etd-01232006-212520 ; https://digitalcommons.lsu.edu/gradschool_theses/1927

Chicago Manual of Style (16th Edition):

Venkat Rao, Dinesh Prasad. “Designing switches for routing in circuit-switched trees.” 2005. Masters Thesis, Louisiana State University. Accessed October 18, 2019. etd-01232006-212520 ; https://digitalcommons.lsu.edu/gradschool_theses/1927.

MLA Handbook (7th Edition):

Venkat Rao, Dinesh Prasad. “Designing switches for routing in circuit-switched trees.” 2005. Web. 18 Oct 2019.

Vancouver:

Venkat Rao DP. Designing switches for routing in circuit-switched trees. [Internet] [Masters thesis]. Louisiana State University; 2005. [cited 2019 Oct 18]. Available from: etd-01232006-212520 ; https://digitalcommons.lsu.edu/gradschool_theses/1927.

Council of Science Editors:

Venkat Rao DP. Designing switches for routing in circuit-switched trees. [Masters Thesis]. Louisiana State University; 2005. Available from: etd-01232006-212520 ; https://digitalcommons.lsu.edu/gradschool_theses/1927


Louisiana State University

2. Ayyala, Isaac Abhilash. A Distributed Diffusion-Driven Algorithm for Load Balancing in an Electrical Power Grid.

Degree: MSEE, Electrical and Computer Engineering, 2015, Louisiana State University

 In this thesis we propose a distributed algorithm, based on diffusion, to balance loads on an electrical power grid, while maintaining stable operation (system’s ability… (more)

Subjects/Keywords: distributed; grid; power; algorithm

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APA (6th Edition):

Ayyala, I. A. (2015). A Distributed Diffusion-Driven Algorithm for Load Balancing in an Electrical Power Grid. (Masters Thesis). Louisiana State University. Retrieved from etd-04062015-140508 ; https://digitalcommons.lsu.edu/gradschool_theses/1688

Chicago Manual of Style (16th Edition):

Ayyala, Isaac Abhilash. “A Distributed Diffusion-Driven Algorithm for Load Balancing in an Electrical Power Grid.” 2015. Masters Thesis, Louisiana State University. Accessed October 18, 2019. etd-04062015-140508 ; https://digitalcommons.lsu.edu/gradschool_theses/1688.

MLA Handbook (7th Edition):

Ayyala, Isaac Abhilash. “A Distributed Diffusion-Driven Algorithm for Load Balancing in an Electrical Power Grid.” 2015. Web. 18 Oct 2019.

Vancouver:

Ayyala IA. A Distributed Diffusion-Driven Algorithm for Load Balancing in an Electrical Power Grid. [Internet] [Masters thesis]. Louisiana State University; 2015. [cited 2019 Oct 18]. Available from: etd-04062015-140508 ; https://digitalcommons.lsu.edu/gradschool_theses/1688.

Council of Science Editors:

Ayyala IA. A Distributed Diffusion-Driven Algorithm for Load Balancing in an Electrical Power Grid. [Masters Thesis]. Louisiana State University; 2015. Available from: etd-04062015-140508 ; https://digitalcommons.lsu.edu/gradschool_theses/1688


Wright State University

3. Allwin, Priscilla Sharon. A Low-Area, Energy-Efficient 64-Bit Reconfigurable Carry Select Modified Tree-Based Adder for Media Signal Processing.

Degree: MSEE, Electrical Engineering, 2019, Wright State University

 Multimedia systems play an essential part in our daily lives and have drastically improvedthe quality of life over time. Multimedia devices like cellphones, radios, televisions,and… (more)

Subjects/Keywords: Electrical Engineering; Data Path; Media Signal Processing; Reconfigurable Adders; Carry Select Modified Tree Adder

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APA (6th Edition):

Allwin, P. S. (2019). A Low-Area, Energy-Efficient 64-Bit Reconfigurable Carry Select Modified Tree-Based Adder for Media Signal Processing. (Masters Thesis). Wright State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=wright1566754181334305

Chicago Manual of Style (16th Edition):

Allwin, Priscilla Sharon. “A Low-Area, Energy-Efficient 64-Bit Reconfigurable Carry Select Modified Tree-Based Adder for Media Signal Processing.” 2019. Masters Thesis, Wright State University. Accessed October 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1566754181334305.

MLA Handbook (7th Edition):

Allwin, Priscilla Sharon. “A Low-Area, Energy-Efficient 64-Bit Reconfigurable Carry Select Modified Tree-Based Adder for Media Signal Processing.” 2019. Web. 18 Oct 2019.

Vancouver:

Allwin PS. A Low-Area, Energy-Efficient 64-Bit Reconfigurable Carry Select Modified Tree-Based Adder for Media Signal Processing. [Internet] [Masters thesis]. Wright State University; 2019. [cited 2019 Oct 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1566754181334305.

Council of Science Editors:

Allwin PS. A Low-Area, Energy-Efficient 64-Bit Reconfigurable Carry Select Modified Tree-Based Adder for Media Signal Processing. [Masters Thesis]. Wright State University; 2019. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1566754181334305


Wright State University

4. Perumalla, Anvesh Kumar. A Genetic Algorithm for ASIC Floorplanning.

Degree: MSEE, Electrical Engineering, 2016, Wright State University

 Semiconductor integrated circuits (ICs) have become key components in almost everyaspect of our daily lives. From simple home appliances to extremely sophisticatedaerospace systems, we have… (more)

Subjects/Keywords: Electrical Engineering; ASIC; Floorplan; Genetic Algorithm; Simulated Evolution; SoC

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APA (6th Edition):

Perumalla, A. K. (2016). A Genetic Algorithm for ASIC Floorplanning. (Masters Thesis). Wright State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=wright1484236480221006

Chicago Manual of Style (16th Edition):

Perumalla, Anvesh Kumar. “A Genetic Algorithm for ASIC Floorplanning.” 2016. Masters Thesis, Wright State University. Accessed October 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1484236480221006.

MLA Handbook (7th Edition):

Perumalla, Anvesh Kumar. “A Genetic Algorithm for ASIC Floorplanning.” 2016. Web. 18 Oct 2019.

Vancouver:

Perumalla AK. A Genetic Algorithm for ASIC Floorplanning. [Internet] [Masters thesis]. Wright State University; 2016. [cited 2019 Oct 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1484236480221006.

Council of Science Editors:

Perumalla AK. A Genetic Algorithm for ASIC Floorplanning. [Masters Thesis]. Wright State University; 2016. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1484236480221006


Wright State University

5. Chen, Pingxiuqi. FPGA realization of low register systolic all one-polynomial multipliers over GF (2m) and their applications in trinomial multipliers.

Degree: MSEE, Electrical Engineering, 2016, Wright State University

 All-one-polynomial (AOP)-based systolic multipliers over GF (2m) are usually not con-sidered for practical implementation of cryptosystems such as elliptic curve cryptography (ECC) due to security… (more)

Subjects/Keywords: Electrical Engineering; Finite field multiplication, systolic structure, low complexity, Montgomery algorithm, irreducible trinomials

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APA (6th Edition):

Chen, P. (2016). FPGA realization of low register systolic all one-polynomial multipliers over GF (2m) and their applications in trinomial multipliers. (Masters Thesis). Wright State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=wright1465352514

Chicago Manual of Style (16th Edition):

Chen, Pingxiuqi. “FPGA realization of low register systolic all one-polynomial multipliers over GF (2m) and their applications in trinomial multipliers.” 2016. Masters Thesis, Wright State University. Accessed October 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1465352514.

MLA Handbook (7th Edition):

Chen, Pingxiuqi. “FPGA realization of low register systolic all one-polynomial multipliers over GF (2m) and their applications in trinomial multipliers.” 2016. Web. 18 Oct 2019.

Vancouver:

Chen P. FPGA realization of low register systolic all one-polynomial multipliers over GF (2m) and their applications in trinomial multipliers. [Internet] [Masters thesis]. Wright State University; 2016. [cited 2019 Oct 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1465352514.

Council of Science Editors:

Chen P. FPGA realization of low register systolic all one-polynomial multipliers over GF (2m) and their applications in trinomial multipliers. [Masters Thesis]. Wright State University; 2016. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1465352514


Louisiana State University

6. Wang, Boyu. Power System Differential Model with Application to Grid Dynamic Simulation.

Degree: MSEE, Electrical and Computer Engineering, 2014, Louisiana State University

  Nonlinearity of power system is always one of the difficulties when dealing with dynamic simulation of power systems. Solving differential-algebraic equations representing power systems… (more)

Subjects/Keywords: two-axis model; classical generator model; trapezoidal; differential-algebraic equation; Runge-Kutta algorithm

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APA (6th Edition):

Wang, B. (2014). Power System Differential Model with Application to Grid Dynamic Simulation. (Masters Thesis). Louisiana State University. Retrieved from etd-07112014-131822 ; https://digitalcommons.lsu.edu/gradschool_theses/540

Chicago Manual of Style (16th Edition):

Wang, Boyu. “Power System Differential Model with Application to Grid Dynamic Simulation.” 2014. Masters Thesis, Louisiana State University. Accessed October 18, 2019. etd-07112014-131822 ; https://digitalcommons.lsu.edu/gradschool_theses/540.

MLA Handbook (7th Edition):

Wang, Boyu. “Power System Differential Model with Application to Grid Dynamic Simulation.” 2014. Web. 18 Oct 2019.

Vancouver:

Wang B. Power System Differential Model with Application to Grid Dynamic Simulation. [Internet] [Masters thesis]. Louisiana State University; 2014. [cited 2019 Oct 18]. Available from: etd-07112014-131822 ; https://digitalcommons.lsu.edu/gradschool_theses/540.

Council of Science Editors:

Wang B. Power System Differential Model with Application to Grid Dynamic Simulation. [Masters Thesis]. Louisiana State University; 2014. Available from: etd-07112014-131822 ; https://digitalcommons.lsu.edu/gradschool_theses/540


Louisiana State University

7. Aniker, Pooja S. Traffic engineering and path protection in MPLS virtual private networks.

Degree: MSEE, Electrical and Computer Engineering, 2005, Louisiana State University

  Traffic Engineering (TE) attempts to establish paths for the flow of data in a network so as to optimize the resource utilization and maximize… (more)

Subjects/Keywords: qos; offline constraint based routing algorithm; constraint based routing

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APA (6th Edition):

Aniker, P. S. (2005). Traffic engineering and path protection in MPLS virtual private networks. (Masters Thesis). Louisiana State University. Retrieved from etd-04122005-160920 ; https://digitalcommons.lsu.edu/gradschool_theses/657

Chicago Manual of Style (16th Edition):

Aniker, Pooja S. “Traffic engineering and path protection in MPLS virtual private networks.” 2005. Masters Thesis, Louisiana State University. Accessed October 18, 2019. etd-04122005-160920 ; https://digitalcommons.lsu.edu/gradschool_theses/657.

MLA Handbook (7th Edition):

Aniker, Pooja S. “Traffic engineering and path protection in MPLS virtual private networks.” 2005. Web. 18 Oct 2019.

Vancouver:

Aniker PS. Traffic engineering and path protection in MPLS virtual private networks. [Internet] [Masters thesis]. Louisiana State University; 2005. [cited 2019 Oct 18]. Available from: etd-04122005-160920 ; https://digitalcommons.lsu.edu/gradschool_theses/657.

Council of Science Editors:

Aniker PS. Traffic engineering and path protection in MPLS virtual private networks. [Masters Thesis]. Louisiana State University; 2005. Available from: etd-04122005-160920 ; https://digitalcommons.lsu.edu/gradschool_theses/657


Louisiana State University

8. Rashid, Mohammed. Multitarget Joint Delay and Doppler Shift Estimation in Bistatic Passive Radar.

Degree: MSEE, Signal Processing, 2018, Louisiana State University

  Bistatic passive radar (BPR) system does not transmit any electromagnetic signal unlike the active radar, but employs an existing Illuminator of opportunity (IO) in… (more)

Subjects/Keywords: stochastic IO signal; passive radar; multiple target localization; EM algorithm; delays and Doppler shifts estimation; optimization

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APA (6th Edition):

Rashid, M. (2018). Multitarget Joint Delay and Doppler Shift Estimation in Bistatic Passive Radar. (Masters Thesis). Louisiana State University. Retrieved from https://digitalcommons.lsu.edu/gradschool_theses/4678

Chicago Manual of Style (16th Edition):

Rashid, Mohammed. “Multitarget Joint Delay and Doppler Shift Estimation in Bistatic Passive Radar.” 2018. Masters Thesis, Louisiana State University. Accessed October 18, 2019. https://digitalcommons.lsu.edu/gradschool_theses/4678.

MLA Handbook (7th Edition):

Rashid, Mohammed. “Multitarget Joint Delay and Doppler Shift Estimation in Bistatic Passive Radar.” 2018. Web. 18 Oct 2019.

Vancouver:

Rashid M. Multitarget Joint Delay and Doppler Shift Estimation in Bistatic Passive Radar. [Internet] [Masters thesis]. Louisiana State University; 2018. [cited 2019 Oct 18]. Available from: https://digitalcommons.lsu.edu/gradschool_theses/4678.

Council of Science Editors:

Rashid M. Multitarget Joint Delay and Doppler Shift Estimation in Bistatic Passive Radar. [Masters Thesis]. Louisiana State University; 2018. Available from: https://digitalcommons.lsu.edu/gradschool_theses/4678


Wright State University

9. Nagrale, Sumedh Sopan. Two Player Zero Sum Multi-Stage Game Analysis Using Coevolutionary Algorithm.

Degree: MSEE, Electrical Engineering, 2019, Wright State University

 A New Two player zero sum multistage simultaneous Game has been developed from a real-life situation of dispute between two individual. Research identifies a multistage… (more)

Subjects/Keywords: Electrical Engineering; Coevolutionary Algorithm; Parameters; Game Theory; Multistage Game; computation speed; population size; Mutation rate; Crossover rate; Parameters relations equation

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APA (6th Edition):

Nagrale, S. S. (2019). Two Player Zero Sum Multi-Stage Game Analysis Using Coevolutionary Algorithm. (Masters Thesis). Wright State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=wright1557144260873961

Chicago Manual of Style (16th Edition):

Nagrale, Sumedh Sopan. “Two Player Zero Sum Multi-Stage Game Analysis Using Coevolutionary Algorithm.” 2019. Masters Thesis, Wright State University. Accessed October 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1557144260873961.

MLA Handbook (7th Edition):

Nagrale, Sumedh Sopan. “Two Player Zero Sum Multi-Stage Game Analysis Using Coevolutionary Algorithm.” 2019. Web. 18 Oct 2019.

Vancouver:

Nagrale SS. Two Player Zero Sum Multi-Stage Game Analysis Using Coevolutionary Algorithm. [Internet] [Masters thesis]. Wright State University; 2019. [cited 2019 Oct 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1557144260873961.

Council of Science Editors:

Nagrale SS. Two Player Zero Sum Multi-Stage Game Analysis Using Coevolutionary Algorithm. [Masters Thesis]. Wright State University; 2019. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1557144260873961

10. Mao, Davin. Bistatic SAR Polar Format Image Formation: Distortion Correction and Scene Size Limits.

Degree: MSEE, Electrical Engineering, 2017, Wright State University

 The polar format algorithm (PFA) for bistatic synthetic aperture radar (SAR) image formation offers the compromise between image quality and computational complexity afforded by PFA,… (more)

Subjects/Keywords: Electrical Engineering; Remote Sensing; bistatic radar, synthetic aperture radar, polar format algorithm, distortion, defocus, scene size limits

…computationally permissible SAR algorithms. The backprojection algorithm (BPA) [5, 6]… …amenable to GPU implementation [10]. The polar format algorithm (PFA) for… …but ultimately the choice of algorithm will depend on systems engineering factors such as… 

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APA (6th Edition):

Mao, D. (2017). Bistatic SAR Polar Format Image Formation: Distortion Correction and Scene Size Limits. (Masters Thesis). Wright State University. Retrieved from http://rave.ohiolink.edu/etdc/view?acc_num=wright1496686554682524

Chicago Manual of Style (16th Edition):

Mao, Davin. “Bistatic SAR Polar Format Image Formation: Distortion Correction and Scene Size Limits.” 2017. Masters Thesis, Wright State University. Accessed October 18, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1496686554682524.

MLA Handbook (7th Edition):

Mao, Davin. “Bistatic SAR Polar Format Image Formation: Distortion Correction and Scene Size Limits.” 2017. Web. 18 Oct 2019.

Vancouver:

Mao D. Bistatic SAR Polar Format Image Formation: Distortion Correction and Scene Size Limits. [Internet] [Masters thesis]. Wright State University; 2017. [cited 2019 Oct 18]. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1496686554682524.

Council of Science Editors:

Mao D. Bistatic SAR Polar Format Image Formation: Distortion Correction and Scene Size Limits. [Masters Thesis]. Wright State University; 2017. Available from: http://rave.ohiolink.edu/etdc/view?acc_num=wright1496686554682524


Louisiana State University

11. Tetala Satya Surya, Dattatreya Reddy. Zooplankton visualization system: design and real-time lossless image compression.

Degree: MSEE, Electrical and Computer Engineering, 2004, Louisiana State University

 In this thesis, I present a design of a small, self-contained, underwater plankton imaging system. I base the imaging system’s design on an embedded PC… (more)

Subjects/Keywords: VHDL; modelsim; cadence; buildgates; Verilog; architecture; tiff; 16-bit images; DWT; S+P transform; xilinx; new algorithm; design; programming; visual c; cameralink; storage media; strobe; acquistion; framegrabber; zoovis; zooplankton; high frame rate; fast data transfer; ide; operating system; embedded; camera

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APA (6th Edition):

Tetala Satya Surya, D. R. (2004). Zooplankton visualization system: design and real-time lossless image compression. (Masters Thesis). Louisiana State University. Retrieved from etd-07022004-231204 ; https://digitalcommons.lsu.edu/gradschool_theses/529

Chicago Manual of Style (16th Edition):

Tetala Satya Surya, Dattatreya Reddy. “Zooplankton visualization system: design and real-time lossless image compression.” 2004. Masters Thesis, Louisiana State University. Accessed October 18, 2019. etd-07022004-231204 ; https://digitalcommons.lsu.edu/gradschool_theses/529.

MLA Handbook (7th Edition):

Tetala Satya Surya, Dattatreya Reddy. “Zooplankton visualization system: design and real-time lossless image compression.” 2004. Web. 18 Oct 2019.

Vancouver:

Tetala Satya Surya DR. Zooplankton visualization system: design and real-time lossless image compression. [Internet] [Masters thesis]. Louisiana State University; 2004. [cited 2019 Oct 18]. Available from: etd-07022004-231204 ; https://digitalcommons.lsu.edu/gradschool_theses/529.

Council of Science Editors:

Tetala Satya Surya DR. Zooplankton visualization system: design and real-time lossless image compression. [Masters Thesis]. Louisiana State University; 2004. Available from: etd-07022004-231204 ; https://digitalcommons.lsu.edu/gradschool_theses/529

.