You searched for +publisher:"Virginia Tech" +contributor:("Butt, Ali").
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Virginia Tech
1.
Wen, Yuzhong.
Replication of Concurrent Applications in a Shared Memory Multikernel.
Degree: MS, Computer Science and Applications, 2016, Virginia Tech
URL: http://hdl.handle.net/10919/71813 
► State Machine Replication (SMR) has become the de-facto methodology of building a replication based fault-tolerance system. Current SMR systems usually have multiple machines involved, each…
(more)
▼ State Machine Replication (SMR) has become the de-facto methodology of building a replication based fault-tolerance system. Current SMR systems usually have multiple machines involved, each of the machines in the SMR system acts as the replica of others. However having multiple machines leads to more cost to the infrastructure, in both hardware cost and power consumption. For tolerating non-critical CPU and memory failure that will not crash the entire machine, there is no need to have extra machines to do the job.
As a result, intra-machine replication is a good fit for this scenario. However, current intra-machine replication approaches do not provide strong isolation among the replicas, which allows the faults to be propagated from one replica to another.
In order to provide an intra-machine replication technique with strong isolation, in this thesis we present a SMR system on a multi-kernel OS. We implemented a replication system that is capable of replicating concurrent applications on different kernel instances of a multi-kernel OS. Modern concurrent application can be deployed on our system with minimal code modification. Additionally, our system provides two different replication modes that allows the user to switch freely according to the application type.
With the evaluation of multiple real world applications, we show that those applications can be easily deployed on our system with 0 to 60 lines of code changes to the source code. From the performance perspective, our system only introduces 0.23% to 63.39% overhead compared to non-replicated execution.
Advisors/Committee Members: Ravindran, Binoy (committeechair), Butt, Ali R. (committeechair), Lee, Dongyoon (committee member).
Subjects/Keywords: State Machine Replication; Runtime Systems; Deterministic System; System Software
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APA (6th Edition):
Wen, Y. (2016). Replication of Concurrent Applications in a Shared Memory Multikernel. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/71813
Chicago Manual of Style (16th Edition):
Wen, Yuzhong. “Replication of Concurrent Applications in a Shared Memory Multikernel.” 2016. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/71813.
MLA Handbook (7th Edition):
Wen, Yuzhong. “Replication of Concurrent Applications in a Shared Memory Multikernel.” 2016. Web. 22 Apr 2021.
Vancouver:
Wen Y. Replication of Concurrent Applications in a Shared Memory Multikernel. [Internet] [Masters thesis]. Virginia Tech; 2016. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/71813.
Council of Science Editors:
Wen Y. Replication of Concurrent Applications in a Shared Memory Multikernel. [Masters Thesis]. Virginia Tech; 2016. Available from: http://hdl.handle.net/10919/71813
Virginia Tech
2.
Jiang, Zijian.
Investigating and Recommending Co-Changed Entities for JavaScript Programs.
Degree: MS, Software Engineering, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/101102
► This thesis introduced a tool CoRec which can provide co-change suggestions when JavaScript programmers fix a bug. A comprehensive empirical study was carried out on…
(more)
▼ This thesis introduced a tool CoRec which can provide co-change suggestions when JavaScript programmers fix a bug. A comprehensive empirical study was carried out on 14,747 multi-entity bug fixes in ten open-source JavaScript programs. We characterized the relationship between co-changed entities (e.g., functions and variables), and extracted the most popular change patterns, based on which we built a machine learning (ML)-based approach to recommend additional entity to edit given developers’ code changes. Our empirical study shows that: (1) 50% of the crawled commits involve multi-entity edits (i.e., edits that touch multiple entities simultaneously); (2) three change patterns commonly exist in all ten projects; (3) 80-90% of co-changed function pairs in the 3 patterns either invoke the same function(s), access the same variable(s), or contain similar statement(s); and (4) our ML-based approach CoRec recommended entity changes with high accuracy. Our research will improve programmer productivity and software quality.
Advisors/Committee Members: Meng, Na (committeechair), Butt, Ali R. (committee member), Servant, Francisco (committee member).
Subjects/Keywords: Multi-entity edit; change suggestion; machine learning; JavaScript
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APA (6th Edition):
Jiang, Z. (2020). Investigating and Recommending Co-Changed Entities for JavaScript Programs. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/101102
Chicago Manual of Style (16th Edition):
Jiang, Zijian. “Investigating and Recommending Co-Changed Entities for JavaScript Programs.” 2020. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/101102.
MLA Handbook (7th Edition):
Jiang, Zijian. “Investigating and Recommending Co-Changed Entities for JavaScript Programs.” 2020. Web. 22 Apr 2021.
Vancouver:
Jiang Z. Investigating and Recommending Co-Changed Entities for JavaScript Programs. [Internet] [Masters thesis]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/101102.
Council of Science Editors:
Jiang Z. Investigating and Recommending Co-Changed Entities for JavaScript Programs. [Masters Thesis]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/101102
Virginia Tech
3.
Mantri, Sushil Govindnarayan.
Efficient In-Depth IO Tracing and its application for optimizing systems.
Degree: MS, Computer Science and Applications, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/50145
► Understanding user and system behavior is most vital for designing efficient systems. Most systems are designed with certain user workload in mind. However, such workloads…
(more)
▼ Understanding user and system behavior is most vital for designing efficient systems. Most
systems are designed with certain user workload in mind. However, such workloads evolve
over time, or the underlying hardware assumptions change. Further, most modern systems
are not built or deployed in isolation, they interact with other systems whose behavior might
not be exactly understood. Thus in order to understand the performance of a system, it
must be inspected closely while user workloads are running. Such close inspection must be
done with minimum disturbance to the user workload. Thus tracing or collection of all the
user and system generated events becomes an important approach in gaining comprehensive
insight in user behavior.
As part of this work, we have three major contributions. We designed and implemented
an in-depth block level I/O tracer, which would collect block level information like sector
number, size of the I/O, actual contents of the I/O, along with certain file system information
like filename, and offset in the file, for every I/O request. Next, to minimize the impact of
the tracing to the running workload, we introduce and implement a sampling mechanism
which traces fewer I/O requests. We validate that this sampling preserves certain I/O access
patterns. Finally, as one of the application of our tracer, we use it as a crucial component
of a system designed to do VM placements according to user workload.
Advisors/Committee Members: Butt, Ali R. (committeechair), Kafura, Dennis G. (committee member), Zhou, Pin (committee member).
Subjects/Keywords: I/O Tracing; VM placement; File-system tracing
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APA (6th Edition):
Mantri, S. G. (2014). Efficient In-Depth IO Tracing and its application for optimizing systems. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/50145
Chicago Manual of Style (16th Edition):
Mantri, Sushil Govindnarayan. “Efficient In-Depth IO Tracing and its application for optimizing systems.” 2014. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/50145.
MLA Handbook (7th Edition):
Mantri, Sushil Govindnarayan. “Efficient In-Depth IO Tracing and its application for optimizing systems.” 2014. Web. 22 Apr 2021.
Vancouver:
Mantri SG. Efficient In-Depth IO Tracing and its application for optimizing systems. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/50145.
Council of Science Editors:
Mantri SG. Efficient In-Depth IO Tracing and its application for optimizing systems. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/50145
Virginia Tech
4.
Ibrar, Fahad.
Strip-Miner: Automatic Bug Detection in Large Software Code with Low False Positive Rate.
Degree: MS, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/97934
► Every software code has bugs in it that can change its expected behavior. There have been a lot of efforts to automate the process of…
(more)
▼ Every software code has bugs in it that can change its expected behavior. There have been a lot of efforts to automate the process of bug detection but most of the techniques proposed have a high rate of false alarms. Some of these techniques leverage the information available in software code to extract programming patterns that can be used to find potential bugs. Although such an approach has proved to be fruitful for finding bugs but large number of false alarms makes it almost useless in software development.
The elements present in a software code have relationships among them formally known as dependencies and the process of finding them is known as dependency analysis. There is a technique known as market basket analysis used by large retailers to find association between items. It works by looking for combinations of items that occur together frequently in transactions. Similarly, in a software code combinations of elements that occur together, can be used to find association between them. This technique is formally known as frequent itemset mining in the data mining domain. This work proposes an approach, named Strip- Miner, that combines dependency analysis with frequent itemset mining to reduce the rate of false alarms. We adopt a two phase approach 1)finding the potential bugs in code and 2)filtering the false alarms. In the first phase we extract code elements and dependencies among them and use frequent itemset mining to find programming patterns where a deviation from these patterns is considered as a potential bug. In the second phase, we use the extracted dependencies to build dependency chains between program elements present in a programming pattern and lack of such a chain is an indication of false alarm.
Our evaluation on a set of 7 benchmarks consisting of large software code including version control systems, database management systems, software security libraries and utility software like media players shows that combining simple dependency analysis with frequent itemset mining can significantly decrease the rate of false alarms. Using our approach we are able to reduce the number of generated bugs by up to 99.9% with a false alarms rate of 65.19% and real bugs rate of 34.18% on average as compared to an earlier frequent itemset mining based approach "PR-Miner".
Advisors/Committee Members: Hicks, Matthew (committeechair), Servant Cortes, Francisco Javier (committee member), Butt, Ali R. (committee member).
Subjects/Keywords: Software Engineering; Software/Program Verification; Automatic Bug Detection
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APA (6th Edition):
Ibrar, F. (2020). Strip-Miner: Automatic Bug Detection in Large Software Code with Low False Positive Rate. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/97934
Chicago Manual of Style (16th Edition):
Ibrar, Fahad. “Strip-Miner: Automatic Bug Detection in Large Software Code with Low False Positive Rate.” 2020. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/97934.
MLA Handbook (7th Edition):
Ibrar, Fahad. “Strip-Miner: Automatic Bug Detection in Large Software Code with Low False Positive Rate.” 2020. Web. 22 Apr 2021.
Vancouver:
Ibrar F. Strip-Miner: Automatic Bug Detection in Large Software Code with Low False Positive Rate. [Internet] [Masters thesis]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/97934.
Council of Science Editors:
Ibrar F. Strip-Miner: Automatic Bug Detection in Large Software Code with Low False Positive Rate. [Masters Thesis]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/97934
Virginia Tech
5.
Abraham, Subil.
On the Use of Containers in High Performance Computing.
Degree: MS, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/99319
► Containers are a technology that allow for applications to be packaged along with its ideal environment, all the way down to its preferred operating system.…
(more)
▼ Containers are a technology that allow for applications to be packaged along with its ideal environment, all the way down to its preferred operating system. This allows an application to run anywhere that can support containers without a huge hit to the application performance. Hence containers have seen wide adoption for use in the cloud. These qualities have also made it very appealing for use in the world of scientific research in national labs. Modern research heavily relies on the power of computing in order to model, simulate, and test the behavior of real world entities, often making use of large amounts of data and utilizing machine learning and deep learning. Doing this often requires the high performance computing power found in supercomputers. In most cases, scientists just want to be able to write their code and expect it to just work. Their applications might depend on other source code that form part of their standard toolkit and would expect to also be installed in the supercomputing environment. This may not always be the case, taking the scientist's focus away from their work in order ensure their requirements are set up in the supercomputing environment which might require extensive cooperation with the operations team responsible for the supercomputers. Containers easily solve this problem because it can package everything together. However, the use of containers in these environments have not been extensively tested, especially for applications that are very heavy on the analysis of large quantities of data. To fill this gap, this work analyzes the performance of several state-of-the-art container technologies (Docker, Podman, Singularity, Charliecloud), with a particular focus on its interaction with the Lustre data storage systems widely used in supercomputing environments. As part of this work, we design an analysis setup that captures the behavior of various aspects of the high performance computing environment like CPU, memory, network usage and data movement while using containers to run data heavy applications. We garner important insights about their performance that can help inform the best choice of container technology given an environment and the kind of application that needs to be run.
Advisors/Committee Members: Butt, Ali R. (committeechair), Viswanath, Bimal (committee member), Williams, Ryan K. (committee member).
Subjects/Keywords: Container Performance; High Performance Computing; Parallel File Systems; HPC Storage and I/O
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APA ·
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APA (6th Edition):
Abraham, S. (2020). On the Use of Containers in High Performance Computing. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/99319
Chicago Manual of Style (16th Edition):
Abraham, Subil. “On the Use of Containers in High Performance Computing.” 2020. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/99319.
MLA Handbook (7th Edition):
Abraham, Subil. “On the Use of Containers in High Performance Computing.” 2020. Web. 22 Apr 2021.
Vancouver:
Abraham S. On the Use of Containers in High Performance Computing. [Internet] [Masters thesis]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/99319.
Council of Science Editors:
Abraham S. On the Use of Containers in High Performance Computing. [Masters Thesis]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/99319
Virginia Tech
6.
Williamson, Eric Robert.
Hybrid Analysis Tools for Computer Systems Education.
Degree: MS, Computer Science and Applications, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/83894
► To learn about computer operating systems, students at Virginia Tech implement a command-line shell in their Computer Systems course. Successfully implementing the shell requires a…
(more)
▼ To learn about computer operating systems, students at
Virginia Tech implement a command-line shell in their Computer Systems course. Successfully implementing the shell requires a deep understanding of operating system abstractions and interactions. Students often struggle with the project because subtle errors can take hours to debug.
In this work, we developed two hybrid domain-specific analysis tools to pinpoint the root causes of student errors: EshMD and ShellTrace. The EshMD tool models common errors in the shell and checks the student code against those models. To accomplish this, it monitors the specific calls the program is making and correlates those with expected changes in its environment. Students' errors are shown directly in the source code. The concept of EshMD can be applied to other programming projects by observing and modeling common bugs during implementation.
The ShellTrace tool dynamically creates a specification from a reference solution based on how the reference solution makes use of operating system resources and then uses this specification to check that a student solution is functionally identical. The ShellTrace concept can be applied to other programs that exhibit similar resource dependencies.
We deployed these tools in an undergraduate computer systems class and evaluated our tools based on the number of bugs detected and the students' perceptions of usefulness. We found that the tools detected a significant number of bugs and that the majority of students that made use of the tools found them valuable in debugging their submissions.
Advisors/Committee Members: Back, Godmar Volker (committeechair), Butt, Ali R. (committee member), Lee, Dongyoon (committee member).
Subjects/Keywords: CS Education; Program Analysis; Tools
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APA (6th Edition):
Williamson, E. R. (2018). Hybrid Analysis Tools for Computer Systems Education. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/83894
Chicago Manual of Style (16th Edition):
Williamson, Eric Robert. “Hybrid Analysis Tools for Computer Systems Education.” 2018. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/83894.
MLA Handbook (7th Edition):
Williamson, Eric Robert. “Hybrid Analysis Tools for Computer Systems Education.” 2018. Web. 22 Apr 2021.
Vancouver:
Williamson ER. Hybrid Analysis Tools for Computer Systems Education. [Internet] [Masters thesis]. Virginia Tech; 2018. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/83894.
Council of Science Editors:
Williamson ER. Hybrid Analysis Tools for Computer Systems Education. [Masters Thesis]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/83894
Virginia Tech
7.
Phelps, Andrew Jacob.
ink - An HTTP Benchmarking Tool.
Degree: MS, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/98918
► The World Wide Web (WWW) uses the Hypertext Transfer Protocol to send web content such as HTML pages or video to users. The servers providing…
(more)
▼ The World Wide Web (WWW) uses the Hypertext Transfer Protocol to send web content such as HTML pages or video to users. The servers providing this content are called HTTP servers. Sometimes, the performance of these HTTP servers is compromised because a large number of users requests documents at the same time. To prepare for this, server maintainers test how many simultaneous users a server can handle by using benchmarking utilities. These benchmarking utilities work by simulating a set of clients. Currently, these tools focus only on the amount of requests that a server can process per second. Unfortunately, this coarse-grained metric can hide important information, such as the level of service that individual clients received.
In this work, we present ink, an HTTP benchmarking utility we developed that focuses on reporting information for each simulated client. Reporting data in this way allows for the developer to see how well each client was served during the benchmark. We achieve this by constructing data visualizations that include a set of client timelines. Each of these timelines represents the service that one client received.
We evaluated ink through a series of case studies. These focus on the performance of the utility and the usefulness of the visualizations produced by ink. Additionally, we deployed ink in
Virginia Tech's Computer Systems course. The students were able to use the tool and took a survey pertaining to their experience with the tool.
Advisors/Committee Members: Back, Godmar Volker (committeechair), Gracanin, Denis (committee member), Butt, Ali R. (committee member).
Subjects/Keywords: Networking; Benchmarking; HTTP; Distributed Systems
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APA (6th Edition):
Phelps, A. J. (2020). ink - An HTTP Benchmarking Tool. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/98918
Chicago Manual of Style (16th Edition):
Phelps, Andrew Jacob. “ink - An HTTP Benchmarking Tool.” 2020. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/98918.
MLA Handbook (7th Edition):
Phelps, Andrew Jacob. “ink - An HTTP Benchmarking Tool.” 2020. Web. 22 Apr 2021.
Vancouver:
Phelps AJ. ink - An HTTP Benchmarking Tool. [Internet] [Masters thesis]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/98918.
Council of Science Editors:
Phelps AJ. ink - An HTTP Benchmarking Tool. [Masters Thesis]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/98918
Virginia Tech
8.
Sim, Hyogi.
AnalyzeThis: An Analysis Workflow-Aware Storage System.
Degree: MS, Computer Science, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/76927
► Supercomputing application simulations on hundreds of thousands of cores produce vast amounts of data that need to be analyzed on smaller-scale clusters to glean insights.…
(more)
▼ Supercomputing application simulations on hundreds of thousands of cores produce vast amounts of data that need to be analyzed on smaller-scale clusters to glean insights. The process is referred to as an end-to-end workflow. Extant workflow systems are stymied by the storage wall, resulting from both the disk-based parallel file system (PFS) failing to keep pace with the compute and memory subsystems as well as the inefficiencies in end-to-end workflow processing. In the post-petaflop era, supercomputers are provisioned with flash devices, as an intermediary between compute nodes and the PFS, enabling novel paradigms not just for expediting I/O, but also for the in-situ analysis of the simulation output data on the flash device. An array of such active flash elements allows us to fundamentally rethink the way data analysis workflows interact with storage systems. By blending the flash storage array and data analysis together in a seamless fashion, we create an analysis workflow-aware storage system, AnalyzeThis. Our guiding principle is that analysis-awareness be deeply ingrained in each and every layer of the storage system—active flash fabric, analysis object abstraction layer, scheduling layer within the storage, and an easy-to-use file system interface—thereby elevating data analyses as first-class citizens. Together, these concepts transform AnalyzeThis into a potent analytics-aware appliance.
Advisors/Committee Members: Butt, Ali R. (committeechair), Vazhkudai, Sudharshan S. (committee member), Jung, Changhee (committee member).
Subjects/Keywords: File System; Distributed System
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APA ·
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APA (6th Edition):
Sim, H. (2014). AnalyzeThis: An Analysis Workflow-Aware Storage System. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/76927
Chicago Manual of Style (16th Edition):
Sim, Hyogi. “AnalyzeThis: An Analysis Workflow-Aware Storage System.” 2014. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/76927.
MLA Handbook (7th Edition):
Sim, Hyogi. “AnalyzeThis: An Analysis Workflow-Aware Storage System.” 2014. Web. 22 Apr 2021.
Vancouver:
Sim H. AnalyzeThis: An Analysis Workflow-Aware Storage System. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/76927.
Council of Science Editors:
Sim H. AnalyzeThis: An Analysis Workflow-Aware Storage System. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/76927
Virginia Tech
9.
Meeramohideen Mohamed, Nabeel.
Data-Intensive Biocomputing in the Cloud.
Degree: MS, Computer Science and Applications, 2013, Virginia Tech
URL: http://hdl.handle.net/10919/23847
► Next-generation sequencing (NGS) technologies have made it possible to rapidly sequence the human genome, heralding a new era of health-care innovations based on personalized genetic…
(more)
▼ Next-generation sequencing (NGS) technologies have made it possible to rapidly sequence the human genome, heralding a new era of health-care innovations based on personalized genetic information. However, these NGS technologies generate data at a rate that far outstrips Moore\'s Law. As a consequence, analyzing this exponentially increasing data deluge requires enormous computational and storage resources, resources that many life science institutions do not have access to. As such, cloud computing has emerged as an obvious, but still nascent, solution.
This thesis intends to investigate and design an efficient framework for running and managing large-scale data-intensive scientific applications in the cloud. Based on the learning from our parallel implementation of a genome analysis pipeline in the cloud, we aim to provide a framework for users to run such data-intensive scientific workflows using a hybrid setup of client and cloud resources. We first present SeqInCloud, our highly scalable parallel implementation of a popular genetic variant pipeline called genome analysis toolkit (GATK), on the Windows Azure HDInsight cloud platform. Together with a parallel implementation of GATK on Hadoop, we evaluate the potential of using cloud computing for large-scale DNA analysis and present a detailed study on efficiently utilizing cloud resources for running data-intensive, life-science applications. Based on our experience from running SeqInCloud on Azure, we present CloudFlow, a feature rich workflow manager for running MapReduce-based bioinformatic pipelines utilizing both client and cloud resources. CloudFlow, built on the top of an existing MapReduce-based workflow manager called Cloudgene, provides unique features that are not offered by existing MapReduce-based workflow managers, such as enabling simultaneous use of client and cloud resources, automatic data-dependency handling between client and cloud resources, and the flexibility of implementing user-defined plugins for data transformations. In-general, we believe that our work attempts to increase the adoption of cloud resources for running data-intensive scientific workloads.
Advisors/Committee Members: Feng, Wu-Chun (committeechair), Butt, Ali R. (committee member), Lin, Heshan (committee member).
Subjects/Keywords: Cloud Computing; Next Generation Sequencing; MapReduce; GATK; Workflow
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APA (6th Edition):
Meeramohideen Mohamed, N. (2013). Data-Intensive Biocomputing in the Cloud. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/23847
Chicago Manual of Style (16th Edition):
Meeramohideen Mohamed, Nabeel. “Data-Intensive Biocomputing in the Cloud.” 2013. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/23847.
MLA Handbook (7th Edition):
Meeramohideen Mohamed, Nabeel. “Data-Intensive Biocomputing in the Cloud.” 2013. Web. 22 Apr 2021.
Vancouver:
Meeramohideen Mohamed N. Data-Intensive Biocomputing in the Cloud. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/23847.
Council of Science Editors:
Meeramohideen Mohamed N. Data-Intensive Biocomputing in the Cloud. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/23847
Virginia Tech
10.
Buckingham, Nicole A.
Ultra-wideband Radar Detection of Breathing Rate: A Comparative Evaluation.
Degree: MS, Computer Engineering, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/98597
► The goal of research in the field of health monitoring is to gather medical information about a user by constantly collecting physiological signals emitted by…
(more)
▼ The goal of research in the field of health monitoring is to gather medical information about a user by constantly collecting physiological signals emitted by their body. Four physiological signals are deemed the "vital signs" because they provide information about the overall health of the patient. These vital signs are heart rate, breathing rate, temperature and blood pressure. Breathing rate is an important vital sign that, when monitored closely, can indicate the oncoming of dangerous health conditions and events.
The act of breathing causes the chest to expand and contract. This movement can be captured by placing a strain gauge around a user's chest and analyzing fluctuation in strain readings. However, this is not practical for health monitoring applications because this system is uncomfortable to wear and the accuracy of the system is heavily dependent on the user's ability to wear the chest band constantly and correctly. Capturing this signal without any direct user contact would eliminate the user's discomfort and provide better reliability. This can be done by several methods, but the focus of this work is on systems that capture chest movements using ultra-wideband (UWB) radar.
In this work, a specific UWB radar based device, called the Walabot, is tested against a standard strain gauge system to determine if it has health monitoring applications. Other radar based devices that aim to detect breathing rate are limited by their high cost and inaccuracies in signal processing techniques. The functionality of the devices are also dependent on the user's location and body orientation relative to the system, any user movement and the placement of the system itself. The study in this work was designed to determine the Walabot accuracy when the data is processed by two common breathing rate derivation methods. Results showed that the Walabot is cost effective and flexible in terms of user location and system placement. Overall, this work demonstrates the potential of the Walabot as a breathing rate monitor.
Advisors/Committee Members: Martin, Thomas L. (committeechair), Gracanin, Denis (committeechair), Butt, Ali R. (committee member).
Subjects/Keywords: Biosensors; Breathing Rate; Human Computer Interaction; Prognostics and Health Management; Remote Sensing
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APA (6th Edition):
Buckingham, N. A. (2020). Ultra-wideband Radar Detection of Breathing Rate: A Comparative Evaluation. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/98597
Chicago Manual of Style (16th Edition):
Buckingham, Nicole A. “Ultra-wideband Radar Detection of Breathing Rate: A Comparative Evaluation.” 2020. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/98597.
MLA Handbook (7th Edition):
Buckingham, Nicole A. “Ultra-wideband Radar Detection of Breathing Rate: A Comparative Evaluation.” 2020. Web. 22 Apr 2021.
Vancouver:
Buckingham NA. Ultra-wideband Radar Detection of Breathing Rate: A Comparative Evaluation. [Internet] [Masters thesis]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/98597.
Council of Science Editors:
Buckingham NA. Ultra-wideband Radar Detection of Breathing Rate: A Comparative Evaluation. [Masters Thesis]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/98597
Virginia Tech
11.
Ghaffar, Talha.
Empirical Evaluation of Edge Computing for Smart Building Streaming IoT Applications.
Degree: MS, Computer Science and Applications, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/88438
► Among the various emerging applications of Internet of Things (IoT) are Smart buildings, that allow us to monitor and manipulate various operating parameters of a…
(more)
▼ Among the various emerging applications of Internet of Things (IoT) are Smart buildings, that allow us to monitor and manipulate various operating parameters of a building by instrumenting it with sensor and actuator devices (Things). These devices operate continuously and generate unbounded streams of data that needs to be processed at low latency. This data, until recently, has been processed by the IoT applications deployed in the Cloud at the cost of high network latency of accessing Cloud’s resources. However, the increasing availability of IoT devices, ubiquitous connectivity, and exponential growth in the volume of IoT data has given rise to a new computing paradigm, referred to as “Edge computing”. Edge computing argues that IoT data should be analyzed near its source (at the network’s Edge) in order to eliminate high latency of accessing Cloud for data processing. In order to develop efficient Edge computing systems, an in-depth understanding of the trade-offs involved in Edge and Cloud computing paradigms is required. In this work, we seek to understand these trade-offs and the potential benefits of Edge computing. We examine end to-end latency and throughput performance characteristics of Smart building streaming IoT applications by deploying them at the resource-constrained Edge and compare it against the performance that can be achieved by Cloud deployment. We also present a real-time streaming application to detect and localize the footstep impacts generated by a building’s occupant while walking. We characterize this application’s performance for Edge and Cloud computing and utilize a hybrid scheme that (1) offers maximum of around 60% and 65% reduced latency compared to Edge and Cloud respectively for similar throughput performance and (2) enables processing of higher ingestion rates by eliminating network bottleneck.
Advisors/Committee Members: Lee, Dongyoon (committeechair), Jung, Changhee (committee member), Butt, Ali R. (committee member).
Subjects/Keywords: Edge Computing; Stream Processing; Internet of Things; Apache Storm
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APA (6th Edition):
Ghaffar, T. (2019). Empirical Evaluation of Edge Computing for Smart Building Streaming IoT Applications. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/88438
Chicago Manual of Style (16th Edition):
Ghaffar, Talha. “Empirical Evaluation of Edge Computing for Smart Building Streaming IoT Applications.” 2019. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/88438.
MLA Handbook (7th Edition):
Ghaffar, Talha. “Empirical Evaluation of Edge Computing for Smart Building Streaming IoT Applications.” 2019. Web. 22 Apr 2021.
Vancouver:
Ghaffar T. Empirical Evaluation of Edge Computing for Smart Building Streaming IoT Applications. [Internet] [Masters thesis]. Virginia Tech; 2019. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/88438.
Council of Science Editors:
Ghaffar T. Empirical Evaluation of Edge Computing for Smart Building Streaming IoT Applications. [Masters Thesis]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/88438
Virginia Tech
12.
Berkhahn, Jonathan Allen.
An Analysis of Conventional & Heterogenous Workloads on Production Supercomputing Resources.
Degree: MS, Computer Science and Applications, 2013, Virginia Tech
URL: http://hdl.handle.net/10919/23172
► Cloud computing setups are a huge investment of resources and personnel to maintain. As the workload on a system is a major contributing factor to…
(more)
▼ Cloud computing setups are a huge investment of resources and personnel to maintain. As the workload on a system is a major contributing factor to both the performance of the system and a representation of the needs of system users, a clear understanding of the workload is critical to organizations that support supercomputing systems. In this paper, we analyze traces from two production level supercomputers to infer the characteristics of their workloads, and make observations as to the needs of supercomputer users based on them. We particularly focus on the usage of graphical processing units by domain scientists. Based on this analysis, we generate a synthetic workload that can be used for testing future systems, and make observations as to e"cient resource provisioning.
Advisors/Committee Members: Butt, Ali R. (committeechair), Kim, Byoung-Do (committee member), Cao, Yong (committee member).
Subjects/Keywords: Workload synthesis; resource provisioning; heterogenous computing
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APA (6th Edition):
Berkhahn, J. A. (2013). An Analysis of Conventional & Heterogenous Workloads on Production Supercomputing Resources. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/23172
Chicago Manual of Style (16th Edition):
Berkhahn, Jonathan Allen. “An Analysis of Conventional & Heterogenous Workloads on Production Supercomputing Resources.” 2013. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/23172.
MLA Handbook (7th Edition):
Berkhahn, Jonathan Allen. “An Analysis of Conventional & Heterogenous Workloads on Production Supercomputing Resources.” 2013. Web. 22 Apr 2021.
Vancouver:
Berkhahn JA. An Analysis of Conventional & Heterogenous Workloads on Production Supercomputing Resources. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/23172.
Council of Science Editors:
Berkhahn JA. An Analysis of Conventional & Heterogenous Workloads on Production Supercomputing Resources. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/23172
Virginia Tech
13.
Littley, Michael Brian.
Towards a Scalable Docker Registry.
Degree: MS, Computer Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/83814
► Containers are an alternative to virtual machines rapidly increasing in popularity due to their minimal overhead. To help facilitate their adoption, containers use management systems…
(more)
▼ Containers are an alternative to virtual machines rapidly increasing in popularity due to
their minimal overhead. To help facilitate their adoption, containers use management systems
with central registries to store and distribute container images. However, these registries
rely on other, preexisting services to provide load balancing and storage, which limits
their scalability. This thesis introduces a new registry design for Docker, the most prevalent
container management system. The new design coalesces all the services into a single,
highly scalable, registry. By increasing the scalability of the registry, the new design greatly
decreases the distribution time for container images. This work also describes a new Docker
registry benchmarking tool, the trace player, that uses real Docker registry workload traces
to test the performance of new registry designs and setups.
Advisors/Committee Members: Butt, Ali R. (committeechair), Yang, Yaling (committee member), Tront, Joseph G. (committee member).
Subjects/Keywords: Docker Registry; Scalability; Failure Recovery; Caching; Virtualization
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APA (6th Edition):
Littley, M. B. (2018). Towards a Scalable Docker Registry. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/83814
Chicago Manual of Style (16th Edition):
Littley, Michael Brian. “Towards a Scalable Docker Registry.” 2018. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/83814.
MLA Handbook (7th Edition):
Littley, Michael Brian. “Towards a Scalable Docker Registry.” 2018. Web. 22 Apr 2021.
Vancouver:
Littley MB. Towards a Scalable Docker Registry. [Internet] [Masters thesis]. Virginia Tech; 2018. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/83814.
Council of Science Editors:
Littley MB. Towards a Scalable Docker Registry. [Masters Thesis]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/83814
Virginia Tech
14.
Chao, Lance Rolin.
Symmetric MultiProcessing for the Pintos Instructional Operating System.
Degree: MS, Computer Science and Applications, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/78293
► For the last decade, practical limitations have prevented processor speeds from increasing significantly. To increase throughput, the computing industry has turned to multiprocessing; that is,…
(more)
▼ For the last decade, practical limitations have prevented processor speeds from increasing significantly. To increase throughput, the computing industry has turned to multiprocessing; that is, executing computations in parallel on separate processing units. Making use of these additional units requires support from the operating system (OS). Indeed, most modern operating systems do have the capability of recognizing and utilizing multiprocessor hardware.
Pintos is an instructional operating system used by many institutions to teach important operating systems concepts. Pintos aims to increase student engagement by providing challenging programming projects in which students personally implement many core functionalities of an operating system. However, prior to this work, Pintos was a uniprocessor OS. This makes it difficult for Pintos to expose students to the same synchronization challenges that most modern kernel developers face. In addition, the first structured project, aimed at teaching scheduling policies, requires students to implement an uniprocessor variant of MLFQS scheduler which is no longer used in modern systems.
We implemented Symmetric MultiProcessing (SMP) support in Pintos. We also created a new scheduling assignment to expose students to a multiprocessor proportional-share scheduling policy called Completely Fair Scheduler and to introduce them to the concept of load balancing. Finally, we evaluate the effectiveness of our new Pintos framework in augmenting students’ knowledge of OS scheduling and enhancing their ability to code and debug in a low-level environment.
Advisors/Committee Members: Back, Godmar Volker (committeechair), Kafura, Dennis G. (committee member), Butt, Ali R. (committee member).
Subjects/Keywords: Pintos; Symmetric Multiprocessing; Education; OS
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APA (6th Edition):
Chao, L. R. (2017). Symmetric MultiProcessing for the Pintos Instructional Operating System. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78293
Chicago Manual of Style (16th Edition):
Chao, Lance Rolin. “Symmetric MultiProcessing for the Pintos Instructional Operating System.” 2017. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/78293.
MLA Handbook (7th Edition):
Chao, Lance Rolin. “Symmetric MultiProcessing for the Pintos Instructional Operating System.” 2017. Web. 22 Apr 2021.
Vancouver:
Chao LR. Symmetric MultiProcessing for the Pintos Instructional Operating System. [Internet] [Masters thesis]. Virginia Tech; 2017. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/78293.
Council of Science Editors:
Chao LR. Symmetric MultiProcessing for the Pintos Instructional Operating System. [Masters Thesis]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/78293
Virginia Tech
15.
Luther, Noah Robert.
Implementing Direct Anonymous Attestation on TPM 2.0.
Degree: MS, Computer Science and Applications, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/86349
► Numerous organizations have pressed in the past several years for improved security and privacy in online interactions. Stakeholders have encouraged the adoption of privacy-enhancing technologies,…
(more)
▼ Numerous organizations have pressed in the past several years for improved security and privacy in online interactions. Stakeholders have encouraged the adoption of privacy-enhancing technologies, utilization of microcontrollers and hardware devices for key storage and attestation, and improvements to the methods and policies used for authentication. Cryptographers and security engineers have responded to these calls. There have been numerous papers published in the last decade on topics such as private information retrieval and anonymous authentication and the Trusted Computing Group (TCG) has released a version 2.0 standard for Trusted Platform Modules (TPM). Adoption and implementation of these techniques, however, has been lacking. Although the TPM 2.0 specification was released in 2014 there are no reference implementations of direct anonymous attestation algorithms compatible with the hardware. The purpose of this work is to implement and discuss the implementation of direct anonymous attestation on TPM 2.0 and to consider the scalability and performance of direct anonymous attestation schemes operating on real-world TPM devices.
Advisors/Committee Members: Park, Jung-Min (committeechair), Butt, Ali R. (committeechair), Wang, Gang (committee member).
Subjects/Keywords: Direct Anonymous Attestation; TPM; Trusted Computing
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APA (6th Edition):
Luther, N. R. (2017). Implementing Direct Anonymous Attestation on TPM 2.0. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/86349
Chicago Manual of Style (16th Edition):
Luther, Noah Robert. “Implementing Direct Anonymous Attestation on TPM 2.0.” 2017. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/86349.
MLA Handbook (7th Edition):
Luther, Noah Robert. “Implementing Direct Anonymous Attestation on TPM 2.0.” 2017. Web. 22 Apr 2021.
Vancouver:
Luther NR. Implementing Direct Anonymous Attestation on TPM 2.0. [Internet] [Masters thesis]. Virginia Tech; 2017. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/86349.
Council of Science Editors:
Luther NR. Implementing Direct Anonymous Attestation on TPM 2.0. [Masters Thesis]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/86349
Virginia Tech
16.
Zhang, Jing.
Transforming and Optimizing Irregular Applications for Parallel Architectures.
Degree: PhD, Computer Science and Applications, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/82069
► Parallel architectures, including multi-core processors, many-core processors, and multi-node systems, have become commonplace, as it is no longer feasible to improve single-core performance through increasing…
(more)
▼ Parallel architectures, including multi-core processors, many-core processors, and multi-node systems, have become commonplace, as it is no longer feasible to improve single-core performance through increasing its operating clock frequency. Furthermore, to keep up with the exponentially growing desire for more and more computational power, the number of cores/nodes in parallel architectures has continued to dramatically increase. On the other hand, many applications in well-established and emerging fields, such as bioinformatics, social network analysis, and graph processing, exhibit increasing irregularities in memory access, control flow, and communication patterns. While multiple techniques have been introduced into modern parallel architectures to tolerate these irregularities, many irregular applications still execute poorly on current parallel architectures, as their irregularities exceed the capabilities of these techniques. Therefore, it is critical to resolve irregularities in applications for parallel architectures. However, this is a very challenging task, as the irregularities are dynamic, and hence, unknown until runtime.
To optimize irregular applications, many approaches have been proposed to improve data locality and reduce irregularities through computational and data transformations. However, there are two major drawbacks in these existing approaches that prevent them from achieving optimal performance. First, these approaches use local optimizations that exploit data locality and regularity locally within a loop or kernel. However, in many applications, there is hidden locality across loops or kernels. Second, these approaches use "one-size-fits-all'' methods that treat all irregular patterns equally and resolve them with a single method. However, many irregular applications have complex irregularities, which are mixtures of different types of irregularities and need differentiated optimizations. To overcome these two drawbacks, we propose a general methodology that includes a taxonomy of irregularities to help us analyze the irregular patterns in an application, and a set of adaptive transformations to reorder data and computation based on the characteristics of the application and architecture.
By extending our adaptive data-reordering transformation on a single node, we propose a data-partitioning framework to resolve the load imbalance problem of irregular applications on multi-node systems. Unlike existing frameworks, which use "one-size-fits-all" methods to partition the input data by a single property, our framework provides a set of operations to transform the input data by multiple properties and generates the desired data-partitioning codes by composing these operations into a workflow.
Advisors/Committee Members: Feng, Wu-Chun (committeechair), Butt, Ali R. (committee member), Wang, Hao (committee member), Lin, Heshan (committee member), Zhang, Liqing (committee member).
Subjects/Keywords: Irregular Applications; Parallel Architectures; Multi-core; Many-core; Multi-node; Bioinformatics
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MLA ·
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APA (6th Edition):
Zhang, J. (2018). Transforming and Optimizing Irregular Applications for Parallel Architectures. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/82069
Chicago Manual of Style (16th Edition):
Zhang, Jing. “Transforming and Optimizing Irregular Applications for Parallel Architectures.” 2018. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/82069.
MLA Handbook (7th Edition):
Zhang, Jing. “Transforming and Optimizing Irregular Applications for Parallel Architectures.” 2018. Web. 22 Apr 2021.
Vancouver:
Zhang J. Transforming and Optimizing Irregular Applications for Parallel Architectures. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/82069.
Council of Science Editors:
Zhang J. Transforming and Optimizing Irregular Applications for Parallel Architectures. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/82069
Virginia Tech
17.
Srivastav, Meeta S.
Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs.
Degree: PhD, Computer Engineering, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/51237
► Earlier designs were driven by the goal of achieving higher performance, but lately, energy efficiency has emerged as an even more important design principle. Strong…
(more)
▼ Earlier designs were driven by the goal of achieving higher performance, but lately, energy efficiency has emerged as an even more important design principle. Strong demand from the consumer electronics drives research in the low power and energy-efficient methodologies. Moreover, with exponential increase in the number of transistors on a chip and with further technology scaling, variability in the design is now of greater concern. Variations can make the design unreliable or the design may suffer from sub-optimal performance. Through the work in this thesis, we present a multi-dimensional investigation into the design of variation aware energy-efficient systems. Our overarching methodology is to use system-level decisions to mitigate undesired effects originating from device-level and circuit-level issues.
We first look into the impact of process variation (PV) on energy efficient, scalable throughput many-core DSP systems. In our proposed methodology, we leverage the benefits of aggressive voltage scaling (VS) for obtaining energy efficiency while compensating for the loss in performance by exploiting parallelism present in various DSP designs. We demonstrate this proposed methodology consumes 8% - 77% less power as compared to simple dynamic VS over different workload environments. Later, we show judicious system-level decisions, namely, number of cores, and their operating voltage can greatly mitigate the effects of PV and consequently, improve the energy efficiency of the design. We also present our analysis discussing the impact of aging on the proposed methodology. To validate our proposed system-level approach, design details of a prototype chip fabricated in the 90nm technology node and its findings are also presented. The chip consists of 8 homogeneous FIR cores, which are capable of running from near-threshold to nominal voltages. In the 20-chip population, we observe 7% variation in the speed at nominal voltage (0.9V) and 26% at near threshold voltage (0.55V) among all the cores. We also observe 54% variation in power consumption characteristics of the cores. The chip measurement results show that our proposed methodology of judiciously selecting the cores and their operating voltage can result in 6.27% - 28.15% more energy savings for various workload environments, as compared to globally voltage scaled systems. Furthermore, we present the impact of temperature variations on the energy-efficiency of the above systems.
We also study the problem of voltage variations in the integrated circuits. We first present the characteristics of a dynamic voltage noise as measured on a 28nm FPGA. We propose a fully digital on-chip sensor that can detect the fast voltage transients and alert the system of voltage emergency. A traditional approach to mitigate this problem is to use safety guardbands. We demonstrate that our proposed sensor system will be 6% - 27.5% more power efficient than the traditional approach.
Advisors/Committee Members: Nazhandali, Leyla (committeechair), Schaumont, Patrick Robert (committee member), Butt, Ali R. (committee member), Plassmann, Paul E. (committee member), Irwin, Mary Jane (committee member).
Subjects/Keywords: Low power; Near-threshold; Enery efficient; di/dt; process; variation; PVTA; aging; homogeneous many-core
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APA (6th Edition):
Srivastav, M. S. (2015). Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/51237
Chicago Manual of Style (16th Edition):
Srivastav, Meeta S. “Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs.” 2015. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/51237.
MLA Handbook (7th Edition):
Srivastav, Meeta S. “Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs.” 2015. Web. 22 Apr 2021.
Vancouver:
Srivastav MS. Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs. [Internet] [Doctoral dissertation]. Virginia Tech; 2015. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/51237.
Council of Science Editors:
Srivastav MS. Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs. [Doctoral Dissertation]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/51237
Virginia Tech
18.
Nikolaev, Ruslan.
Design and Implementation of the VirtuOS Operating System.
Degree: PhD, Computer Science and Applications, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/24964
► Most operating systems provide protection and isolation to user processes, but not to critical system components such as device drivers or other systems code. Consequently,…
(more)
▼ Most operating systems provide protection and isolation to user processes, but not to critical system components such as device drivers or other systems code. Consequently, failures in these components often lead to system failures. VirtuOS is an operating system that exploits a new method of decomposition to protect against such failures. VirtuOS exploits virtualization to isolate and protect vertical slices of existing OS kernels in separate service domains. Each service domain represents a partition of an existing kernel, which implements a subset of that kernel's functionality. Service domains directly service system calls from user processes. VirtuOS exploits an exceptionless model, avoiding the cost of a system call trap in many cases. We illustrate how to apply exceptionless system calls across virtualized domains.
To demonstrate the viability of VirtuOS's approach, we implemented a prototype based on the Linux kernel and Xen hypervisor. We created and evaluated a network and a storage service domain. Our prototype retains compatibility with existing applications, can survive the failure of individual service domains while outperforming alternative approaches such as isolated driver domains and even exceeding the performance of native Linux for some multithreaded workloads.
The evaluation of VirtuOS revealed costs due to decomposition, memory management, and communication, which necessitated a fine-grained analysis to understand their impact on the system's performance. The interaction of virtual machines with multiple underlying software and hardware layers in virtualized environment makes this task difficult. Moreover, performance analysis tools commonly used in native environments were not available in virtualized environments. Our work addresses this problem to enable an in-depth performance analysis of VirtuOS. Our Perfctr-Xen framework provides capabilities for per-thread analysis with both accumulative event counts and interrupt-driven event sampling. Perfctr-Xen is a flexible and generic tool, supports different modes of virtualization, and can be used for many applications outside of VirtuOS.
Advisors/Committee Members: Back, Godmar Volker (committeechair), Tilevich, Eli (committee member), Gupta, Bidyut (committee member), Kafura, Dennis G. (committee member), Butt, Ali R. (committee member).
Subjects/Keywords: operating systems; hypervisor; microkernel; driver isolation; profilers; perfctr; Xen; virtualization; IOMMU; exceptionless system calls
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Export
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APA (6th Edition):
Nikolaev, R. (2014). Design and Implementation of the VirtuOS Operating System. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/24964
Chicago Manual of Style (16th Edition):
Nikolaev, Ruslan. “Design and Implementation of the VirtuOS Operating System.” 2014. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/24964.
MLA Handbook (7th Edition):
Nikolaev, Ruslan. “Design and Implementation of the VirtuOS Operating System.” 2014. Web. 22 Apr 2021.
Vancouver:
Nikolaev R. Design and Implementation of the VirtuOS Operating System. [Internet] [Doctoral dissertation]. Virginia Tech; 2014. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/24964.
Council of Science Editors:
Nikolaev R. Design and Implementation of the VirtuOS Operating System. [Doctoral Dissertation]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/24964
Virginia Tech
19.
Zhao, Nannan.
Towards a Flexible High-efficiency Storage System for Containerized Applications.
Degree: PhD, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/100315
► The amount of Docker images stored in Docker registries is increasing rapidly and present challenges for the underlying storage infrastructures. Before we do any optimizations…
(more)
▼ The amount of Docker images stored in Docker registries is increasing rapidly and present
challenges for the underlying storage infrastructures. Before we do any optimizations for the
storage system, we should first analyze this big Docker image dataset. To this end, in this
dissertation we perform the first large-scale characterization and redundancy analysis of the
images and layers stored in the Docker Hub registry. Based on the findings, this dissertation
presents a series of practical and efficient techniques, algorithms, optimizations to achieve
high performance and flexibility, and space-efficient storage system for containerized applications. The experimental evaluation demonstrates the effectiveness of our optimizations
and techniques to make storage systems flexible and space-efficacy.
Advisors/Committee Members: Butt, Ali R. (committeechair), Tarasov, Vasily (committee member), Jung, Changhee (committee member), Lee, Dongyoon (committee member), Meng, Na (committee member).
Subjects/Keywords: Containers; Distributed storage systems; Deduplication; Wear Balancing; Flash memory; Docker registry; Docker images
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APA (6th Edition):
Zhao, N. (2020). Towards a Flexible High-efficiency Storage System for Containerized Applications. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/100315
Chicago Manual of Style (16th Edition):
Zhao, Nannan. “Towards a Flexible High-efficiency Storage System for Containerized Applications.” 2020. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/100315.
MLA Handbook (7th Edition):
Zhao, Nannan. “Towards a Flexible High-efficiency Storage System for Containerized Applications.” 2020. Web. 22 Apr 2021.
Vancouver:
Zhao N. Towards a Flexible High-efficiency Storage System for Containerized Applications. [Internet] [Doctoral dissertation]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/100315.
Council of Science Editors:
Zhao N. Towards a Flexible High-efficiency Storage System for Containerized Applications. [Doctoral Dissertation]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/100315
Virginia Tech
20.
Chang, Hung-Ching.
Measuring, modeling, and optimizing counterintuitive performance phenomena in power-scalable, parallel systems.
Degree: PhD, Computer Science and Applications, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/51682
► The demands of exascale computing systems and applications have pushed for a rapid, continual design paradigm coupled with increasing design complexities from the interaction between…
(more)
▼ The demands of exascale computing systems and applications have pushed for a rapid, continual design paradigm coupled with increasing design complexities from the interaction between the application, the middleware, and the underlying system hardware, which forms a breeding ground for inefficiency. This work seeks to improve system efficiency by exposing the root causes of unexpected performance slowdowns (e.g., lower performance at higher processor speeds) that occur more frequently in power-scalable systems where raw processor speed varies. More precisely, we perform an exhaustive empirical study that conclusively shows that increasing processor speed often reduces performance and wastes energy. Our experimental work shows that the frequency of occurrence and magnitude of slowdowns grow with clock frequency and parallelism, indicating that such slowdowns will increasingly be observed with trends in processor and system design.
Performance speedups at lower frequencies (or slowdowns at higher frequencies) have been anecdotally observed in the prevailing literature since 2004, but no research has explained nor exploited this phenomenon. This work conclusively demonstrates that performance slowdowns during processor speedup phases can exceed 47% in common I/O workloads. Our hypothesis challenges (and ultimately debunks) a fundamental assumption in computer systems: faster processor speeds result in the same or better performance.
In this work, with the use of code and kernel instrumentation, exhaustive experiments, and deep insight into the inner workings of the Linux I/O subsystem, I overcome the aforementioned challenges of variance, complexity, and nondeterminism and identify the I/O resource contention as the root cause of the slowdowns during processor speedup. Specifically, such contention comes from the Linux kernel when the journaling block device (JBD) interacts with the ext3/4 file system that introduces file write delays and file synchronization delays. To fully explain how such I/O contention causes performance anomaly, I propose analytical models of resource contention among I/O threads to describe the root cause of the observed I/O slowdowns when processors speed up. To this end, I introduce LUC, a runtime system to limit the unintended consequences of power scaling and demonstrate the effectiveness of the LUC system for two critical parallel transaction-oriented workloads, including a mail server (varMail) and online transaction processing (oltp).
Advisors/Committee Members: Cameron, Kirk W. (committeechair), Ge, Rong (committee member), Ribbens, Calvin J. (committee member), Butt, Ali R. (committee member), Nikolopoulos, Dimitrios S. (committee member).
Subjects/Keywords: parallel and distributed processing; I/O performance; power; runtime systems
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APA (6th Edition):
Chang, H. (2015). Measuring, modeling, and optimizing counterintuitive performance phenomena in power-scalable, parallel systems. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/51682
Chicago Manual of Style (16th Edition):
Chang, Hung-Ching. “Measuring, modeling, and optimizing counterintuitive performance phenomena in power-scalable, parallel systems.” 2015. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/51682.
MLA Handbook (7th Edition):
Chang, Hung-Ching. “Measuring, modeling, and optimizing counterintuitive performance phenomena in power-scalable, parallel systems.” 2015. Web. 22 Apr 2021.
Vancouver:
Chang H. Measuring, modeling, and optimizing counterintuitive performance phenomena in power-scalable, parallel systems. [Internet] [Doctoral dissertation]. Virginia Tech; 2015. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/51682.
Council of Science Editors:
Chang H. Measuring, modeling, and optimizing counterintuitive performance phenomena in power-scalable, parallel systems. [Doctoral Dissertation]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/51682
Virginia Tech
21.
Elteir, Marwa Khamis.
A MapReduce Framework for Heterogeneous Computing Architectures.
Degree: PhD, Computer Science, 2012, Virginia Tech
URL: http://hdl.handle.net/10919/28786
► Nowadays, an increasing number of computational systems are equipped with heterogeneous compute resources, i.e., following different architecture. This applies to the level of a single…
(more)
▼ Nowadays, an increasing number of computational systems are equipped with heterogeneous compute resources, i.e., following different architecture. This applies to the level of a single chip, a single node and even supercomputers and large-scale clusters. With its impressive price-to-performance ratio as well as power efficiently compared to traditional multicore processors, graphics processing units (GPUs) has become an integrated part of these systems. GPUs deliver high peak performance; however efficiently exploiting their computational power requires the exploration of a multi-dimensional space of optimization methodologies, which is challenging even for the well-trained expert. The complexity of this multi-dimensional space arises not only from the traditionally well known but arduous task of architecture-aware GPU optimization at design and compile time, but it also arises in the partitioning and scheduling of the computation across these heterogeneous resources. Even with programming models like the Compute Unified Device Architecture (CUDA) and Open Computing Language (OpenCL), the developer still needs to manage the data transfer be- tween host and device and vice versa, orchestrate the execution of several kernels, and more arduously, optimize the kernel code.
In this dissertation, we aim to deliver a transparent parallel programming environment for heterogeneous resources by leveraging the power of the MapReduce programming model and OpenCL programming language. We propose a portable architecture-aware framework that efficiently runs an application across heterogeneous resources, specifically AMD GPUs and NVIDIA GPUs, while hiding complex architectural details from the developer. To further enhance performance portability, we explore approaches for asynchronously and efficiently distributing the computations across heterogeneous resources. When applied to benchmarks and representative applications, our proposed framework significantly enhances performance, including up to 58% improvement over traditional approaches to task assignment and up to a 45-fold improvement over state-of-the-art MapReduce implementations.
Advisors/Committee Members: Feng, Wu-chun (committeechair), Butt, Ali R. (committee member), Tilevich, Eli (committee member), Xiaosong, Mam (committee member), Lin, Heshan (committeecochair).
Subjects/Keywords: Atomics; Graphics Processing Units; Programming Models; Heterogeneous Computing; MapReduce
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APA (6th Edition):
Elteir, M. K. (2012). A MapReduce Framework for Heterogeneous Computing Architectures. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/28786
Chicago Manual of Style (16th Edition):
Elteir, Marwa Khamis. “A MapReduce Framework for Heterogeneous Computing Architectures.” 2012. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/28786.
MLA Handbook (7th Edition):
Elteir, Marwa Khamis. “A MapReduce Framework for Heterogeneous Computing Architectures.” 2012. Web. 22 Apr 2021.
Vancouver:
Elteir MK. A MapReduce Framework for Heterogeneous Computing Architectures. [Internet] [Doctoral dissertation]. Virginia Tech; 2012. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/28786.
Council of Science Editors:
Elteir MK. A MapReduce Framework for Heterogeneous Computing Architectures. [Doctoral Dissertation]. Virginia Tech; 2012. Available from: http://hdl.handle.net/10919/28786
22.
Anwar, Ali.
Towards Efficient and Flexible Object Storage Using Resource and Functional Partitioning.
Degree: PhD, Computer Science and Applications, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/83508
► Modern storage systems are designed to manage data without considering the dynamicity of user or resource requirements. This design approach does not consider the complexities…
(more)
▼ Modern storage systems are designed to manage data without considering the dynamicity of user or resource requirements. This design approach does not consider the complexities of the dynamically changing runtime application behaviors as well as the unique features of underlying resources. To this end, this dissertation studies how resource and functional partitioning strategies can improve efficiency and flexibility of object stores. This dissertation presents a series of practical and efficient techniques, algorithms, and optimizations to realize efficient and flexible object stores. The experimental evaluation demonstrates the effectiveness of our design choices and strategies to make object stores flexible and resource-aware.
Advisors/Committee Members: Butt, Ali R. (committeechair), Tilevich, Eli (committee member), Kafura, Dennis G. (committee member), Nikolopoulos, Dimitrios S. (committee member), Yao, Danfeng (Daphne) (committee member).
Subjects/Keywords: Object Stores; Key-Value Stores; Flexibility; Efficiency
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APA (6th Edition):
Anwar, A. (2018). Towards Efficient and Flexible Object Storage Using Resource and Functional Partitioning. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/83508
Chicago Manual of Style (16th Edition):
Anwar, Ali. “Towards Efficient and Flexible Object Storage Using Resource and Functional Partitioning.” 2018. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/83508.
MLA Handbook (7th Edition):
Anwar, Ali. “Towards Efficient and Flexible Object Storage Using Resource and Functional Partitioning.” 2018. Web. 22 Apr 2021.
Vancouver:
Anwar A. Towards Efficient and Flexible Object Storage Using Resource and Functional Partitioning. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/83508.
Council of Science Editors:
Anwar A. Towards Efficient and Flexible Object Storage Using Resource and Functional Partitioning. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/83508
Virginia Tech
23.
Chang, Tyler Hunter.
Mathematical Software for Multiobjective Optimization Problems.
Degree: PhD, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/98915
► Science and engineering are full of multiobjective tradeoff problems. For example, a portfolio manager may seek to build a financial portfolio with low risk, high…
(more)
▼ Science and engineering are full of multiobjective tradeoff problems. For example, a portfolio manager may seek to build a financial portfolio with low risk, high return rates, and minimal transaction fees; an aircraft engineer may seek a design that maximizes lift, minimizes drag force, and minimizes aircraft weight; a chemist may seek a catalyst with low viscosity, low production costs, and high effective yield; or a computational scientist may seek to fit a numerical model that minimizes the fit error while also minimizing a regularization term that leverages domain knowledge. Often, these criteria are conflicting, meaning that improved performance by one criterion must be at the expense of decreased performance in another criterion. The solution to a multiobjective optimization problem allows decision makers to balance the inherent tradeoff between conflicting objectives. A related problem is the multivariate interpolation problem, where the goal is to predict the outcome of an event based on a database of past observations, while exactly matching all observations in that database. Multivariate interpolation problems are equally as prevalent and impactful as multiobjective optimization problems. For example, a pharmaceutical company may seek a prediction for the costs and effects of a proposed drug; an aerospace engineer may seek a prediction for the lift and drag of a new aircraft design; or a search engine may seek a prediction for the classification of an unlabeled image. Delaunay interpolation offers a unique solution to this problem, backed by decades of rigorous theory and analytical error bounds, but does not scale to high-dimensional "big data" problems. In this thesis, novel algorithms and software are proposed for solving both of these extremely difficult problems.
Advisors/Committee Members: Watson, Layne T. (committeechair), Trosset, Michael W. (committee member), Butt, Ali R. (committee member), Beattie, Christopher A. (committee member), Raghvendra, Sharath (committee member).
Subjects/Keywords: multiobjective optimization; multivariate interpolation; Delaunay triangulations; mathematical software; numerical algorithms
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APA (6th Edition):
Chang, T. H. (2020). Mathematical Software for Multiobjective Optimization Problems. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/98915
Chicago Manual of Style (16th Edition):
Chang, Tyler Hunter. “Mathematical Software for Multiobjective Optimization Problems.” 2020. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/98915.
MLA Handbook (7th Edition):
Chang, Tyler Hunter. “Mathematical Software for Multiobjective Optimization Problems.” 2020. Web. 22 Apr 2021.
Vancouver:
Chang TH. Mathematical Software for Multiobjective Optimization Problems. [Internet] [Doctoral dissertation]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/98915.
Council of Science Editors:
Chang TH. Mathematical Software for Multiobjective Optimization Problems. [Doctoral Dissertation]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/98915
24.
Cheng, Yue.
Workload-aware Efficient Storage Systems.
Degree: PhD, Computer Science and Applications, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/78677
► The growing disparity in data storage and retrieval needs of modern applications is driving the proliferation of a wide variety of storage systems (e.g., key-value…
(more)
▼ The growing disparity in data storage and retrieval needs of modern
applications is driving the proliferation of a wide variety of
storage systems (e.g., key-value stores, cloud storage services,
distributed filesystems, and flash cache, etc.). While extant storage
systems are designed and tuned for a specific set of applications
targeting a range of workload characteristics, they lack the
flexibility in adapting to the ever-changing workload behaviors.
Moreover, the complexities in implementing modern storage systems and
adapting ever-changing storage requirements present unique
opportunities and engineering challenges.
In this dissertation, we design and develop a series of novel data
management and storage systems solutions by applying a simple yet
effective rule – workload awareness. We find that simple
workload-aware data management strategies are effective in improving
the efficiency of modern storage systems, sometimes by an order of
magnitude. The first two works tackle the data management and
storage space allocation issues at distributed and cloud storage
level, while the third work focuses on low-level data management
problems in the local storage system, which many high-level
storage/data-intensive applications rely on.
In the first part of this dissertation (Chapter~ref{ch:mbal}), we
propose and develop MBal, a high-performance in-memory object caching
framework with adaptive multi-phase load balancing, which supports
not only horizontal (scale-out) but vertical (scale-up) scalability
as well. MBal is able to make efficient use of available resources in
the cloud through its fine-grained, partitioned, lockless design.
In the second part of this dissertation (Chapter~ref{ch:cast} and
Chapter~ref{ch:pricing}), we design and build CAST
(Chapter~ref{ch:cast}), a Cloud Analytics Storage Tiering solution
that cloud tenants can use to reduce monetary cost and improve
performance of analytics workloads. The approach takes the first step
towards providing storage tiering support for data analytics in the
cloud. Furthermore, we propose a hybrid cloud object storage system
(Chapter~ref{ch:pricing}) that could effectively engage both the
cloud service providers and cloud tenants via a novel dynamic pricing
mechanism. In the third part of this dissertation (Chapter~ref{ch:offline}),
targeting local storage, we explore offline algorithms for flash
caching in terms of both hit ratio and flash lifespan. We design and
implement a multi-stage heuristic by synthesizing several techniques
that manage data at the granularity of a flash erasure unit (which we
call a container) to approximate the offline optimal algorithm. In
the fourth part of this dissertation (Chapter~ref{ch:turnkey}), we
are focused on how to enable fast prototyping of efficient
distributed key-value stores targeting a proxy-based layered
architecture. In this work, we design and build {con}, a framework
that significantly reduce the engineering effort required to build a
full-fledged distributed key-value store.
Our dissertation shows that simple…
Advisors/Committee Members: Butt, Ali R. (committeechair), Gupta, Aayush (committee member), Cameron, Kirk W. (committee member), Ribbens, Calvin J. (committee member), Tilevich, Eli (committee member).
Subjects/Keywords: Storage Systems; Cloud Computing; Data Management; Key-Value Stores; Object Stores; Flash SSDs; Efficiency; Flexibility
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Manager
APA (6th Edition):
Cheng, Y. (2017). Workload-aware Efficient Storage Systems. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78677
Chicago Manual of Style (16th Edition):
Cheng, Yue. “Workload-aware Efficient Storage Systems.” 2017. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/78677.
MLA Handbook (7th Edition):
Cheng, Yue. “Workload-aware Efficient Storage Systems.” 2017. Web. 22 Apr 2021.
Vancouver:
Cheng Y. Workload-aware Efficient Storage Systems. [Internet] [Doctoral dissertation]. Virginia Tech; 2017. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/78677.
Council of Science Editors:
Cheng Y. Workload-aware Efficient Storage Systems. [Doctoral Dissertation]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/78677
25.
Li, Bo.
Modeling and Runtime Systems for Coordinated Power-Performance Management.
Degree: PhD, Computer Science and Applications, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/87064
► System efficiency on high-performance computing (HPC) systems is the key to achieving the goal of power budget for exascale supercomputers. Techniques for adjusting the performance…
(more)
▼ System efficiency on high-performance computing (HPC) systems is the key to achieving the goal of power budget for exascale supercomputers. Techniques for adjusting the performance of different system components can help accomplish this goal by dynamically controlling system performance according to application behaviors. In this dissertation, we focus on three techniques: adjusting CPU performance, memory performance, and the number of threads for running parallel applications. First, we profile the performance and energy consumption of different HPC applications on both Intel systems with accelerators and IBM BG/Q systems. We explore the trade-offs of performance and energy under these techniques and provide optimization insights. Furthermore, we propose a parallel performance model that can accurately capture the impact of these techniques on performance in terms of job completion time. We present an approximation approach for performance prediction. The approximation has up to 7% and 17% prediction error on Intel x86 and IBM BG/Q systems respectively under 19 HPC applications. Thereafter, we apply the performance model in a runtime system design for improving performance under a given power budget. Our runtime strategy achieves up to 20% performance improvement to the baseline method.
Advisors/Committee Members: Cameron, Kirk W. (committeechair), Butt, Ali R. (committee member), Lee, Dongyoon (committee member), Leon, Edgar A. (committee member), Back, Godmar Volker (committee member).
Subjects/Keywords: Parallel Performance Modeling; Dynamic Voltage and Frequency Scaling; Dynamic Memory Throttling; Dynamic Concurrency Throttling; Shared-Memory Systems
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APA (6th Edition):
Li, B. (2019). Modeling and Runtime Systems for Coordinated Power-Performance Management. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/87064
Chicago Manual of Style (16th Edition):
Li, Bo. “Modeling and Runtime Systems for Coordinated Power-Performance Management.” 2019. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/87064.
MLA Handbook (7th Edition):
Li, Bo. “Modeling and Runtime Systems for Coordinated Power-Performance Management.” 2019. Web. 22 Apr 2021.
Vancouver:
Li B. Modeling and Runtime Systems for Coordinated Power-Performance Management. [Internet] [Doctoral dissertation]. Virginia Tech; 2019. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/87064.
Council of Science Editors:
Li B. Modeling and Runtime Systems for Coordinated Power-Performance Management. [Doctoral Dissertation]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/87064
Virginia Tech
26.
Davis, James Collins.
On the Impact and Defeat of Regular Expression Denial of Service.
Degree: PhD, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/98593
► Software commonly performs pattern-matching tasks on strings. For example, when validating input in a Web form, software commonly tests whether an input fits the pattern…
(more)
▼ Software commonly performs pattern-matching tasks on strings. For example, when validating input in a Web form, software commonly tests whether an input fits the pattern of a credit card number or an email address. Software engineers often implement such string-based pattern matching using a tool called regular expressions (regexes). Regexes permit software engineers to succinctly describe the sequences of characters that make up common "languages" like the set of valid Visa credit card numbers (16 digits, starting with a 4) or the set of valid emails (some characters, an '@', and more characters including at least one'.'). Using regexes on untrusted user input in this manner may be a dangerous decision because some regexes take a long time to evaluate. These slow regexes can be exploited by attackers in order to carry out a denial of service attack known as Regular expression Denial of Service (ReDoS). To date, ReDoS has led to outages affecting hundreds of websites and tens of thousands of users.
While the risk of ReDoS is well known in theory, in this dissertation I present the first large-scale empirical studies measuring the extent to which slow regular expressions are used in practice. I found that about 10% of real regular expressions extracted from hundreds of thousands of software projects can exhibit longer-than-expected worst-case behavior in popular programming languages including JavaScript, Python, and Ruby. Motivated by these findings, I then consider a range of ReDoS solution approaches: application refactoring, regex engine replacement, regex engine optimization, and resource caps. I report that application refactoring is error-prone, and that regex engine replacement seems unlikely due to incompatibilities between regex engines. Some resource caps are more successful than others, but all resource cap approaches struggle with adoption. My novel regex engine optimizations seem the most promising approach for protecting existing regex engines, offering significant time reductions with acceptable space overheads.
Advisors/Committee Members: Lee, Dongyoon (committeechair), Servant Cortes, Francisco Javier (committee member), Butt, Ali R. (committee member), Yao, Danfeng (Daphne) (committee member), Godefroid, Patrice (committee member).
Subjects/Keywords: Regular expressions; denial of service; ReDoS; empirical software engineering; software security
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Manager
APA (6th Edition):
Davis, J. C. (2020). On the Impact and Defeat of Regular Expression Denial of Service. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/98593
Chicago Manual of Style (16th Edition):
Davis, James Collins. “On the Impact and Defeat of Regular Expression Denial of Service.” 2020. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/98593.
MLA Handbook (7th Edition):
Davis, James Collins. “On the Impact and Defeat of Regular Expression Denial of Service.” 2020. Web. 22 Apr 2021.
Vancouver:
Davis JC. On the Impact and Defeat of Regular Expression Denial of Service. [Internet] [Doctoral dissertation]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/98593.
Council of Science Editors:
Davis JC. On the Impact and Defeat of Regular Expression Denial of Service. [Doctoral Dissertation]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/98593
Virginia Tech
27.
Hsu, Alexander Sirui.
Automatic Internet of Things Device Category Identification using Traffic Rates.
Degree: MS, Computer Science and Applications, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/88421
► IoT (Internet of Things) devices are an exploding field, with many devices being created, manufactured, and utilized per year. With the rise of so many…
(more)
▼ IoT (Internet of Things) devices are an exploding field, with many devices being created, manufactured, and utilized per year. With the rise of so many internet capable devices, there is a risk that the devices may have vulnerabilities and exploits able to allow unauthorized users to access. While a problem for a consumer network, this is an increased problem in an enterprise network, since much of the information on the network is sensitive and should be kept confidential and private. While a ban of IoT devices on a network is able to solve this problem, with the rise of machine learning able to characterize and recognize patterns, a smarter approach can be created to distinguish when and which types of IoT devices enter the network. Previous attempts to identify IoT devices used signature schemes specific to a single device, but this paper aims to generalize traffic behaviors and identifying a device category rather than a specific IoT device to ensure future new devices can also be recognized. With device category identification in place on an internet network, smarter approaches can be implemented to ensure the devices remain secure while still able to be used.
Advisors/Committee Members: Tront, Joseph G. (committeechair), Butt, Ali R. (committee member), Raymond, David Richard (committee member), Wang, Gang (committee member).
Subjects/Keywords: Machine Learning; IoT; Smart Devices; Network Traffic
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Manager
APA (6th Edition):
Hsu, A. S. (2019). Automatic Internet of Things Device Category Identification using Traffic Rates. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/88421
Chicago Manual of Style (16th Edition):
Hsu, Alexander Sirui. “Automatic Internet of Things Device Category Identification using Traffic Rates.” 2019. Masters Thesis, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/88421.
MLA Handbook (7th Edition):
Hsu, Alexander Sirui. “Automatic Internet of Things Device Category Identification using Traffic Rates.” 2019. Web. 22 Apr 2021.
Vancouver:
Hsu AS. Automatic Internet of Things Device Category Identification using Traffic Rates. [Internet] [Masters thesis]. Virginia Tech; 2019. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/88421.
Council of Science Editors:
Hsu AS. Automatic Internet of Things Device Category Identification using Traffic Rates. [Masters Thesis]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/88421
Virginia Tech
28.
Adhinarayanan, Vignesh.
Models and Techniques for Green High-Performance Computing.
Degree: PhD, Computer Science and Applications, 2020, Virginia Tech
URL: http://hdl.handle.net/10919/98660
► Past research in green high-performance computing (HPC) mostly focused on managing the power consumed by general-purpose processors, known as central processing units (CPUs) and to…
(more)
▼ Past research in green high-performance computing (HPC) mostly focused on managing the power consumed by general-purpose processors, known as central processing units (CPUs) and to a lesser extent, memory. In this dissertation, we study two increasingly important components: interconnects (predominantly focused on those inside a chip, but not limited to them) and graphics processing units (GPUs). Our contributions in this dissertation include a set of innovative measurement techniques to estimate the power consumed by the target components, statistical and analytical approaches to develop power models and their optimizations, and algorithms to manage power statically and at runtime. Experimental results show that it is possible to build models of sufficient accuracy and apply them for intelligently managing power on multiple levels of the system hierarchy: chip interconnect at the micro-level, heterogeneous nodes at the meso-level, and a supercomputing cluster at the macro-level.
Advisors/Committee Members: Feng, Wu-Chun (committeechair), Butt, Ali R. (committee member), Gardner, Mark K. (committee member), Tilevich, Eli (committee member), Pakin, Scott (committee member).
Subjects/Keywords: Keywords: Green Supercomputing; Power Modeling; Power Management; DVFS; Phase Prediction; Heterogeneity; GPUs; Data Movement; On-chip Interconnects; In-situ Techniques
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APA (6th Edition):
Adhinarayanan, V. (2020). Models and Techniques for Green High-Performance Computing. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/98660
Chicago Manual of Style (16th Edition):
Adhinarayanan, Vignesh. “Models and Techniques for Green High-Performance Computing.” 2020. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/98660.
MLA Handbook (7th Edition):
Adhinarayanan, Vignesh. “Models and Techniques for Green High-Performance Computing.” 2020. Web. 22 Apr 2021.
Vancouver:
Adhinarayanan V. Models and Techniques for Green High-Performance Computing. [Internet] [Doctoral dissertation]. Virginia Tech; 2020. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/98660.
Council of Science Editors:
Adhinarayanan V. Models and Techniques for Green High-Performance Computing. [Doctoral Dissertation]. Virginia Tech; 2020. Available from: http://hdl.handle.net/10919/98660
Virginia Tech
29.
Yu, Xiaodong.
Algorithms and Frameworks for Accelerating Security Applications on HPC Platforms.
Degree: PhD, Computer Science and Applications, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/93510
► Typical cybersecurity solutions emphasize on achieving defense functionalities. However, execution efficiency and scalability are equally important, especially for the real-world deployment. Straightforward mappings of applications…
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▼ Typical cybersecurity solutions emphasize on achieving defense functionalities. However, execution efficiency and scalability are equally important, especially for the real-world deployment. Straightforward mappings of applications onto High-Performance Computing (HPC) platforms may significantly underutilize the HPC devices’ capacities. In this dissertation, we demonstrate how application-specific characteristics can be leveraged to optimize various types of HPC executions for cybersecurity. We investigate several sub-areas, including mobile software security, network security, and system security. For example, we present a new GPU-assisted framework and a collection of optimization strategies for fast Android static data-flow analysis that achieve up to 128X speedups against the unoptimized GPU implementation. For network intrusion detection systems (IDS), we design and implement an algorithm capable of eliminating the state explosion in out-of-order packet situations, which reduces up to 400X of the memory overhead. We also present tools for improving the usability of HPC programming. To study the cache configurations’ impact on time-driven cache side-channel attacks’ performance, we design an approach to conducting comparative measurement. We propose a quantifiable success rate metric to measure the performance of time-driven cache attacks and utilize the GEM5 platform to emulate the configurable cache.
Advisors/Committee Members: Yao, Danfeng (Daphne) (committeechair), Ou, Xinming (committee member), Butt, Ali R. (committee member), Becchi, Michela (committee member), Hicks, Matthew (committee member).
Subjects/Keywords: Cybersecurity; HPC; GPU; Intrusion Detection; Automata Processor; Android Program Analysis; Cache Side-Channel Attack
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Record Details
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Yu, X. (2019). Algorithms and Frameworks for Accelerating Security Applications on HPC Platforms. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/93510
Chicago Manual of Style (16th Edition):
Yu, Xiaodong. “Algorithms and Frameworks for Accelerating Security Applications on HPC Platforms.” 2019. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/93510.
MLA Handbook (7th Edition):
Yu, Xiaodong. “Algorithms and Frameworks for Accelerating Security Applications on HPC Platforms.” 2019. Web. 22 Apr 2021.
Vancouver:
Yu X. Algorithms and Frameworks for Accelerating Security Applications on HPC Platforms. [Internet] [Doctoral dissertation]. Virginia Tech; 2019. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/93510.
Council of Science Editors:
Yu X. Algorithms and Frameworks for Accelerating Security Applications on HPC Platforms. [Doctoral Dissertation]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/93510
Virginia Tech
30.
Scogland, Thomas R.
Runtime Adaptation for Autonomic Heterogeneous Computing.
Degree: PhD, Computer Science and Applications, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/71315
► Heterogeneity is increasing across all levels of computing, with the rise of accelerators such as GPUs, FPGAs, and other coprocessors into everything from cell phones…
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▼ Heterogeneity is increasing across all levels of computing, with the rise of accelerators such as GPUs, FPGAs, and other coprocessors into everything from cell phones to supercomputers. More quietly it is increasing with the rise of NUMA systems, hierarchical caching, OS noise, and a myriad of other factors. As heterogeneity becomes a fact of life, efficiently managing heterogeneous compute resources is becoming a critical, and ever more complex, task. The focus of this dissertation is to lay the foundation for an autonomic system for heterogeneous computing, employing runtime adaptation to improve performance portability and performance consistency while maintaining or increasing programmability. We investigate heterogeneity arising from a myriad of factors, grouped into the dimensions of locality and capability. This work has resulted in runtime schedulers capable of automatically detecting and mitigating heterogeneity in physically homogeneous systems through MPI and adaptive coscheduling for physically heterogeneous accelerator based systems as well as a synthesis of the two to address multiple levels of heterogeneity as a coherent whole. We also discuss our current work towards the next generation of fine-grained scheduling and synchronization across heterogeneous platforms in the design of a highly-scalable and portable concurrent queue for many-core systems. Each component addresses aspects of the urgent need for automated management of the extreme and ever expanding complexity introduced by heterogeneity.
Advisors/Committee Members: Feng, Wu-Chun (committeechair), Cao, Yong (committee member), de Supinski, Bronis R. (committee member), Balaji, Pavan (committee member), Butt, Ali R. (committee member).
Subjects/Keywords: Scheduling; Graphics Processing Unit (GPU); OpenMP
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Record Details
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❌
APA ·
Chicago ·
MLA ·
Vancouver ·
CSE |
Export
to Zotero / EndNote / Reference
Manager
APA (6th Edition):
Scogland, T. R. (2014). Runtime Adaptation for Autonomic Heterogeneous Computing. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/71315
Chicago Manual of Style (16th Edition):
Scogland, Thomas R. “Runtime Adaptation for Autonomic Heterogeneous Computing.” 2014. Doctoral Dissertation, Virginia Tech. Accessed April 22, 2021.
http://hdl.handle.net/10919/71315.
MLA Handbook (7th Edition):
Scogland, Thomas R. “Runtime Adaptation for Autonomic Heterogeneous Computing.” 2014. Web. 22 Apr 2021.
Vancouver:
Scogland TR. Runtime Adaptation for Autonomic Heterogeneous Computing. [Internet] [Doctoral dissertation]. Virginia Tech; 2014. [cited 2021 Apr 22].
Available from: http://hdl.handle.net/10919/71315.
Council of Science Editors:
Scogland TR. Runtime Adaptation for Autonomic Heterogeneous Computing. [Doctoral Dissertation]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/71315
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Open Access Theses and Dissertations
