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Virginia Tech
1.
Rashidi Mehrabadi, Niloofar.
On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling.
Degree: MS, Electrical and Computer Engineering, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/50524 
► This thesis provides insight into quantitative accuracy assessment of the modeling and simulation of power electronic converters. Verification, Validation, and Uncertainty quantification (VVandUQ) provides a…
(more)
▼ This thesis provides insight into quantitative accuracy assessment of the modeling and simulation of power electronic converters. Verification, Validation, and Uncertainty quantification (VVandUQ) provides a means to quantify the disagreement between computational simulation results and experimental results in order to have quantitative comparisons instead of qualitative comparisons. Due to the broad applications of modeling and simulation in power electronics, VVandUQ is used to evaluate the credibility of modeling and simulation results. The topic of VVandUQ needs to be studied exclusively for power electronic converters. To carry out this work, the formal procedure for VVandUQ of power electronic converters is presented. The definition of the fundamental words in the proposed framework is also provided.
The accuracy of the switching model of a three-phase Voltage Source Inverter (VSI) is quantitatively assessed following the proposed procedure. Accordingly, this thesis describes the hardware design and development of the switching model of the three-phase VSI.
Advisors/Committee Members: Boroyevich, Dushan (committeechair), Burgos, Rolando (committeechair), Roy, Christopher John (committee member).
Subjects/Keywords: power electronic converters; Uncertainty Quantification (UQ); modeling and simulation
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APA (6th Edition):
Rashidi Mehrabadi, N. (2014). On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/50524
Chicago Manual of Style (16th Edition):
Rashidi Mehrabadi, Niloofar. “On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling.” 2014. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/50524.
MLA Handbook (7th Edition):
Rashidi Mehrabadi, Niloofar. “On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling.” 2014. Web. 16 Sep 2019.
Vancouver:
Rashidi Mehrabadi N. On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/50524.
Council of Science Editors:
Rashidi Mehrabadi N. On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/50524
Virginia Tech
2.
Zhou, Bo.
D-q impedance identification in three phase systems using multi-tone perturbation.
Degree: MS, Electrical and Computer Engineering, 2013, Virginia Tech
URL: http://hdl.handle.net/10919/50924
► In electric power systems, the existence of constant power loads such as output-regulated power converters may bring instability problem to AC or DC distributed systems.…
(more)
▼ In electric power systems, the existence of constant power loads such as output-regulated power converters may bring instability problem to AC or DC distributed systems. Impedance based stability criteria has been proven a good tool for small-signal stability analysis. This works focuses on the developing of a comprehensive software tool which can extract DC or three phase AC impedances, and apply stability analysis. An algorithm is designed to select FFT window and adjust perturbation frequencies. This feature enables the software to accurately measure impedances even in existence of system line harmonics. Furthermore, multi-tone approach is developed to improve simulation time. The complete software tool is tested with simulation models and experiment results, to show the effectiveness. When multi-tone approach is applied on nonlinear loads, it gives incorrect results. The reason is that perturbation frequency will have overlapping with side-band harmonics. An algorithm is designed to avoid this problem. The algorithm is tested with 12-pulse diode rectifier simulation model, and 6-pulse diode rectifier simulation model and experimental test bed. Both simulation and experiment results verifies the concept.
Advisors/Committee Members: Mattavelli, Paolo (committeechair), Boroyevich, Dushan (committeechair), Burgos, Rolando (committee member).
Subjects/Keywords: d-q impedance; multi-tone; diode bridge rectifier
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APA (6th Edition):
Zhou, B. (2013). D-q impedance identification in three phase systems using multi-tone perturbation. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/50924
Chicago Manual of Style (16th Edition):
Zhou, Bo. “D-q impedance identification in three phase systems using multi-tone perturbation.” 2013. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/50924.
MLA Handbook (7th Edition):
Zhou, Bo. “D-q impedance identification in three phase systems using multi-tone perturbation.” 2013. Web. 16 Sep 2019.
Vancouver:
Zhou B. D-q impedance identification in three phase systems using multi-tone perturbation. [Internet] [Masters thesis]. Virginia Tech; 2013. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/50924.
Council of Science Editors:
Zhou B. D-q impedance identification in three phase systems using multi-tone perturbation. [Masters Thesis]. Virginia Tech; 2013. Available from: http://hdl.handle.net/10919/50924
Virginia Tech
3.
DiMarino, Christina Marie.
High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors.
Degree: MS, Electrical and Computer Engineering, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/78116
► This thesis provides insight into state-of-the-art 1.2 kV silicon carbide (SiC) power semiconductor transistors, including the MOSFET, BJT, SJT, and normally-on and normally-off JFETs. Both…
(more)
▼ This thesis provides insight into state-of-the-art 1.2 kV silicon carbide (SiC) power semiconductor transistors, including the MOSFET, BJT, SJT, and normally-on and normally-off JFETs. Both commercial and sample devices from the semiconductor industry's well-known manufacturers were evaluated in this study. These manufacturers include: Cree Inc., ROHM Semiconductor, General Electric, Fairchild Semiconductor, GeneSiC Semiconductor, Infineon Technologies, and SemiSouth Laboratories. To carry out this work, static characterization of each device was performed from 25 ºC to 200 ºC. Dynamic characterization was also conducted through double-pulse tests. Accordingly, this thesis describes the experimental setup used and the different measurements conducted, which comprise: threshold voltage, transconductance, current gain, specific on-resistance, parasitic capacitances, internal gate resistance, and the turn on and turn off switching times and energies. For the latter, the driving method used for each device is described in detail. Furthermore, for the devices that require on-state dc currents, driving losses are taken into consideration. While all of the SiC transistors characterized in this thesis demonstrated low specific on-resistances, the SiC BJT showed the lowest, with Fairchild's FSICBH057A120 SiC BJT having 3.6 mΩ•cm2 (using die area) at 25 ºC. However, the on-resistance of GE's SiC MOSFET proved to have the smallest temperature dependency, increasing by only 59 % from 25 ºC to 200 ºC. From the dynamic characterization, it was shown that Cree's C2M0080120D second generation SiC MOSFET achieved dv/dt rates of 57 V/ns. The SiC MOSFETs also featured low turn off switching energy losses, which were typically less than 70 µJ at 600 V bus voltage and 20 A load current.
Advisors/Committee Members: Guido, Louis (committee member), Burgos, Rolando (committeecochair), Boroyevich, Dushan (committeecochair).
Subjects/Keywords: power semiconductor devices; SiC MOSFET; SiC BJT; SiC JFET; high temperature; characterization; silicon carbide
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APA (6th Edition):
DiMarino, C. M. (2014). High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78116
Chicago Manual of Style (16th Edition):
DiMarino, Christina Marie. “High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors.” 2014. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78116.
MLA Handbook (7th Edition):
DiMarino, Christina Marie. “High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors.” 2014. Web. 16 Sep 2019.
Vancouver:
DiMarino CM. High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78116.
Council of Science Editors:
DiMarino CM. High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/78116
Virginia Tech
4.
Wang, Qiong.
Design of Extreme Efficiency Active Rectifier for More-electric Aircrafts.
Degree: MS, Electrical and Computer Engineering, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/78147
► The More-electric aircraft (MEA) concept has been raised since 1990s in order to increase fuel economy and reduce environmental impact of aircrafts. The fundamental of…
(more)
▼ The More-electric aircraft (MEA) concept has been raised since 1990s in order to increase fuel economy and reduce environmental impact of aircrafts. The fundamental of the concept is to replace pneumatic, hydraulic and mechanical systems in conventional aircrafts with its electrical equivalent that is lighter and more reliable. In this movement, power electronics technology plays a key role in interfacing the new types of electrical loads to the new aircraft electrical power system. One of the major tasks for power electronics circuits in MEA is to transfer aircraft variable frequency AC voltage into DC voltage, which could be conveniently utilized by different types of loads or power buses. The converters carrying out the task is commonly known as "rectifiers". This work aims at designing and constructing rectifiers that can work efficiently and reliably in more-electric aircrafts.
One of the major challenge for these rectifiers comes from the complex aircraft environment. The ambient temperature could be as high as 70 ºC. Moreover, active cooling for converters may not be desirable. To deal with this, rectifiers should achieve extreme efficiency (especially at full load) so that all the components are not overheated without active cooling. This work aims at achieving extreme converter efficiency through advanced converter topologies and design. Both single-phase and three-phase rectifiers are discussed in this work.
For single-phase rectifiers, this work focused on boost-type power factor correction (PFC) converters due to the promising efficiency and good PFC characteristics. The well-known two-level semi-bridgeless PFC boost rectifier, together with its interleaved and three-level counterparts, are studied and compared in this work. The operation principles of the converters are analyzed. Models and methods for converter efficiency evaluation are discussed. The efficiency evaluation of the topologies shows the advantage of three-level topologies and interleaved topologies in achieving higher efficiency and better thermal management.
For three-phase rectifiers, two-level boost rectifier, three-level neutral point clamped (NPC) rectifier and Vienna rectifier are investigated. The evaluation shows the advantage of Vienna rectifier in achieving high efficiency due to reduced switching loss.
Based on the evaluation of single-phase and three-phase active rectifiers, the author selected interleaved Vienna rectifier to achieve extreme efficiency and avoid overheating problem. The operation principle of the interleaved Vienna rectifier is introduced, with particular attention paid to the circulating current generated by interleaving operation. The design procedure for achieving maximum efficiency is described. Finally, a prototype of the proposed converter is constructed, which achieves 99.26% efficiency at nominal load.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committee member), Li, Qiang (committee member).
Subjects/Keywords: High efficiency; more-electric aircrafts; PFC converter; interleaved converter; Vienna converter
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APA (6th Edition):
Wang, Q. (2015). Design of Extreme Efficiency Active Rectifier for More-electric Aircrafts. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78147
Chicago Manual of Style (16th Edition):
Wang, Qiong. “Design of Extreme Efficiency Active Rectifier for More-electric Aircrafts.” 2015. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78147.
MLA Handbook (7th Edition):
Wang, Qiong. “Design of Extreme Efficiency Active Rectifier for More-electric Aircrafts.” 2015. Web. 16 Sep 2019.
Vancouver:
Wang Q. Design of Extreme Efficiency Active Rectifier for More-electric Aircrafts. [Internet] [Masters thesis]. Virginia Tech; 2015. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78147.
Council of Science Editors:
Wang Q. Design of Extreme Efficiency Active Rectifier for More-electric Aircrafts. [Masters Thesis]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/78147
Virginia Tech
5.
Rankin, Paul Edward.
Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter.
Degree: MS, Electrical Engineering, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/93176
► As wide-bandgap devices continue to experience deeper penetration in commercial applications, there are still a number of factors which make the adoption of such technologies…
(more)
▼ As wide-bandgap devices continue to experience deeper penetration in commercial applications, there are still a number of factors which make the adoption of such technologies difficult. One of the most notable issues with the application of wide-bandgap technologies is meeting existing noise requirements and regulations. Due to the faster dv/dt and di/dt of SiC devices, more noise is generated in comparison to Si IGBTs. Therefore, in order to fully experience the benefits offered by this new technology, the noise must either be filtered or mitigated by other means.
A survey of various DC/DC topologies was conducted in order to find a candidate for a battery interface in a UPS system. A three-level NPC topology was explored for its potential benefit in terms of noise, efficiency, and additional features. This converter topology was modeled, simulated, and a hardware prototype constructed for evaluation within a UPS system, although its uses are not limited to such applications. A UPS system is a good example of an application with strict noise requirements which must be fulfilled according to IEC standards.
Based on a newly devised mode of operation, this converter was verified to produce no common-mode voltage under ideal conditions, and was able to provide a 6 dB reduction in common-mode voltage emissions in the UPS prototype. This was done while achieving a peak efficiency in excess of 99% with the ability to provide bidirectional power flow between the UPS and battery backup. The converter was verified to operate at the rated UPS conditions of 20 kW while converting between a total DC bus voltage of 800 V and a nominal battery voltage of 540 V.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committeechair), Lai, Jih S. (committee member).
Subjects/Keywords: Silicon Carbide; Common-Mode Voltage; Neutral Point Clamped Converter; EMI; DC/DC
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APA (6th Edition):
Rankin, P. E. (2019). Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/93176
Chicago Manual of Style (16th Edition):
Rankin, Paul Edward. “Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter.” 2019. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/93176.
MLA Handbook (7th Edition):
Rankin, Paul Edward. “Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter.” 2019. Web. 16 Sep 2019.
Vancouver:
Rankin PE. Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter. [Internet] [Masters thesis]. Virginia Tech; 2019. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/93176.
Council of Science Editors:
Rankin PE. Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter. [Masters Thesis]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/93176
6.
Li, Chi.
Design, Analysis and Experimental Evaluation of a Virtual Synchronous Machine Based Control Scheme for STATCOM Applications.
Degree: MS, Electrical and Computer Engineering, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/78158
► Because renewable energy sources are environment-friendly and inexhaustible, more and more renewable energy power plants have been integrated into power grids worldwide. To compensate for…
(more)
▼ Because renewable energy sources are environment-friendly and inexhaustible, more and more renewable energy power plants have been integrated into power grids worldwide. To compensate for their inherent variability, STATCOMs are typically installed at the point of common coupling (PCC) to help their operation by regulating the PCC voltage. However under different contingencies, PCC voltage fluctuations in magnitude and frequency may impede the STATCOM from tracking the grid frequency correctly, hence worsening its overall compensation performance, and putting at risk the operation of the power plant. Further, the virtual synchronous machine (VSM) concept has recently been introduced to control grid-connected inverters emulating the behavior of rotating synchronous machines, in an effort to eliminate the shortcomings of conventional d-q frame phase-locked loops (PLL).
In this dissertation, the VSM concept is extended by developing a STATCOM controller with it, which then behaves like a fully-adjustable synchronous condenser, including the adjustment of its "virtual" inertia and impedance. An average model in two D-Q frames is proposed to analyze the inherent dynamics of the VSM-based STATCOM controller with insight into impacts from the virtual parameters and a design guideline is then formulated. The proposed controller is compared against existent d-q frame STATCOM control strategies, evincing how the VSM-based approach guarantees an improved voltage regulation performance at the PCC by adjusting the phase of its compensating current during frequency fluctuations, in both simulation and experiment.
Secondly, the dynamics of the VSM-based STATCOM controller in large signal sense is studied, especially its capability to ride through faults. Analysis is carried out with phasors to obtain a fundamental understanding at first and followed by state space equations to predict the transients analytically, which is validated by matching both simulation and experiment. The effects of two outer loops are also reviewed and some possible solutions are suggested and evaluated. Moreover, the relationship between the virtual inertia and the actual inertia is established and the dc capacitor sizing is discussed in a possibly more economical way. The start-up process of a VSM-based STATCOM is presented to implement a practical prototype as well.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committee member), Mili, Lamine (committeecochair).
Subjects/Keywords: STATCOM; virtual synchronous machine; control
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APA (6th Edition):
Li, C. (2015). Design, Analysis and Experimental Evaluation of a Virtual Synchronous Machine Based Control Scheme for STATCOM Applications. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78158
Chicago Manual of Style (16th Edition):
Li, Chi. “Design, Analysis and Experimental Evaluation of a Virtual Synchronous Machine Based Control Scheme for STATCOM Applications.” 2015. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78158.
MLA Handbook (7th Edition):
Li, Chi. “Design, Analysis and Experimental Evaluation of a Virtual Synchronous Machine Based Control Scheme for STATCOM Applications.” 2015. Web. 16 Sep 2019.
Vancouver:
Li C. Design, Analysis and Experimental Evaluation of a Virtual Synchronous Machine Based Control Scheme for STATCOM Applications. [Internet] [Masters thesis]. Virginia Tech; 2015. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78158.
Council of Science Editors:
Li C. Design, Analysis and Experimental Evaluation of a Virtual Synchronous Machine Based Control Scheme for STATCOM Applications. [Masters Thesis]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/78158
Virginia Tech
7.
Liu, Zhengyang.
Characterization and Failure Mode Analysis of Cascode GaN HEMT.
Degree: MS, Electrical and Computer Engineering, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/49580
► Recent emerging gallium nitride (GaN) high electron mobility transistor (HEMT) is expected to be a promising candidate for high frequency power conversion techniques. Due to…
(more)
▼ Recent emerging gallium nitride (GaN) high electron mobility transistor (HEMT) is expected to be a promising candidate for high frequency power conversion techniques. Due to the advantages of the material, the GaN HEMT has a better figure of merit (FOM) compared to the state-of-the-art silicon (Si) power metal oxide silicon field effect transistor (MOSFET), which allows the GaN HEMT to switch with faster transition and lower switching loss. By applying the GaN HEMT in a circuit design, it is possible to achieve high frequency, high efficiency, and high density power conversion at the same time.
To characterize the switching performance of the GaN HEMT, an accurate behavior-level simulation model is developed in this thesis. The packaging related parasitic inductance, including both self-inductance and mutual-inductance, are extracted based on finite element analysis (FEA) methods. Then the accuracy of the simulation model is verified by a double-pulse tester, and the simulation results match well with experiment in terms of both device switching waveform and switching energy.
Based on the simulation model, detailed loss breakdown and loss mechanism analysis are made. The cascode GaN HEMT has high turn-on loss due to the body diode reverse recovery of the low voltage Si MOSFET and the common source inductance (CSI) of the package; while the turn-off loss is extremely small attributing to the cascode structure.
With this unique feature, the critical conduction mode (CRM) soft switching technique are applied to reduce the dominant turn on loss and increase converter efficiency significantly. The switching frequency is successfully pushed to 5MHz while maintaining high efficiency and good thermal performance.
Traditional packaging method is becoming a bottle neck to fully utilize the advantages of GaN HEMT. So an investigation of the package influence on the cascode GaN HEMT is also conducted. Several critical parasitic inductors are identified, which cause high turn on loss and high parasitic ringing which may lead to device failure. To solve the issue, the stack-die package is proposed to eliminate all critical parasitic inductors, and as a result, reducing turn on loss by half and avoiding potential failure mode of the cascode GaN device effectively.
Utilizing the proposed stack-die package and ZVS soft switching, the GaN HEMT high frequency, high efficiency, and high density power conversion capability can be further extended to a higher level.
Advisors/Committee Members: Lee, Fred C. (committeechair), Burgos, Rolando (committee member), Li, Qiang (committee member).
Subjects/Keywords: cascode GaN; simulation model; loss analysis; soft switching; stack-die package
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APA ·
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APA (6th Edition):
Liu, Z. (2014). Characterization and Failure Mode Analysis of Cascode GaN HEMT. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/49580
Chicago Manual of Style (16th Edition):
Liu, Zhengyang. “Characterization and Failure Mode Analysis of Cascode GaN HEMT.” 2014. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/49580.
MLA Handbook (7th Edition):
Liu, Zhengyang. “Characterization and Failure Mode Analysis of Cascode GaN HEMT.” 2014. Web. 16 Sep 2019.
Vancouver:
Liu Z. Characterization and Failure Mode Analysis of Cascode GaN HEMT. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/49580.
Council of Science Editors:
Liu Z. Characterization and Failure Mode Analysis of Cascode GaN HEMT. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/49580
Virginia Tech
8.
Najmi, Vahid.
Modeling, Control and Design Considerations for Modular Multilevel Converters.
Degree: MS, Electrical and Computer Engineering, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/53703
► This thesis provides insight into state-of-the-art Modular Multilevel Converters (MMC) for medium and high voltage applications. Modular Multilevel Converters have increased in interest in many…
(more)
▼ This thesis provides insight into state-of-the-art Modular Multilevel Converters (MMC) for medium and high voltage applications. Modular Multilevel Converters have increased in interest in many industrial applications, as they offer the following advantages: modularity, scalability, reliability, distributed location of capacitors, etc. In this study, the modeling, control and design considerations of modular based multilevel converters, with an emphasis on the reliability of the converter, is carried out. Both modular multilevel converters with half-bridge and full-bridge sub-modules are evaluated in order to provide a complete analysis of the converter. From among the family of modular based hybrid multilevel converters, the newly released Alternate Arm Converter (AAC) is considered for further assessment in this study. Thus, the modular multilevel converter with half-bridge and full-bridge power cells and the Alternate Arm Converter as a commercialized hybrid structure of this family are the main areas of study in this thesis. Finally, the DC fault analysis as one of the main issues related to conventional VSC converters is assessed for Modular Multilevel Converters (MMC) and the DC fault ride-through capability and DC fault current blocking ability is illustrated in both the Modular Multilevel Converter with Full-Bridge (FB) power cells and in the Alternate
iii
Arm Converter (AAC). Accordingly, the DC fault control scheme employed in the converter and the operation of the converter under the fault control scheme are explained.
The main contributions of this study are as follows: The new D-Q model for the MMC is proposed for use in the design of the inner and outer loop control. The extended control scheme from the modular multilevel converter is employed to control the Alternate Arm Converters. A practical reliability-oriented sub-module capacitor bank design is described based on different reliability modeling tools. A Zero Current Switching (ZCS) scheme of the Alternate Arm Converter is presented in order to reduce the switching losses of the Director Switches (DS) and, accordingly, to implement the ZCS, a design procedure for the Arm inductor in the AAC is proposed. The capacitor voltage waveform is extracted analytically in different load power factors and the waveforms are verified by simulation results. A reliability-oriented switching frequency analysis for the modular multilevel converters is carried out to evaluate the effect of the switching frequency on the MMC's operation. For the latter, a DC fault analysis for the MMC with Full-Bridge (FB) power cells and the AAC is performed and a DC fault control scheme is employed to provide the capacitor voltage control and DC fault current limit, and is illustrated herein.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committee member), Lai, Jih S. (committee member).
Subjects/Keywords: Modular Multilevel Converter (MMC); Alternate Arm Converter (AAC); DC Fault ride-through; Reliability-Oriented Design; Circulating Current Suppressing Control (CCSC); Capacitor Voltage Balance; Three- Phase Average Modeling; DQ axis Modeling
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APA ·
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APA (6th Edition):
Najmi, V. (2015). Modeling, Control and Design Considerations for Modular Multilevel Converters. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/53703
Chicago Manual of Style (16th Edition):
Najmi, Vahid. “Modeling, Control and Design Considerations for Modular Multilevel Converters.” 2015. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/53703.
MLA Handbook (7th Edition):
Najmi, Vahid. “Modeling, Control and Design Considerations for Modular Multilevel Converters.” 2015. Web. 16 Sep 2019.
Vancouver:
Najmi V. Modeling, Control and Design Considerations for Modular Multilevel Converters. [Internet] [Masters thesis]. Virginia Tech; 2015. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/53703.
Council of Science Editors:
Najmi V. Modeling, Control and Design Considerations for Modular Multilevel Converters. [Masters Thesis]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/53703
Virginia Tech
9.
Zhao, Shishuo.
High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC.
Degree: MS, Electrical and Computer Engineering, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/74969
► Modern data center power architecture developing trend is analyzed, efficiency improvement method is also discussed. Literature survey of high frequency isolated power conversion system which…
(more)
▼ Modern data center power architecture developing trend is analyzed, efficiency improvement method is also discussed. Literature survey of high frequency isolated power conversion system which is also called solid state transformer is given including application, topology, device and magnetic transformer. Then developing trend of this research area is clearly shown following by research target.
State of art wide band gap device including silicon carbide (SiC) and gallium nitride (GaN) devices are characterized and compared, final selection is made based on comparison result. Mostly used high frequency high power DC/DC converter topology dual active bridge (DAB) is introduced and compared with novel CLLC resonant converter in terms of switching loss and conduction loss point of view. CLLC holds ZVS capability over all load range and smaller turn off current value. This is beneficial for high frequency operation and taken as our candidate. Device loss breakdown of CLLC converter is also given in the end.
Medium voltage high frequency transformer is the key element in terms of insulation safety, power density and efficiency. Firstly, two mostly used transformer structures are compared. Then transformer insulation requirement is referred for 4160 V application according to IEEE standard. Solid insulation material are also compared and selected. Material thickness and insulation distance are also determined. Insulation capability is preliminary verified in FEA electric field simulation. Thirdly two transformer magnetic loss model are introduced including core loss model and litz wire winding loss model. Transformer turn number is determined based on core loss and winding loss trade-off. Different core loss density and working frequency impact is carefully analyzed. Different materials show their best performance among different frequency range. Transformer prototype is developed following designed parameter. We test the developed 15 kW 500 kHz transformer under 4160 V dry type transformer IEEE Std. C57.12.01 standard, including basic lightning test, applied voltage test, partial discharge test.
500 kHz 15 kW CLLC converter gate drive is our design challenge in terms of symmetry propagation delay, cross talk phenomenon elimination and shoot through protection. Gate drive IC is carefully selected to achieve symmetrical propagation delay and high common mode dv/dt immunity. Zero turn off resistor is achieved with minimized gate loop inductance to prevent cross talk phenomenon. Desaturation protection is also employed to provide shoot through protection. Finally 15 kW 500 kHz CLLC resonant converter is developed based on 4160V 500 kHz transformer and tested up to full power level with 98% peak efficiency.
Advisors/Committee Members: Li, Qiang (committeechair), Burgos, Rolando (committee member), Lee, Fred C. (committee member).
Subjects/Keywords: High frequency; medium voltage insulation; CLLC resonant converter; silicon carbide; gallium nitride; transformer design
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APA (6th Edition):
Zhao, S. (2017). High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/74969
Chicago Manual of Style (16th Edition):
Zhao, Shishuo. “High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC.” 2017. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/74969.
MLA Handbook (7th Edition):
Zhao, Shishuo. “High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC.” 2017. Web. 16 Sep 2019.
Vancouver:
Zhao S. High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC. [Internet] [Masters thesis]. Virginia Tech; 2017. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/74969.
Council of Science Editors:
Zhao S. High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC. [Masters Thesis]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/74969
Virginia Tech
10.
Yu, Jianghui.
DC Fault Current Analysis and Control for Modular Multilevel Converters.
Degree: MS, Electrical and Computer Engineering, 2016, Virginia Tech
URL: http://hdl.handle.net/10919/78054
► Recent research into industrial applications of electric power conversion shows an increase in the use of renewable energy sources and an increase in the need…
(more)
▼ Recent research into industrial applications of electric power conversion shows an increase in the use of renewable energy sources and an increase in the need for electric power by the loads. The Medium-Voltage DC (MVDC) concept can be an optimal solution. On the other hand, the Modular Multilevel Converter (MMC) is an attractive converter topology choice, as it has advantages such as excellent harmonic performance, distributed energy storage, and near ideal current and voltage scalability.
The fault response, on the other hand, is a big challenge for the MVDC distribution systems and the traditional MMCs with the Half-Bridge submodule configuration, especially when a DC short circuit fault happens. In this study, the fault current behavior is analyzed. An alternative submodule topology and a fault operation control are explored to achieve the fault current limiting capability of the converter.
A three-phase SiC-based MMC prototype with the Full-Bridge configuration is designed and built. The SiC devices can be readily adopted to take advantage of the wide-bandgap devices in MVDC applications. The Full-Bridge configuration provides additional control and energy storage capabilities. The full in-depth design, controls, and testing of the MMC prototype are presented, including among others: component selection, control algorithms, control hardware implementation, pre-charge and discharge circuits, and protection scheme.
Systematical tests are conducted to verify the function of the converter. The fault current behavior and the performance of the proposed control are verified by both simulation and experiment. Fast fault current clearing and fault ride-through capability are achieved.
Advisors/Committee Members: Burgos, Rolando (committeechair), Lai, Jih-Sheng (Jason) (committee member), Boroyevich, Dushan (committee member).
Subjects/Keywords: Medium-Voltage DC Distribution Systems; Fault Operation Control; Modular Multilevel Converters; Converter Design
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APA (6th Edition):
Yu, J. (2016). DC Fault Current Analysis and Control for Modular Multilevel Converters. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78054
Chicago Manual of Style (16th Edition):
Yu, Jianghui. “DC Fault Current Analysis and Control for Modular Multilevel Converters.” 2016. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78054.
MLA Handbook (7th Edition):
Yu, Jianghui. “DC Fault Current Analysis and Control for Modular Multilevel Converters.” 2016. Web. 16 Sep 2019.
Vancouver:
Yu J. DC Fault Current Analysis and Control for Modular Multilevel Converters. [Internet] [Masters thesis]. Virginia Tech; 2016. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78054.
Council of Science Editors:
Yu J. DC Fault Current Analysis and Control for Modular Multilevel Converters. [Masters Thesis]. Virginia Tech; 2016. Available from: http://hdl.handle.net/10919/78054
Virginia Tech
11.
Pierce, Timothy M. Jr.
Mobile Hybrid Power System Theory of Operation.
Degree: MS, Electrical and Computer Engineering, 2016, Virginia Tech
URL: http://hdl.handle.net/10919/78148
► Efficiency is a driving constraint for electrical power systems as global energy demands are ever increasing. Followed by the introduction of diesel generators, electricity has…
(more)
▼ Efficiency is a driving constraint for electrical power systems as global energy demands are ever increasing. Followed by the introduction of diesel generators, electricity has become available in more locations than ever. However, operating a diesel generator on its own is not the most energy efficient. This is because the high crest factor loads, of many applications, decrease the fuel efficiency of a hydrocarbon generator. To understand this, we need to understand how an electrical load affects a generator.
Starting with a load profile, a system designer must choose a generator to meet peak demand, marking the first instance where a load profile has influence over a generator. This decision will insure that brownouts do not occur, but, this will lead to poor energy efficiency. We say this because a generator is most energy efficient under heavier loads, meaning, during lighter loads, more fuel will be consumed to produce the same amount of energy.
While this may be fine if the peak load was close to the average load, however, the actual crest factor for a typical residential load profile is much higher. This gap between peak and average load means that a generator will spend most of its time operating at its most inefficient point. To compensate for this, and reduce fuel consumption, the Mechatronics Lab at
Virginia Tech has developed a mobile hybrid power system (MHPS) to address this problem. The solution was to augment a diesel generator with a battery pack. This allowed us to constrain the generator so that it only operates with fixed efficiency. It is the theory behind this system that will be covered in this thesis.
Advisors/Committee Members: Wicks, Alfred L. (committeechair), Burgos, Rolando (committee member), Southward, Steve (committee member).
Subjects/Keywords: power factor correction; load profile; energy storage; mobile hybrid power system; fuel consumption
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APA (6th Edition):
Pierce, T. M. J. (2016). Mobile Hybrid Power System Theory of Operation. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78148
Chicago Manual of Style (16th Edition):
Pierce, Timothy M Jr. “Mobile Hybrid Power System Theory of Operation.” 2016. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78148.
MLA Handbook (7th Edition):
Pierce, Timothy M Jr. “Mobile Hybrid Power System Theory of Operation.” 2016. Web. 16 Sep 2019.
Vancouver:
Pierce TMJ. Mobile Hybrid Power System Theory of Operation. [Internet] [Masters thesis]. Virginia Tech; 2016. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78148.
Council of Science Editors:
Pierce TMJ. Mobile Hybrid Power System Theory of Operation. [Masters Thesis]. Virginia Tech; 2016. Available from: http://hdl.handle.net/10919/78148
Virginia Tech
12.
Ayyagari, Sai Rama Usha.
Modeling and Electrical Characterization of Ohmic Contacts on n-type GaN.
Degree: MS, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/82483
► As the current requirements of power devices are moving towards high frequency, high efficiency and high-power density, Silicon-based devices are reaching its limits which are…
(more)
▼ As the current requirements of power devices are moving towards high frequency, high efficiency and high-power density, Silicon-based devices are reaching its limits which are instigating the need to move towards new materials. Gallium Nitride (GaN) has the potential to meet the growing demands due to the wide band-gap nature which leads to various enhanced material properties like, higher operational temperature, smaller dimensions, faster operation and efficient performance. The metal contacts on semiconductors are essential as the interface properties affect the semiconductor performance and device operation. The low resistance ohmic contacts for n-GaN have been well established while most p-GaN devices have still high contact resistivity. Significant work has not been found that focuses on software-based modeling of the device to analyze the contact resistance and implement methods to reduce the contact resistivity. Understanding the interface physics in n-GaN devices using simulations can help in understanding the contacts on p-GaN and eventually reduce its metal contact resistivity.
In this work, modeling of the metal-semiconductor interface along with the effect of a heavily doped layer under the metal contact is presented. The extent of reduction in contact resistivity due to different doping and thickness of n++ layer is presented with simulations. These results have been verified by the growth of device based on simulation results and reduction in contact resistivity has been observed. The effect of different TLM pattern along with different annealing conditions is presented in the work.
Advisors/Committee Members: Guido, Louis J. (committeechair), Ball, Arthur Hugues (committee member), Burgos, Rolando (committee member).
Subjects/Keywords: GaN; TLM; Sentaurus Modeling; Ohmic Contacts; Electrical Characterization
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APA (6th Edition):
Ayyagari, S. R. U. (2018). Modeling and Electrical Characterization of Ohmic Contacts on n-type GaN. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/82483
Chicago Manual of Style (16th Edition):
Ayyagari, Sai Rama Usha. “Modeling and Electrical Characterization of Ohmic Contacts on n-type GaN.” 2018. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/82483.
MLA Handbook (7th Edition):
Ayyagari, Sai Rama Usha. “Modeling and Electrical Characterization of Ohmic Contacts on n-type GaN.” 2018. Web. 16 Sep 2019.
Vancouver:
Ayyagari SRU. Modeling and Electrical Characterization of Ohmic Contacts on n-type GaN. [Internet] [Masters thesis]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/82483.
Council of Science Editors:
Ayyagari SRU. Modeling and Electrical Characterization of Ohmic Contacts on n-type GaN. [Masters Thesis]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/82483
Virginia Tech
13.
Gui, Yingying.
Gate Driver for Phase Leg of Parallel Enhancement-Mode Gallium-Nitride (GaN) Transistors.
Degree: MS, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/83516
► With a higher power rating and broader application, Gallium nitride (GaN) is a promising next-generation power switch. The current four GaN HEMTs in paralleled phase…
(more)
▼ With a higher power rating and broader application, Gallium nitride (GaN) is a promising next-generation power switch. The current four GaN HEMTs in paralleled phase leg that can block 400 V and conduct 200 A current is very beneficial, thus making the protection method on a GaN phase leg an urgent topic. This thesis starts with an overview of shortcircuit robustness among silicon (Si), silicon carbide (SiC) and GaN devices. An approximately safe operation area (SOA) for a GaN power switch will also be determined. The various common shortcircuit protection methods are mentioned. Additionally, current research on a GaN semiconductor is summarized. Among all of the protection methods, desaturation detection is selected and analyzed through simulation and then implemented in a parallel enhancement-mode high-electron-mobility transistor (E-HEMT) GaN phase leg. With this desaturation detection feature, the GaN E-HEMT can be turned off as quickly as 200 ns, and in the worst case, 500 ns, during a shortcircuit test. The phase leg survived a series of shortcircuit tests with shortcircuit protection. For the proposed protection scheme, the best-case reaction time (200 ns) is similar to others in the literature, while the shortcircuit peak current and peak energy are higher. The worst-case performance of this design is limited by both the gate driver and the device shortcircuit robustness.
Due to the fast switching speed of the GaN HEMT, the false turn-on phenomenon caused by the Miller effect can be a problem. A shoot through may occur with one switch false turn on. The Miller clamp is added to the phase leg to improve its reliability. After the hardware was implemented, the Miller clamp was tested and verified through a double pulse test (DPT). Compared to the phase leg without the Miller clamp, the gate is better protected from gate voltage overshoot and undershoot. The switching loss is reduced by 20 percent by using a new gate driver IC with higher current driving capability.
The degradation effect of GaN power switches in different shortcircuit pulses was also studied. The device passes through the shortcircuit tests, but any degradation effect that may change its parameters and influence its normal operation characteristic need to be addressed. Several GaN devices were selected and characterized after several shortcircuit tests to observe any degradation effect caused by the shortcircuit.
The degradation test results reveal a "recovery effect" of the GaN HEMT used in this project. The parameter variations on threshold voltage and on-resistance recover to the original state, several hours after the shortcircuit test. The test results match with the conclusion drawn in degradation test conducts by other research groups that the parameter variation during shortcircuit test is negligible. Also, repetitively fast shortcircuit tests on the GaN HEMT show that the shortcircuit protection limit for this device under 400 V bus should be limited to 300 ns.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committee member), Ngo, Khai D. (committee member).
Subjects/Keywords: Gate driver design; Gallium nitride; Desaturation detection; Miller clamp; Shortcircuit robustness
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APA ·
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Export
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APA (6th Edition):
Gui, Y. (2018). Gate Driver for Phase Leg of Parallel Enhancement-Mode Gallium-Nitride (GaN) Transistors. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/83516
Chicago Manual of Style (16th Edition):
Gui, Yingying. “Gate Driver for Phase Leg of Parallel Enhancement-Mode Gallium-Nitride (GaN) Transistors.” 2018. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/83516.
MLA Handbook (7th Edition):
Gui, Yingying. “Gate Driver for Phase Leg of Parallel Enhancement-Mode Gallium-Nitride (GaN) Transistors.” 2018. Web. 16 Sep 2019.
Vancouver:
Gui Y. Gate Driver for Phase Leg of Parallel Enhancement-Mode Gallium-Nitride (GaN) Transistors. [Internet] [Masters thesis]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/83516.
Council of Science Editors:
Gui Y. Gate Driver for Phase Leg of Parallel Enhancement-Mode Gallium-Nitride (GaN) Transistors. [Masters Thesis]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/83516
Virginia Tech
14.
Hu, Jiewen.
Current-Transformer Based Gate-Drive Power Supply With Reinforced Isolation.
Degree: MS, Electrical and Computer Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/85050
► Wide-bandgap semiconductor devices have attracted widespread attention due to their superior performance compared to their silicon devices counterpart. To utilize its full benefits, this thesis…
(more)
▼ Wide-bandgap semiconductor devices have attracted widespread attention due to their superior performance compared to their silicon devices counterpart. To utilize its full benefits, this thesis presents a complete design and optimization of a gate-drive power supply that supplies multiple gate drivers for high-voltage, high-speed semiconductor devices. Four objectives, including high density at high voltage, good noise mitigation, fair voltage regulation, resilience to faults have been achieved.
During the design procedure, different topology candidates are introduced and compared, after which a resonant topology is selected. The wide-bandgap semiconductor devices are utilized to reduce the size and losses. Hardware assembly is shown and experimental testing results are provided in the end to verify the design.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committee member), Southward, Steve C. (committee member).
Subjects/Keywords: GaN; Gate-Drive Power Supply; Inter-winding capacitance; 20 kV insulation; Current Transformer
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APA ·
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APA (6th Edition):
Hu, J. (2018). Current-Transformer Based Gate-Drive Power Supply With Reinforced Isolation. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/85050
Chicago Manual of Style (16th Edition):
Hu, Jiewen. “Current-Transformer Based Gate-Drive Power Supply With Reinforced Isolation.” 2018. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/85050.
MLA Handbook (7th Edition):
Hu, Jiewen. “Current-Transformer Based Gate-Drive Power Supply With Reinforced Isolation.” 2018. Web. 16 Sep 2019.
Vancouver:
Hu J. Current-Transformer Based Gate-Drive Power Supply With Reinforced Isolation. [Internet] [Masters thesis]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/85050.
Council of Science Editors:
Hu J. Current-Transformer Based Gate-Drive Power Supply With Reinforced Isolation. [Masters Thesis]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/85050
Virginia Tech
15.
Khanna, Mudit.
Design of DC-DC converters using Tunable Piezoelectric Transformers.
Degree: MS, Electrical and Computer Engineering, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/86442
► This thesis introduces the ‘tunable’ piezoelectric transformers (TPT) which provide an extra control terminal, used in this case, to regulate the output voltage. A detailed…
(more)
▼ This thesis introduces the ‘tunable’ piezoelectric transformers (TPT) which provide an extra control terminal, used in this case, to regulate the output voltage. A detailed mathematical analysis is done on the electrical equivalent circuit of the TPT to understand the effect of control terminal loading on the circuit performance. Based on this analysis, a variable capacitor connected across the control terminal is proposed to regulate the output voltage for line and load variations is suggested. The concept of ‘tunability’ in a TPT is introduced and mathematical conditions are derived to achieve the required ‘tunability’. This analysis can help a TPT designer to design the TPT for a specific application and predict the load and line regulations limits for a given design.
A circuit implementation of the variable capacitor, intended for control, is presented. With the proposed control circuit design, the effective value of a fixe capacitor can be controlled by controlling the duty cycle of a switch. Hence, this enables pulse width modulated (PWM) control for the TPT based converter operating at a constant frequency. Fixed frequency operation enables a high efficiency operation of TPT near its resonant frequency and the complete secondary control requires no isolation in the voltage feedback and control circuit. This prevents any ‘cross-talk’ between primary and secondary terminals and reduces the component count. The design of series input inductor for achieving zero voltage switching (ZVS) in the inverter switches for the new control is also discussed.
Experimental results for two different TPT designs are presented. Their differences in structure and its effect on the circuit performance has been discussed to support the mathematical analysis.
Advisors/Committee Members: Burgos, Rolando (committeechair), Priya, Shashank (committee member), Ngo, Khai D. (committee member).
Subjects/Keywords: Piezoelectric Transformers; DC-DC converters
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APA (6th Edition):
Khanna, M. (2017). Design of DC-DC converters using Tunable Piezoelectric Transformers. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/86442
Chicago Manual of Style (16th Edition):
Khanna, Mudit. “Design of DC-DC converters using Tunable Piezoelectric Transformers.” 2017. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/86442.
MLA Handbook (7th Edition):
Khanna, Mudit. “Design of DC-DC converters using Tunable Piezoelectric Transformers.” 2017. Web. 16 Sep 2019.
Vancouver:
Khanna M. Design of DC-DC converters using Tunable Piezoelectric Transformers. [Internet] [Masters thesis]. Virginia Tech; 2017. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/86442.
Council of Science Editors:
Khanna M. Design of DC-DC converters using Tunable Piezoelectric Transformers. [Masters Thesis]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/86442
Virginia Tech
16.
Mao, Yincan.
Passive Balancing of Switching Transients between Paralleled SiC MOSFETs.
Degree: PhD, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/82203
► The SiC MOSFET has attracted interest due to its superior characteristics compared to its Si counterpart. Several SiC MOSFETs are usually paralleled to increase current…
(more)
▼ The SiC MOSFET has attracted interest due to its superior characteristics compared to its Si counterpart. Several SiC MOSFETs are usually paralleled to increase current capability, considering cost effectiveness and manufacturability. Current unbalance among the MOSFETs is a concern as it affects reliability. The two main causes are asymmetrical layout and parameter mismatch. The variation in parameters, unlike circuit or module layout, is unavoidable during production. Among all the parameters of MOSFET, the spreads in on-state resistance (Rds(on)) and threshold voltage (Vth) are the major concerns during paralleling. The disparity in Rds(on) causes static current unbalance which is self-limited due to the positive temperature coefficient of Rds(on). Its influence is not investigated here. The threshold voltage Vth has a negative temperature coefficient, forcing the MOSFET with lower Vth to carry more current during switching transient. Paralleled MOSFETs are usually de-rated to guarantee safe operation. Balancing of peak currents during switching transient isthe goal of this work.
Integration of current/voltage sensors into paralleled structure is difficult in real application. Complicated feedback loop design and separate gate drivers also need to be avoided in perspective of cost and volume. Passive balancing solutions are investigated in this dissertation. The inductors and resistors most effective in improving current sharing are identified by parametric analysis. Their current balancing mechanisms are analyzed in circuit point of view. The design guidelines involving the magnitude of Vth mismatch, current rise time, and unbalance percentage are derived for the selection of passive components. The theory upholds well when substantial parasitics from device package and layout exist.
Several passive balancing structures are analyzed and compared in terms of current balancing capability, voltage stress, total switching loss, and switching loss difference. All of them can provide much better current and power balancing without increasing switching loss. Some of the them may increase the stress-inducing inductance, which can be reduced by negative magnetic coupling. Perfect coupling between power-source inductors would enable current matching without penalty on voltage stress.
Common-source inductance (Lcm) is effective in dynamic balancing, but at the expense of higher switching loss. It is not considered in power module application because Kelvin connection is normally applied. However, wire bond inside the package of discrete MOSFETs and part of the external leads are inevitable and add to Lcm. Peak-current and switching energy mismatches vary with operating conditions (including input voltage, input current, and switching speed). Design guidelines and procedures that are valid for wide operating range are provided for cases with and without Lcm.
This dissertation also models the switching energy and switching energy mismatch of paralleled MOSFETs. The influence of operating conditions, passive balancing…
Advisors/Committee Members: Ngo, Khai D. T. (committeechair), Lu, Guo Quan (committee member), Ha, Dong S. (committee member), Zuo, Lei (committee member), Burgos, Rolando (committee member).
Subjects/Keywords: paralleled SiC MOSFETs; dynamic balancing; passive compensation; magnetic coupling; modeling
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APA (6th Edition):
Mao, Y. (2018). Passive Balancing of Switching Transients between Paralleled SiC MOSFETs. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/82203
Chicago Manual of Style (16th Edition):
Mao, Yincan. “Passive Balancing of Switching Transients between Paralleled SiC MOSFETs.” 2018. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/82203.
MLA Handbook (7th Edition):
Mao, Yincan. “Passive Balancing of Switching Transients between Paralleled SiC MOSFETs.” 2018. Web. 16 Sep 2019.
Vancouver:
Mao Y. Passive Balancing of Switching Transients between Paralleled SiC MOSFETs. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/82203.
Council of Science Editors:
Mao Y. Passive Balancing of Switching Transients between Paralleled SiC MOSFETs. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/82203
Virginia Tech
17.
Bari, Syed Mustafa Khelat.
A Novel Inverse Charge Constant On-Time Control for High Performance Voltage Regulators.
Degree: PhD, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/82510
► One of the fundamental characteristics of the microprocessor application is its property of dynamic load change. Although idle most of the time, it wakes up…
(more)
▼ One of the fundamental characteristics of the microprocessor application is its property of dynamic load change. Although idle most of the time, it wakes up in nanoseconds to support sudden workload demands, which are becoming increasingly severe in today's multi-core processors with large core count. From the standpoint of its voltage regulator (VR) design, it must have very good efficiency at light loads, while also supporting a very fast transient response. Thus, the variable-frequency constant on-time current-mode (COTCM) control scheme is widely used in the VRs, as it can automatically reduce its switching frequency during light-load conditions. But, from transient point of view, it has some limitations in response to heavy-load demands by microprocessors; this is resolved by adding different nonlinear controls in state-of-the-art control schemes. These nonlinear controls are difficult to optimize for the widely variable transient conditions in processors. Another major issue for this ripple-based COTCM control is that when the combined inductor-current ripple in multiphase operation becomes zero because of the ripple-cancellation effect, COTCM loses its controllability. Therefore, the goal of this research is to discover a new adaptive COT control scheme that is concurrently very efficient at light-load conditions and also provides a fast and optimized transient response without adding any nonlinear control; hence providing a complete solution for today's high-performance microprocessors.
Firstly, the overview of state-of-the-art COTCM control is discussed in detail, and its limitations are analyzed. Analysis shows that one issue plaguing the COTCM control is its slow transient response in both single and multiphase operation. In this context, two methods have been proposed to improve the transient performance of conventional COTCM control in single and multiphase operations. These two methods can effectively reduce the output capacitor count in system, but the ripple-cancellation and phase overlapping issues in multiphase operation are yet to be improved. This provides motivation to search for a new COT control technique that can resolve all these problems together.
Therefore, a new concept of inverse charge constant on-time (IQCOT) control is proposed to
replace the conventional ripple-based COTCM; the goals are to improve noise immunity at the ripple-cancellation point without adding any external ramp into the system, and to improve the load step-up transient performance in multiphase operation by achieving natural and linear pulse overlapping without adding any nonlinear control. Additionally, the transient performance of the proposed IQCOT has been further improved by naturally increasing or decreasing the TON time during the load step-up or step-down transient period without adding any nonlinear control. As this transient property is inherent in proposed IQCOT control, it is adaptive to the widely variable transient requirements of processors, and always produces an optimized transient response.
In…
Advisors/Committee Members: Li, Qiang (committeechair), De La Reelopez, Jaime (committee member), Lee, Fred C. (committee member), Burgos, Rolando (committee member), Wicks, Alfred L. (committee member).
Subjects/Keywords: Power Electronics; Power Management; Control; Voltage Regulator; Current Mode; Buck Converter; Transient Response Improvement; Multiphase
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APA (6th Edition):
Bari, S. M. K. (2018). A Novel Inverse Charge Constant On-Time Control for High Performance Voltage Regulators. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/82510
Chicago Manual of Style (16th Edition):
Bari, Syed Mustafa Khelat. “A Novel Inverse Charge Constant On-Time Control for High Performance Voltage Regulators.” 2018. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/82510.
MLA Handbook (7th Edition):
Bari, Syed Mustafa Khelat. “A Novel Inverse Charge Constant On-Time Control for High Performance Voltage Regulators.” 2018. Web. 16 Sep 2019.
Vancouver:
Bari SMK. A Novel Inverse Charge Constant On-Time Control for High Performance Voltage Regulators. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/82510.
Council of Science Editors:
Bari SMK. A Novel Inverse Charge Constant On-Time Control for High Performance Voltage Regulators. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/82510
Virginia Tech
18.
Wang, Jun.
Switching-Cycle Control and Sensing Techniques for High-Density SiC-Based Modular Converters.
Degree: PhD, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/83518
► Nowadays high power density has become an emerging need for the medium-voltage (MV) high-power converters in applications of power distribution systems in urban areas and…
(more)
▼ Nowadays high power density has become an emerging need for the medium-voltage (MV) high-power converters in applications of power distribution systems in urban areas and transportation carriers like ship, airplane, and so forth. The limited footprint or space resource cost such immensely high price that introducing expensive advanced equipment to save space becomes a cost-effective option. To this end, replacing conventional Si IGBT with the superior SiC MOSFET to elevate the power density of MV modular converters has been defined as the concentration of this research work.
As the modular multilevel converter (MMC) is the most typical modular converter for high power applications, the research topic is narrowed down to study the SiC MOSFET-based MMC. Fundamentals of the MMC is firstly investigated by introducing a proposed state-space switching model, followed by unveiling all possible operation scenarios of the MMC. The lower-frequency energy fluctuation on passive components of the MMC is interpreted and prior-art approaches to overcome it are presented.
By scrutinizing the converter's switching states, a new switching-cycle control (SCC) approach is proposed to balance the capacitor energy within one switching cycle is explored. An open-loop model-predictive method is leveraged to study the behavior of the SCC, and then a hybrid-current-mode (HCM) approach to realize the closed-loop SCC on hardware is proposed and verified in simulation.
In order to achieve the hybrid-current-mode SCC (HCM-SCC), a high-performance Rogowski switch-current sensor (RSCS) is proposed and developed. As sensing the switching current is a critical necessity for HCM-SCC, the RSCS is designed to meet all the requirement for the control purposes. A PCB-embedded shielding design is proposed to improve the sensor accuracy under high dv/dt noises caused by the rapid switching transients of SiC MOSFET.
The overall system and control validations have been conducted on a high-power MMC prototype. The basic unit of the MMC prototype is a SiC Power Electronics Building Block (PEBB) rated at 1 kV DC bus voltage. Owing to the proposed SCC, the PEBB development has achieved high power density with considerable reduction of passive component size. Finally, experimental results exhibit the excellent performance of the RSCS and the HCM-SCC.
Advisors/Committee Members: Boroyevich, Dushan (committeechair), Burgos, Rolando (committeechair), De La Reelopez, Jaime (committee member), Wicks, Alfred L. (committee member), Lee, Fred C. (committee member).
Subjects/Keywords: High-density; SiC MOSFET; modular multilevel converter; switching-cycle control; Rogowski switch-current sensor
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APA (6th Edition):
Wang, J. (2018). Switching-Cycle Control and Sensing Techniques for High-Density SiC-Based Modular Converters. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/83518
Chicago Manual of Style (16th Edition):
Wang, Jun. “Switching-Cycle Control and Sensing Techniques for High-Density SiC-Based Modular Converters.” 2018. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/83518.
MLA Handbook (7th Edition):
Wang, Jun. “Switching-Cycle Control and Sensing Techniques for High-Density SiC-Based Modular Converters.” 2018. Web. 16 Sep 2019.
Vancouver:
Wang J. Switching-Cycle Control and Sensing Techniques for High-Density SiC-Based Modular Converters. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/83518.
Council of Science Editors:
Wang J. Switching-Cycle Control and Sensing Techniques for High-Density SiC-Based Modular Converters. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/83518
Virginia Tech
19.
Miao, Zichen.
Packaging and Magnetic Integration for Reliable Switching of Paralleled SiC MOSFETs.
Degree: PhD, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/84497
► Silicon carbide (SiC) outperform Si chips in terms of high blocking voltage capability, low on-resistance, high-temperature operation, and high switching frequency. Several SiC MOSFETs are…
(more)
▼ Silicon carbide (SiC) outperform Si chips in terms of high blocking voltage capability, low on-resistance, high-temperature operation, and high switching frequency. Several SiC MOSFETs are usually paralleled to increase current capability, considering cost effectiveness and manufacturability. For a SiC power module with current rating higher than 100 A, high did/dt and dvds/dt could possibly cause cross-turn-on (crosstalk-induced turn-on) through the gate-to-drain capacitance Cgd of the MOSFET dies and the package inductances. Mismatches in threshold voltage (Vth) up to 33% have been observed among paralleled SiC MOSFETs. This leads to unbalanced transient peak currents and switching energies. Both cross-turn-on and current unbalance degrade the reliability of a power module. Increasing the immunity to cross-turn-on while maintaining the similar switching energies and balancing the transient peak currents below 10% without sacrificing the voltage stress are the goals of this work.
Development of a SPICE model free of non-convergence – A simulation model for a SiC power module is necessary for evaluations of cross-turn-on and current unbalance; however, most SiC power modules do not have models. No existing modeling methods discuss how to build an accurate SPICE model that is free of non-convergence when hundreds of parasitic inductances are present. A modeling process is introduced for paralleled MOSFETs encapsulated in a power module that gives access to both the internal channel current and voltage of each bare die inside the package. This model is free of non-convergence and accurate. Parasitic ac resistances, dc resistances, and ac inductances are extracted by Q3D Extractor. Non-convergence is avoided by including the ac resistance of the conduction trace in the model. Also, a series model which is set default in Q3D Extractor is converted to parallel model to accurately reflect how the current flows through the dc and ac resistances of the trace. A complete SPICE model of a commercial SiC power module was derived and validated by experiments. The error between predicted turn-on peak current of the developed model and that of the experimental data is 2%, significantly lower than the 28% difference between prediction result of commercial model and experimental data.
Detection of internal cross-turn-on – Terminal current of a power module does not reflect the internal channel current due to the numerous parasitic inductances of the package. No existing method is able to detect the cross-turn-on in a power module since dies are usually encapsulated and the channel currents are hard to measure. A nonintrusive method to identify cross-turn-on based on the changing ringing current is developed. The detection method was analyzed theoretically and validated by experiments using a 1.2-kV SiC module. The negative drive voltage and gate resistance for safe operation can be determined by the detection method.
Influence of layout symmetry on immunity to cross-turn-on – Gate resistance, gate-to-drain capacitance of the…
Advisors/Committee Members: Ngo, Khai D. T. (committeechair), Southward, Steve C. (committee member), Lu, Guo Quan (committee member), Manteghi, Majid (committee member), Burgos, Rolando (committee member).
Subjects/Keywords: Packaging; cross-turn-on; magnetic integration; module; paralleled SiC MOSFETs; current balancing
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APA (6th Edition):
Miao, Z. (2018). Packaging and Magnetic Integration for Reliable Switching of Paralleled SiC MOSFETs. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/84497
Chicago Manual of Style (16th Edition):
Miao, Zichen. “Packaging and Magnetic Integration for Reliable Switching of Paralleled SiC MOSFETs.” 2018. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/84497.
MLA Handbook (7th Edition):
Miao, Zichen. “Packaging and Magnetic Integration for Reliable Switching of Paralleled SiC MOSFETs.” 2018. Web. 16 Sep 2019.
Vancouver:
Miao Z. Packaging and Magnetic Integration for Reliable Switching of Paralleled SiC MOSFETs. [Internet] [Doctoral dissertation]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/84497.
Council of Science Editors:
Miao Z. Packaging and Magnetic Integration for Reliable Switching of Paralleled SiC MOSFETs. [Doctoral Dissertation]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/84497
Virginia Tech
20.
Ridenour, Daniel Keith.
Examination of Power Systems Solutions Considering High Voltage Direct Current Transmission.
Degree: MS, Electrical and Computer Engineering, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/63927
► Since the end of the Current Wars in the 19th Century, alternating current (AC) has dominated the production, transmission, and use of electrical energy. The…
(more)
▼ Since the end of the Current Wars in the 19th Century, alternating current (AC) has dominated the production, transmission, and use of electrical energy. The chief reason for this dominance was (and continues to be) that AC offers a way minimize transmission losses yet transmit large power from generation to load. With the Digital Revolution and the entrance of most of the post-industrialized world into the Information Age, energy usage levels have increased due to the proliferation of electrical and electronic devices in nearly all sectors of life. A stable electrical grid has become synonymous with a stable nation-state and a healthy populace.
Large-scale blackouts around the world in the 20th and the early 21st Centuries highlighted the heavy reliance on power systems and because of that, governments and utilities have strived to improve reliability. Simultaneously occurring with the rise in energy usage is the mandate to cut the pollution by generation facilities and to mitigate the impact grid expansion has on environment as a whole. The traditional methods of transmission expansion are beginning to show their limits as utilities move generation facilities farther from load centers, which reduces geographic diversity, and the integration of nondispatchable, renewable energy sources upsets the current operating regime. A challenge faces engineers - how to expand generation, expand transmission capacity, and integrate renewable energy sources while maintaining maximum system efficiency and reliability.
A technology that may prove beneficial to the operation of power system is high voltage direct current transmission. The technology brings its own set of advantages and disadvantages, which are in many ways the complement of AC. It is important to update transmission planning processes to account for the new possibilities that HVDC offers. This thesis submits a discussion of high voltage direct current transmission technology itself and an examination of how HVDC can be considered in the planning process.
Advisors/Committee Members: De La Ree Lopez, Jaime (committeechair), Gardner, Robert Matthew (committee member), Burgos, Rolando (committee member), Centeno, Virgilio A. (committee member).
Subjects/Keywords: HVDC transmission; voltage source converter; insulated gate bipolar transistor; line congestion alleviation; interconnection of nondispatchable generation; urban infeed
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APA (6th Edition):
Ridenour, D. K. (2015). Examination of Power Systems Solutions Considering High Voltage Direct Current Transmission. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/63927
Chicago Manual of Style (16th Edition):
Ridenour, Daniel Keith. “Examination of Power Systems Solutions Considering High Voltage Direct Current Transmission.” 2015. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/63927.
MLA Handbook (7th Edition):
Ridenour, Daniel Keith. “Examination of Power Systems Solutions Considering High Voltage Direct Current Transmission.” 2015. Web. 16 Sep 2019.
Vancouver:
Ridenour DK. Examination of Power Systems Solutions Considering High Voltage Direct Current Transmission. [Internet] [Masters thesis]. Virginia Tech; 2015. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/63927.
Council of Science Editors:
Ridenour DK. Examination of Power Systems Solutions Considering High Voltage Direct Current Transmission. [Masters Thesis]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/63927
Virginia Tech
21.
Dominic, Jason.
Comparison and Design of High Efficiency Microinverters for Photovoltaic Applications.
Degree: MS, Electrical and Computer Engineering, 2014, Virginia Tech
URL: http://hdl.handle.net/10919/78045
► With the decrease in availability of non-renewable energy sources coupled with the increase in the amount of energy required for the operation of personal electronic…
(more)
▼ With the decrease in availability of non-renewable energy sources coupled with the increase in the amount of energy required for the operation of personal electronic devices there has been an increased focus on developing systems that take advantage of renewable energy sources. Renewal energy sources such as photovoltaic (PV) panels have become more popular due to recent developments in PV panel manufacturing that decreases material costs and improves energy harvesting efficiency. Since PV sources are DC sources power conversion stages have to be used in order to interface this power to the existing electrical utility system.
The structure of large scale PV systems usually consists of several PV panels connected in series to achieve a high input source voltage that can be fed into a high power centralized DC-AC inverter. The drawback to this approach is that when the PV panels are subjected to less than ideal conditions. If a single PV panel is subjected to drastically less solar irradiation during cloud conditions, then its output power will drop dramatically. Since this panel is series connected with the other PV panels, their current output is also dragged low decreasing the power output of the system. Algorithms that have the power converter operate at different input conditions allow the system to operate at a maximum power point (MPP), however this only allows the system to operate at a higher power point and not the true MPP.
To get around this limitation a new PV system implementation was created by giving each panel its own DC-AC power conversion system. This configuration gives each panel the ability to operate at its own MPP increasing the total system energy harvest. Another advantage of the single panel DC-AC microinverter power conversion stage is that the outputs are parallel connected to the utility grid easily allowing the ability to expand the system without having to shut down the entire system.
The most prevalent implementation of the microinverter consists of a single power converter that uses the PV low voltage DC and outputs high voltage AC. In order to ensure that the double line AC ripple does not propagate to the PV panel a large bank of electrolytic capacitors are used to buffer the ripple. There is concern that the electrolytic capacitor will degrade over time and affect the system efficiency. To get around having to use electrolytic capacitors a two stage microinverter has been proposed. The two stage microinverter consists of a DC-DC converter that steps up the low DC voltage of the PV panel to high voltage DC and the second stage is a DC-AC inverter that takes the high voltage DC and converts it to high voltage AC. There is a capacitor that connects the two power converter stages called the DC link capacitor which can buffer the double line energy ripple without using electrolytic capacitors.
This thesis focuses on the review of several DC-AC inverter topologies suitable for use in PV microinverter systems. Operation capabilities such as common mode noise and efficiency are compared.…
Advisors/Committee Members: Lai, Jih-Sheng Jason (committeechair), Burgos, Rolando (committee member), Guido, Louis J. (committee member), Baumann, William T. (committee member).
Subjects/Keywords: Microinverter; DC-AC; PV; Wideband-gap
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APA (6th Edition):
Dominic, J. (2014). Comparison and Design of High Efficiency Microinverters for Photovoltaic Applications. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78045
Chicago Manual of Style (16th Edition):
Dominic, Jason. “Comparison and Design of High Efficiency Microinverters for Photovoltaic Applications.” 2014. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78045.
MLA Handbook (7th Edition):
Dominic, Jason. “Comparison and Design of High Efficiency Microinverters for Photovoltaic Applications.” 2014. Web. 16 Sep 2019.
Vancouver:
Dominic J. Comparison and Design of High Efficiency Microinverters for Photovoltaic Applications. [Internet] [Masters thesis]. Virginia Tech; 2014. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78045.
Council of Science Editors:
Dominic J. Comparison and Design of High Efficiency Microinverters for Photovoltaic Applications. [Masters Thesis]. Virginia Tech; 2014. Available from: http://hdl.handle.net/10919/78045
Virginia Tech
22.
Francis, Gerald.
An Algorithm and System for Measuring Impedance in D-Q Coordinates.
Degree: PhD, Electrical and Computer Engineering, 2010, Virginia Tech
URL: http://hdl.handle.net/10919/26462
► This dissertation presents work conducted at the Center for Power Electronics Systems (CPES) at Virginia Polytechnic Institute and State University. Chapter 1 introduces the concept…
(more)
▼ This dissertation presents work conducted at the Center for Power Electronics Systems (CPES) at
Virginia Polytechnic Institute and State University.
Chapter 1 introduces the concept of impedance measurement, and discusses previous work on this topic. This chapter also addresses issues associated with impedance measurement.
Chapter 2 introduces the analyzer architecture and the proposed algorithm. The algorithm involves locking on to the voltage vector at the point of common coupling between the analyzer and the system via a PLL to establish a D-Q frame. A series of sweeps are performed, injecting at least two independent angles in the D-Q plane, acquiring D- and Q-axis voltages and currents for each axis of injection at the point of interest.
Chapter 3 discusses the analyzer hardware and the criteria for selection. The hardware built ranges from large-scale power level hardware to communication hardware implementing a universal serial bus. An eight-layer PCB was constructed implementing analog signal conditioning and conversion to and from digital signals with high resolution. The PCB interfaces with the existing Universal Controller hardware.
Chapter 4 discusses the analyzer software. Software was written in C++, VHDL, and Matlab to implement the measurement process. This chapter also provides a description of the software architecture and individual components.
Chapter 5 discusses the application of the analyzer to various examples. A dynamic model of the analyzer is constructed, considering all components of the measurement system. Congruence with predicted results is demonstrated for three-phase balanced linear impedance networks, which can be directly derived based on stationary impedance measurements. Other impedances measured include a voltage source inverter, Vienna rectifier, six-pulse rectifier and an autotransformer-rectifier unit.
Advisors/Committee Members: Boroyevich, Dushan (committeechair), Lesko, John Jack (committee member), Burgos, Rolando (committee member), Baumann, William T. (committee member), Tranter, William H. (committee member).
Subjects/Keywords: Three Phase AC Systems; Impedance Measurement; D-Q Coordinates; Rotating Coordinate Systems; Power Electronics; Transfer Functions
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APA (6th Edition):
Francis, G. (2010). An Algorithm and System for Measuring Impedance in D-Q Coordinates. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/26462
Chicago Manual of Style (16th Edition):
Francis, Gerald. “An Algorithm and System for Measuring Impedance in D-Q Coordinates.” 2010. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/26462.
MLA Handbook (7th Edition):
Francis, Gerald. “An Algorithm and System for Measuring Impedance in D-Q Coordinates.” 2010. Web. 16 Sep 2019.
Vancouver:
Francis G. An Algorithm and System for Measuring Impedance in D-Q Coordinates. [Internet] [Doctoral dissertation]. Virginia Tech; 2010. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/26462.
Council of Science Editors:
Francis G. An Algorithm and System for Measuring Impedance in D-Q Coordinates. [Doctoral Dissertation]. Virginia Tech; 2010. Available from: http://hdl.handle.net/10919/26462
Virginia Tech
23.
Chen, Fang.
Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter Design.
Degree: PhD, Electrical and Computer Engineering, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/77532
► DC power distribution has gained popularity in sustainable buildings, renewable energy utilization, transportation electrification and high-efficiency data centers. This dissertation focuses on two aspects of…
(more)
▼ DC power distribution has gained popularity in sustainable buildings, renewable energy utilization, transportation electrification and high-efficiency data centers. This dissertation focuses on two aspects of facilitating the application of dc systems: (a) system-level control to improve load sharing, voltage regulation and efficiency; (b) design of a high-efficiency interface converter to connect dc microgrids with the existing low-voltage ac distributions, with a special focus on common-mode (CM) voltage attenuation.
Droop control has been used in dc microgrids to share loads among multiple sources. However, line resistance and sensor discrepancy deteriorate the performance. The quantitative relation between the droop voltage range and the load sharing accuracy is derived to help create droop design guidelines. DC system designers can use the guidelines to choose the minimum droop voltage range and guarantee that the sharing error is within a defined range even under the worst cases.
A nonlinear droop method is proposed to improve the performance of droop control. The droop resistance is a function of the output current and increases when the output current increases. Experiments demonstrate that the nonlinear droop achieves better load sharing under heavy load and tighter bus voltage regulation. The control needs only local information, so the advantages of droop control are preserved. The output impedances of the droop-controlled power converters are also modeled and measured for the system stability analysis.
Communication-based control is developed to further improve the performance of dc microgrids. A generic dc microgrid is modeled and the static power flow is solved. A secondary control system is presented to achieve the benefits of restored bus voltage, enhanced load sharing and high system efficiency. The considered method only needs the information from its adjacent node; hence system expendability is guaranteed.
A high-efficiency two-stage single-phase ac-dc converter is designed to connect a 380 V bipolar dc microgrid with a 240 V split-phase single-phase ac system. The converter efficiencies using different two-level and three-level topologies with state-of-the-art semiconductor devices are compared, based on which a two-level interleaved topology using silicon carbide (SiC) MOSFETs is chosen. The volt-second applied on each inductive component is analyzed and the interleaving angles are optimized. A 10 kW converter prototype is built and achieves an efficiency higher than 97% for the first time.
An active CM duty cycle injection method is proposed to control the dc and low-frequency CM voltage for grounded systems interconnected with power converters. Experiments with resistive and constant power loads in rectification and regeneration modes validate the performance and stability of the control method. The dc bus voltages are rendered symmetric with respect to ground, and the leakage current is reduced. The control method is generalized to three-phase ac-dc converters for larger power…
Advisors/Committee Members: Boroyevich, Dushan (committeechair), Burgos, Rolando (committeechair), Baumann, William T. (committee member), Wicks, Alfred L. (committee member), Centeno, Virgilio A. (committee member).
Subjects/Keywords: dc power distribution; microgrid; droop control; load sharing; grid interface converter; single phase ac-dc
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APA ·
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Export
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APA (6th Edition):
Chen, F. (2017). Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter Design. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/77532
Chicago Manual of Style (16th Edition):
Chen, Fang. “Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter Design.” 2017. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/77532.
MLA Handbook (7th Edition):
Chen, Fang. “Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter Design.” 2017. Web. 16 Sep 2019.
Vancouver:
Chen F. Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter Design. [Internet] [Doctoral dissertation]. Virginia Tech; 2017. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/77532.
Council of Science Editors:
Chen F. Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter Design. [Doctoral Dissertation]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/77532
Virginia Tech
24.
Hou, Dongbin.
Very High Frequency Integrated POL for CPUs.
Degree: PhD, Electrical and Computer Engineering, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/77608
► Point-of-load (POL) converters are used extensively in IT products. Every piece of the integrated circuit (IC) is powered by a point-of-load (POL) converter, where the…
(more)
▼ Point-of-load (POL) converters are used extensively in IT products. Every piece of the integrated circuit (IC) is powered by a point-of-load (POL) converter, where the proximity of the power supply to the load is very critical in terms of transient performance and efficiency. A compact POL converter with high power density is desired because of current trends toward reducing the size and increasing functionalities of all forms of IT products and portable electronics. To improve the power density, a 3D integrated POL module has been successfully demonstrated at the Center for Power Electronic Systems (CPES) at
Virginia Tech. While some challenges still need to be addressed, this research begins by improving the 3D integrated POL module with a reduced DCR for higher efficiency, the vertical module design for a smaller footprint occupation, and the hybrid core structure for non-linear inductance control.
Moreover, as an important category of the POL converter, the voltage regulator (VR) serves an important role in powering processors in today's electronics. The multi-core processors are widely used in almost all kinds of CPUs, ranging from the big servers in data centers to the small smartphones in almost everyone's pocket. When powering multiple processor cores, the energy consumption can be reduced dramatically if the supply voltage can be modulated rapidly based on the power demand of each core by dynamic voltage and frequency scaling (DVFS). However, traditional discrete voltage regulators (VRs) are not able to realize the full potential of DVFS since they are not able to modulate the supply voltage fast enough due to their relatively low switching frequency and the high parasitic interconnect impedance between the VRs and the processors. With these discrete VRs, DVFS has only been applied at a coarse timescale, which can scale voltage levels only in tens of microseconds (which is normally called a coarse-grained DVFS). In order to get the full benefit of DVFS, a concept of an integrated voltage regulator (IVR) is proposed to allow fine-grained DVFS to scale voltage levels in less than a microsecond. Significant interest from both academia and industry has been drawn to IVR research.
Recently, Intel has implemented two generations of very high frequency IVR. The first generation is implemented in Haswell processors, where air core inductors are integrated in the processor's packaging substrate and placed very closely to the processor die. The air core inductors have very limited ability in confining the high frequency magnetic flux noise generated by the very high switching frequency of 140MHz. In the second generation IVR in Broadwell processors, the inductors are moved away from the processor substrate to the 3DL PCB modules in the motherboard level under the die.
Besides computers, small portable electronics such as smartphones are another application that can be greatly helped by IVRs. The smartphone market size is now larger than 400 billion US dollars, and its power consumption is becoming…
Advisors/Committee Members: Lee, Fred C. (committeechair), Stilwell, Daniel J. (committee member), Burgos, Rolando (committee member), Viehland, Dwight D. (committee member), Li, Qiang (committee member).
Subjects/Keywords: Point-of-load converter; integrated voltage regulator; very high frequency; 3D integration; ultra-low profile inductor; magnetic characterizations; core loss measurement
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APA (6th Edition):
Hou, D. (2017). Very High Frequency Integrated POL for CPUs. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/77608
Chicago Manual of Style (16th Edition):
Hou, Dongbin. “Very High Frequency Integrated POL for CPUs.” 2017. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/77608.
MLA Handbook (7th Edition):
Hou, Dongbin. “Very High Frequency Integrated POL for CPUs.” 2017. Web. 16 Sep 2019.
Vancouver:
Hou D. Very High Frequency Integrated POL for CPUs. [Internet] [Doctoral dissertation]. Virginia Tech; 2017. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/77608.
Council of Science Editors:
Hou D. Very High Frequency Integrated POL for CPUs. [Doctoral Dissertation]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/77608
Virginia Tech
25.
Lu, Ming.
Synergetic Attenuation of Stray Magnetic Field in Inductive Power Transfer.
Degree: PhD, Electrical and Computer Engineering, 2017, Virginia Tech
URL: http://hdl.handle.net/10919/78621
► Significant stray magnetic field exists around the coils when charging the electric vehicles (EVs) with inductive power transfer (IPT), owning to the large air gap…
(more)
▼ Significant stray magnetic field exists around the coils when charging the electric vehicles (EVs) with inductive power transfer (IPT), owning to the large air gap between the transmitter and receiver. The methods for field attenuation usually introduce extra losses and reduce the efficiency. This study focuses on the synergetic attenuation of stray magnetic field which is optimized simultaneously with the efficiency. The optimization is realized with Pareto front.
In this dissertation, three methods are discussed for the field attenuation. The first method is to tune the physical parameters of the winding, such as the inner radii, outer radii, distribution of the turns, and types of the litz wires. The second method is to add metal shields around the IPT coils, in which litz wires are used as shields to reduce the shielding losses. The third method is to control the phases of winding currents, which avoids increasing the size and weight of the IPT coils.
To attenuate the stray magnetic field by tuning the physical parameters, the conventional method is to sweep all the physical parameters in finite-element simulation. This takes thousands of simulations to derive the Pareto front, and it's especially time-consuming for three-dimensional simulations. This dissertation demonstrates a faster method to derive the Pareto front. The windings are replaced by the lumped loops. As long as the number of turns for each loop is known, the efficiency and magnetic field are calculated directly from the permeance matrices and current-to-field matrices. The sweep of physical parameters in finite-element simulation is replaced by the sweep of the turns numbers for the lumped loops in calculation. Only tens of simulations are required in the entire procedure, which are used to derive the matrices. An exemplary set of coils was built and tested. The efficiency from the matrix calculation is the same as the experimental measurement. The difference for stray magnetic field is less than 12.5%.
Metal shields attenuate the stray magnetic field effectively, but generates significant losses owning to the uneven distribution of shield currents. This dissertation uses litz wires to replace the conventional plate shield or ring shield. Skin effect is eliminated so the shield currents are uniformly distributed and the losses are reduced. The litz shields are categorized to two types: shorted litz shield and driven litz shield. Circuit models are derived to analyze their behaviors. The concept of lumped-loop model is applied to derive the Pareto front of efficiency versus stray magnetic field for the coils with litz shield. In an exemplary IPT system, coils without metal shield and with metal shields are optimized for the same efficiency. Both the simulation and experimental measurement verify that the shorted litz shield has the best performance. The stray magnetic field is attenuated by 65% compared to the coils without shield.
This dissertation also introduces the method to attenuate the stray magnetic field by controlling the phases of…
Advisors/Committee Members: Ngo, Khai D. T. (committeechair), Burgos, Rolando (committee member), Lu, Guo Quan (committee member), Manteghi, Majid (committee member), Zuo, Lei (committee member).
Subjects/Keywords: Inductive power transfer; planar coils; high efficiency; proximity-effect loss; magnetic field; shield; multi-objective optimization; Pareto front
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APA (6th Edition):
Lu, M. (2017). Synergetic Attenuation of Stray Magnetic Field in Inductive Power Transfer. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/78621
Chicago Manual of Style (16th Edition):
Lu, Ming. “Synergetic Attenuation of Stray Magnetic Field in Inductive Power Transfer.” 2017. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/78621.
MLA Handbook (7th Edition):
Lu, Ming. “Synergetic Attenuation of Stray Magnetic Field in Inductive Power Transfer.” 2017. Web. 16 Sep 2019.
Vancouver:
Lu M. Synergetic Attenuation of Stray Magnetic Field in Inductive Power Transfer. [Internet] [Doctoral dissertation]. Virginia Tech; 2017. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/78621.
Council of Science Editors:
Lu M. Synergetic Attenuation of Stray Magnetic Field in Inductive Power Transfer. [Doctoral Dissertation]. Virginia Tech; 2017. Available from: http://hdl.handle.net/10919/78621
Virginia Tech
26.
Wen, Bo.
Stability Analysis of Three-Phase AC Power Systems Based on Measured D-Q Frame Impedances.
Degree: PhD, Electrical and Computer Engineering, 2015, Virginia Tech
URL: http://hdl.handle.net/10919/51202
► Small-signal stability is of great concern for distributed power systems with a large number of regulated power converters. These converters are constant-power loads (CPLs) exhibit…
(more)
▼ Small-signal stability is of great concern for distributed power systems with a large number of regulated power converters. These converters are constant-power loads (CPLs) exhibit a negative incremental input resistance within the output voltage regulation bandwidth. In the case of dc systems, design requirements for impedances that guarantee stability have been previously developed and are used in the design and specification of these systems. In terms of three-phase ac systems, a mathematical framework based on the generalized Nyquist stability criterion (GNC), reference frame theory, and multivariable control is set forth for stability assessment. However, this approach relies on the actual measurement of these impedances, which up to now has severely hindered its applicability. Addressing this shortcoming, this research investigates the small-signal stability of three-phase ac systems using measured d-q frame impedances. Prior to this research, negative incremental resistance is only found in CPLs as a results of output voltage regulation. In this research, negative incremental resistance is discovered in grid-tied inverters as a consequence of grid synchronization and current injection, where the bandwidth of the phase-locked loop determines the frequency range of the negative incremental resistance behavior, and the power rating of inverter determines the magnitude of the resistance. Prior to this research, grid synchronization stability issue and sub-synchronous oscillations between grid-tied inverter and its nearby rectifier under weak grid condition are reported and analyzed using characteristic equation of the system. This research proposes a more design oriented analysis approach based on the negative incremental resistance concept of grid-tied inverters. Grid synchronization stability issues are well explained under the framework of GNC. Although stability and its margin of ac system can be addressed using source and load impedances in d-q frame, method to specify the shape of load impedances to assure system stability is not reported. This research finds out that under unity power factor condition, three-phase ac system is decoupled. It can be simplified to two dc systems. Load impedances can be then specified to guarantee system stability and less conservative design.
Advisors/Committee Members: Boroyevich, Dushan (committeechair), Burgos, Rolando (committeechair), Mattavelli, Paolo (committee member), Stilwell, Daniel J. (committee member), Roy, Christopher John (committee member).
Subjects/Keywords: Distributed power system; impedance; inverters; negative resistance circuits; Nyquist stability; rectifiers; power system stability; stability; synchronization
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APA (6th Edition):
Wen, B. (2015). Stability Analysis of Three-Phase AC Power Systems Based on Measured D-Q Frame Impedances. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/51202
Chicago Manual of Style (16th Edition):
Wen, Bo. “Stability Analysis of Three-Phase AC Power Systems Based on Measured D-Q Frame Impedances.” 2015. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/51202.
MLA Handbook (7th Edition):
Wen, Bo. “Stability Analysis of Three-Phase AC Power Systems Based on Measured D-Q Frame Impedances.” 2015. Web. 16 Sep 2019.
Vancouver:
Wen B. Stability Analysis of Three-Phase AC Power Systems Based on Measured D-Q Frame Impedances. [Internet] [Doctoral dissertation]. Virginia Tech; 2015. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/51202.
Council of Science Editors:
Wen B. Stability Analysis of Three-Phase AC Power Systems Based on Measured D-Q Frame Impedances. [Doctoral Dissertation]. Virginia Tech; 2015. Available from: http://hdl.handle.net/10919/51202
Virginia Tech
27.
Chu, Alex.
Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter.
Degree: MS, Electrical Engineering, 2018, Virginia Tech
URL: http://hdl.handle.net/10919/81994
► Galvanic isolation between the grid and energy storage unit is typically required for bidirectional power distribution systems. Due to the recent advancement in wide-bandgap semiconductor…
(more)
▼ Galvanic isolation between the grid and energy storage unit is typically required for bidirectional power distribution systems. Due to the recent advancement in wide-bandgap semiconductor devices, it has become feasible to achieve the galvanic isolation using bidirectional isolated DC/DC converters instead of line-frequency transformers.
A survey of the latest generation SiC MOSFET is performed. The devices were compared against each other based on their key parameters. It was determined that under the given specifications, the most suitable devices are X3M0016120K 1.2 kV 16 mohm and C3M0010090K 900 V 10 mohm SiC MOSFETs from Wolfspeed.
Two of the most commonly utilized bidirectional isolated DC/DC converter topologies, dual active bridge and CLLC resonant converter are introduced. The operating principle of these converter topologies are explained. A comparative analysis between the two converter topologies, focusing on total device loss, has been performed. It was found that the CLLC converter has lower total device loss compared to the dual active bridge converter under the given specifications. Loss analysis for the isolation transformer in the CLLC resonant converter was also performed at different switching frequencies. It was determined that the total converter loss was lowest at a switching frequency of 250 kHz
A prototype for the CLLC resonant converter switching at 250 kHz was then designed and built. Bidirectional power delivery for the converter was verified for power levels up to 25 kW. The converter waveforms and efficiency data were captured at different power levels. Under forward mode operation, a peak efficiency of 98.3% at 15 kW was recorded, along with a full load efficiency value of 98.1% at 25 kW. Under reverse mode operation, a peak efficiency of 98.8% was measured at 17.8 kW. The full load efficiency at 25 kW under reverse mode operation is 98.5%.
Advisors/Committee Members: Burgos, Rolando (committeechair), Centeno, Virgilio A. (committee member), Southward, Steve C. (committee member), Skutt, Glenn R. (committee member).
Subjects/Keywords: Isolated DC/DC Converter; Silicon Carbide; High-Frequency; CLLC Converter
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APA (6th Edition):
Chu, A. (2018). Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/81994
Chicago Manual of Style (16th Edition):
Chu, Alex. “Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter.” 2018. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/81994.
MLA Handbook (7th Edition):
Chu, Alex. “Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter.” 2018. Web. 16 Sep 2019.
Vancouver:
Chu A. Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter. [Internet] [Masters thesis]. Virginia Tech; 2018. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/81994.
Council of Science Editors:
Chu A. Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter. [Masters Thesis]. Virginia Tech; 2018. Available from: http://hdl.handle.net/10919/81994
28.
Dimarino, Christina Marie.
Design and Validation of a High-Density 10 kV Silicon Carbide MOSFET Power Module with Reduced Electric Field Strength and Integrated Common-Mode Screen.
Degree: PhD, Electrical Engineering, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/86596
► Electricity is the fastest-growing type of end-use energy consumption in the world, and its generation and usage trends are changing. Hence, the power electronics that…
(more)
▼ Electricity is the fastest-growing type of end-use energy consumption in the world, and its generation and usage trends are changing. Hence, the power electronics that control the flow and conversion of electrical energy are an important research area. Advanced power electronics with improved efficiency, power density, reliability, and functionality are critical in data center, transportation, motor drive, renewable energy, and grid applications, among others.
Wide-bandgap power semiconductors are enabling power electronics to meet these growing demands, and have thus begun appearing in commercial products, such as traction and solar inverters. Looking ahead, even greater strides can be made in medium-voltage systems due to the development of silicon carbide power devices with voltage ratings exceeding 10 kV. The ability of these devices to switch higher voltages faster and with lower losses than existing semiconductor technologies will drastically reduce the size, weight, and complexity of medium-voltage systems. However, these devices also bring new challenges for designers.
This dissertation will present a package for 10 kV silicon carbide power MOSFETs that addresses the enhanced electric fields, greater electromagnetic interference, worsened dynamic imbalance, and higher heat flux issues associated with the packaging of these unique devices. Specifically, due to the low and balanced parasitic inductances, the power module prototype is able to switch at record speeds of tens of nanoseconds with negligible ringing and voltage overshoot. An integrated common-mode current screen contains the current that is generated by these fast voltage transients within the power module, rather than flowing to the system ground. This screen connection simultaneously increases the partial discharge inception voltage by reducing the electric field strength at the triple point of the insulating ceramic substrate. Further, field-grading plates are used in the bus bar to reduce the electric field strength at the module terminations. The heat flux is addressed by employing direct-substrate, jet-impingement cooling. The cooler is integrated into the module housing for increased power density.
Advisors/Committee Members: Burgos, Rolando (committeechair), Boroyevich, Dushan (committeechair), Guido, Louis J. (committee member), Johnson, Mark (committee member), De La Reelopez, Jaime (committee member).
Subjects/Keywords: power electronics; silicon carbide; packaging; high voltage; electromagnetic interference
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APA (6th Edition):
Dimarino, C. M. (2019). Design and Validation of a High-Density 10 kV Silicon Carbide MOSFET Power Module with Reduced Electric Field Strength and Integrated Common-Mode Screen. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/86596
Chicago Manual of Style (16th Edition):
Dimarino, Christina Marie. “Design and Validation of a High-Density 10 kV Silicon Carbide MOSFET Power Module with Reduced Electric Field Strength and Integrated Common-Mode Screen.” 2019. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/86596.
MLA Handbook (7th Edition):
Dimarino, Christina Marie. “Design and Validation of a High-Density 10 kV Silicon Carbide MOSFET Power Module with Reduced Electric Field Strength and Integrated Common-Mode Screen.” 2019. Web. 16 Sep 2019.
Vancouver:
Dimarino CM. Design and Validation of a High-Density 10 kV Silicon Carbide MOSFET Power Module with Reduced Electric Field Strength and Integrated Common-Mode Screen. [Internet] [Doctoral dissertation]. Virginia Tech; 2019. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/86596.
Council of Science Editors:
Dimarino CM. Design and Validation of a High-Density 10 kV Silicon Carbide MOSFET Power Module with Reduced Electric Field Strength and Integrated Common-Mode Screen. [Doctoral Dissertation]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/86596
Virginia Tech
29.
Ohn, Sungjae.
Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected Converters.
Degree: PhD, Electrical Engineering, 2019, Virginia Tech
URL: http://hdl.handle.net/10919/89550
► The emergence of silicon-carbide (SiC) devices has been a 'game changer' in the field of power electronics. With desirable material properties such as low-loss characteristics,…
(more)
▼ The emergence of silicon-carbide (SiC) devices has been a 'game changer' in the field of power electronics. With desirable material properties such as low-loss characteristics, high blocking voltage, and high junction temperature operation, they are expected to drastically increase the power density of power electronics systems. Recent state-of-the-art designs show the power density over 17 ; however, certain factors limit the power density to increase beyond this limit. In this dissertation, three key factors are selected to increase the power density of SiC-based grid-connected three-phase converters. Throughout this dissertation, the techniques and strategies to increase the power density of SiC three-phase converters were investigated.
Firstly, a magnetic integration method was introduced for the coupled inductors in the interleaved three-phase converters. Due to limited current-capacity compared to the silicon insulated-gate bipolar transistors (Si-IGBTs), discrete SiC devices or SiC modules, operate in parallel to handle a large current. When three-phase inverters are paralleled, interleaving can be used, and coupled inductors are employed to limit the circulating current. In Chapter 2, the conventional integration method was extended to integrate three coupled inductors into two; one for differential-mode circulating current and the other for common-mode circulating current. By comparing with prior research work, a 20% reduction in size and weight is demonstrated.
From Chapter 3 to Chapter 5, a full-SiC uninterruptible power supply (UPS) was investigated. With the high switching frequency and fast switching dynamics of SiC devices, strategies on electromagnetic inference become more important, compared to Si-IGBT based inverters. Chapter 3 focuses on a common-mode equivalent circuit model for a topology and pulse width modulation (PWM) scheme selection, to set a noise mitigation strategy in the design phase. A three terminal common-mode electromagnetic interference (EMI) model is proposed, which predicts the impact of the dc-dc stage and a large battery-rack on the output CM noise. Based on the model, severe deterioration of noise by the dc-dc stage and battery-rack can be predicted. Special attention was paid on the selection of the dc-dc stage's topology and the PWM scheme to minimize the impact. With the mitigation strategy, a maximum 16 dB reduction on CM EMI can be achieved for a wide frequency range.
In Chapter 4, an active PWM scheme for a full-SiC three-level back-to-back converter was proposed. The PWM scheme targets the size reduction of two key components: dc-link capacitors and a common-mode EMI filter. The increase in switching frequency calls for a large common-mode EMI filter, and dc-link capacitors in the three-level topology may take a considerable portion in the total volume. To reduce the common-mode noise emission, different combinations of the voltage vectors are investigated to generate center-aligned single pulse common-mode voltage. By such an alignment of common-mode voltage with…
Advisors/Committee Members: Boroyevich, Dushan (committeechair), Burgos, Rolando (committeechair), Zhou, Wei (committee member), Lu, Guo Quan (committee member), Ngo, Khai D. (committee member).
Subjects/Keywords: Silicon-Carbide MOSFETs; Grid-connected Applications; Magnetic Integration; Uninterruptible Power Supply; Pulse Width Modulation; Electromagnetic Interference; Triangular Conduction Mode
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APA ·
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APA (6th Edition):
Ohn, S. (2019). Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected Converters. (Doctoral Dissertation). Virginia Tech. Retrieved from http://hdl.handle.net/10919/89550
Chicago Manual of Style (16th Edition):
Ohn, Sungjae. “Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected Converters.” 2019. Doctoral Dissertation, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/89550.
MLA Handbook (7th Edition):
Ohn, Sungjae. “Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected Converters.” 2019. Web. 16 Sep 2019.
Vancouver:
Ohn S. Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected Converters. [Internet] [Doctoral dissertation]. Virginia Tech; 2019. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/89550.
Council of Science Editors:
Ohn S. Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected Converters. [Doctoral Dissertation]. Virginia Tech; 2019. Available from: http://hdl.handle.net/10919/89550
30.
Qin, Ruiyang.
Study on Three-level DC/DC Converter with Coupled Inductors.
Degree: MS, Electrical and Computer Engineering, 2016, Virginia Tech
URL: http://hdl.handle.net/10919/73169
► High power multi-level converters are deemed as the mainstay power conversion technology for renewable energy systems including the battery storage system, PV farm and electrical…
(more)
▼ High power multi-level converters are deemed as the mainstay power conversion technology for renewable energy systems including the battery storage system, PV farm and electrical vehicle charge station. This thesis is focused on the study of three-level DC/DC converter with multi-phase interleaved structure, with coupled and integrated magnetics to achieve high power density. The proposed interleaved phased legs offer the benefit of output current ripple reduction, while inversed coupled inductors can suppress the circulating current between phase legs. Compared with conventional non-interleaving three-level DC/DC converter with non-coupling inductors, both inductor current ripple and output current ripple are largely reduced by interleaving with inverse-coupled inductors.
Because of the non-linearity of the inductor coupling, the equivalent circuit model is developed for the proposed interleaving structure. The model identifies the existence of multiple equivalent inductances during one switching cycle. A combination of them determines the inductor current ripple and dynamics of the system. By virtue of inverse coupling and means of controlling the coupling coefficients, one can minimize the current ripple and the unwanted circulating current.
To further reduce the magnetic volume, the four inductors in two-phase three-level DC/DC converter are integrated into one common structure, incorporating the negative coupling effects. The integrated magnetic structure can effectively suppress the circulating current and reduce the inductor current ripple and it is easy to manufacture. This thesis provides an equivalent circuit model to facilitate the design optimization of the integrated system.
A prototype of integrated coupled inductors is assembled with nano-crystalline C-C core and powder block core. It is tested with both impedance analyzer and single pulse tester, to guarantee proper mutual inductance for inductor current ripple and output current ripple target. With a two-phase three-level DC/DC converter hardware, the concept of integrated coupled inductors is verified, showing its good performance in high-voltage, high-power conversion applications.
Advisors/Committee Members: Lee, Fred C. (committeechair), Li, Qiang (committee member), Burgos, Rolando (committee member).
Subjects/Keywords: Coupled Inductors; Magnetic Integration; Multi-phase Three-level DC/DC; Interleaving
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APA ·
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APA (6th Edition):
Qin, R. (2016). Study on Three-level DC/DC Converter with Coupled Inductors. (Masters Thesis). Virginia Tech. Retrieved from http://hdl.handle.net/10919/73169
Chicago Manual of Style (16th Edition):
Qin, Ruiyang. “Study on Three-level DC/DC Converter with Coupled Inductors.” 2016. Masters Thesis, Virginia Tech. Accessed September 16, 2019.
http://hdl.handle.net/10919/73169.
MLA Handbook (7th Edition):
Qin, Ruiyang. “Study on Three-level DC/DC Converter with Coupled Inductors.” 2016. Web. 16 Sep 2019.
Vancouver:
Qin R. Study on Three-level DC/DC Converter with Coupled Inductors. [Internet] [Masters thesis]. Virginia Tech; 2016. [cited 2019 Sep 16].
Available from: http://hdl.handle.net/10919/73169.
Council of Science Editors:
Qin R. Study on Three-level DC/DC Converter with Coupled Inductors. [Masters Thesis]. Virginia Tech; 2016. Available from: http://hdl.handle.net/10919/73169
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Open Access Theses and Dissertations
