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You searched for +publisher:"University of Texas – Austin" +contributor:("Lin, Calvin"). Showing records 1 – 17 of 17 total matches.

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1. -2178-1988. Program analysis techniques for algorithmic complexity and relational properties.

Degree: PhD, Computer Science, 2019, University of Texas – Austin

 Analyzing standard safety properties of a given program has traditionally been the primary focus of the program analysis community. Unfortunately, there are still many interesting… (more)

Subjects/Keywords: Complexity testing; Optimal program synthesis; Fuzzing; Genetic programming; Performance bug; Vulnerability detection; Side channel; Static analysis; Relational verification; Reinforcement learning; Policy gradient

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APA (6th Edition):

-2178-1988. (2019). Program analysis techniques for algorithmic complexity and relational properties. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://dx.doi.org/10.26153/tsw/2181

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Chicago Manual of Style (16th Edition):

-2178-1988. “Program analysis techniques for algorithmic complexity and relational properties.” 2019. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://dx.doi.org/10.26153/tsw/2181.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

MLA Handbook (7th Edition):

-2178-1988. “Program analysis techniques for algorithmic complexity and relational properties.” 2019. Web. 24 Jan 2021.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

-2178-1988. Program analysis techniques for algorithmic complexity and relational properties. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2019. [cited 2021 Jan 24]. Available from: http://dx.doi.org/10.26153/tsw/2181.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Council of Science Editors:

-2178-1988. Program analysis techniques for algorithmic complexity and relational properties. [Doctoral Dissertation]. University of Texas – Austin; 2019. Available from: http://dx.doi.org/10.26153/tsw/2181

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete


University of Texas – Austin

2. Zheng, Tianhao, Ph. D. Efficient fine-grained virtual memory.

Degree: PhD, Electrical and Computer Engineering, 2018, University of Texas – Austin

 Virtual memory in modern computer systems provides a single abstraction of the memory hierarchy. By hiding fragmentation and overlays of physical memory, virtual memory frees… (more)

Subjects/Keywords: Memory; Cache; Metadata

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APA (6th Edition):

Zheng, Tianhao, P. D. (2018). Efficient fine-grained virtual memory. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/68079

Chicago Manual of Style (16th Edition):

Zheng, Tianhao, Ph D. “Efficient fine-grained virtual memory.” 2018. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/68079.

MLA Handbook (7th Edition):

Zheng, Tianhao, Ph D. “Efficient fine-grained virtual memory.” 2018. Web. 24 Jan 2021.

Vancouver:

Zheng, Tianhao PD. Efficient fine-grained virtual memory. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2018. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/68079.

Council of Science Editors:

Zheng, Tianhao PD. Efficient fine-grained virtual memory. [Doctoral Dissertation]. University of Texas – Austin; 2018. Available from: http://hdl.handle.net/2152/68079

3. Diamond, Jeffrey Robert. Designing on-chip memory systems for throughput architectures.

Degree: PhD, Computer science, 2015, University of Texas – Austin

 Driven by the high arithmetic intensity and embarrassingly parallel nature of real time computer graphics, GPUs became the first wide spread throughput architecture. With the… (more)

Subjects/Keywords: Computer architecture; Caching; Throughput; Arbitrary modulus indexing

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APA (6th Edition):

Diamond, J. R. (2015). Designing on-chip memory systems for throughput architectures. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/33306

Chicago Manual of Style (16th Edition):

Diamond, Jeffrey Robert. “Designing on-chip memory systems for throughput architectures.” 2015. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/33306.

MLA Handbook (7th Edition):

Diamond, Jeffrey Robert. “Designing on-chip memory systems for throughput architectures.” 2015. Web. 24 Jan 2021.

Vancouver:

Diamond JR. Designing on-chip memory systems for throughput architectures. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2015. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/33306.

Council of Science Editors:

Diamond JR. Designing on-chip memory systems for throughput architectures. [Doctoral Dissertation]. University of Texas – Austin; 2015. Available from: http://hdl.handle.net/2152/33306


University of Texas – Austin

4. Gong, Seong-Lyong. Memory protection techniques for DRAM scaling-induced errors.

Degree: PhD, Electrical and Computer Engineering, 2018, University of Texas – Austin

 Continued scaling of DRAM technologies induces more faulty DRAM cells than before. These inherent faults increase significantly at sub-20nm technology, and hence traditional remapping schemes… (more)

Subjects/Keywords: DRAM; Memory; ECC; Scaling errors

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APA (6th Edition):

Gong, S. (2018). Memory protection techniques for DRAM scaling-induced errors. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/68922

Chicago Manual of Style (16th Edition):

Gong, Seong-Lyong. “Memory protection techniques for DRAM scaling-induced errors.” 2018. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/68922.

MLA Handbook (7th Edition):

Gong, Seong-Lyong. “Memory protection techniques for DRAM scaling-induced errors.” 2018. Web. 24 Jan 2021.

Vancouver:

Gong S. Memory protection techniques for DRAM scaling-induced errors. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2018. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/68922.

Council of Science Editors:

Gong S. Memory protection techniques for DRAM scaling-induced errors. [Doctoral Dissertation]. University of Texas – Austin; 2018. Available from: http://hdl.handle.net/2152/68922

5. -1587-0677. Strong, thorough, and efficient memory protection against existing and emerging DRAM errors.

Degree: PhD, Electrical and Computer engineering, 2016, University of Texas – Austin

 Memory protection is necessary to ensure the correctness of data in the presence of unavoidable faults. As such, large-scale systems typically employ Error Correcting Codes… (more)

Subjects/Keywords: DRAM; Reliability; ECC; Error correcting codes; Compression

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APA (6th Edition):

-1587-0677. (2016). Strong, thorough, and efficient memory protection against existing and emerging DRAM errors. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/46770

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Chicago Manual of Style (16th Edition):

-1587-0677. “Strong, thorough, and efficient memory protection against existing and emerging DRAM errors.” 2016. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/46770.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

MLA Handbook (7th Edition):

-1587-0677. “Strong, thorough, and efficient memory protection against existing and emerging DRAM errors.” 2016. Web. 24 Jan 2021.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

-1587-0677. Strong, thorough, and efficient memory protection against existing and emerging DRAM errors. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2016. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/46770.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Council of Science Editors:

-1587-0677. Strong, thorough, and efficient memory protection against existing and emerging DRAM errors. [Doctoral Dissertation]. University of Texas – Austin; 2016. Available from: http://hdl.handle.net/2152/46770

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

6. -8037-0201. Formal verification of application and system programs based on a validated x86 ISA model.

Degree: PhD, Computer science, 2016, University of Texas – Austin

 Two main kinds of tools available for formal software verification are point tools and general-purpose tools. Point tools are targeted towards bug-hunting or proving a… (more)

Subjects/Keywords: Formal verification; x86 Machine-code analysis; x86 ISA; ACL2; Theorem proving; Program verification

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APA (6th Edition):

-8037-0201. (2016). Formal verification of application and system programs based on a validated x86 ISA model. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/46437

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Chicago Manual of Style (16th Edition):

-8037-0201. “Formal verification of application and system programs based on a validated x86 ISA model.” 2016. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/46437.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

MLA Handbook (7th Edition):

-8037-0201. “Formal verification of application and system programs based on a validated x86 ISA model.” 2016. Web. 24 Jan 2021.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

-8037-0201. Formal verification of application and system programs based on a validated x86 ISA model. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2016. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/46437.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Council of Science Editors:

-8037-0201. Formal verification of application and system programs based on a validated x86 ISA model. [Doctoral Dissertation]. University of Texas – Austin; 2016. Available from: http://hdl.handle.net/2152/46437

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete


University of Texas – Austin

7. Hur, Ibrahim. Enhancing memory controllers to improve DRAM power and performance.

Degree: PhD, Electrical and Computer Engineering, 2006, University of Texas – Austin

 Technological advances and new architectural techniques have enabled processor performance to double almost every two years. However, these performance improvements have not resulted in comparable… (more)

Subjects/Keywords: Computer storage devices; Memory management (Computer science)

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APA (6th Edition):

Hur, I. (2006). Enhancing memory controllers to improve DRAM power and performance. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/2886

Chicago Manual of Style (16th Edition):

Hur, Ibrahim. “Enhancing memory controllers to improve DRAM power and performance.” 2006. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/2886.

MLA Handbook (7th Edition):

Hur, Ibrahim. “Enhancing memory controllers to improve DRAM power and performance.” 2006. Web. 24 Jan 2021.

Vancouver:

Hur I. Enhancing memory controllers to improve DRAM power and performance. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2006. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/2886.

Council of Science Editors:

Hur I. Enhancing memory controllers to improve DRAM power and performance. [Doctoral Dissertation]. University of Texas – Austin; 2006. Available from: http://hdl.handle.net/2152/2886

8. Subramanian, Suriya. Dynamic software updates : a VM-centric approach.

Degree: PhD, Computer Sciences, 2010, University of Texas – Austin

 Because software systems are imperfect, developers are forced to fix bugs and add new features. The common way of applying changes to a running system… (more)

Subjects/Keywords: Programming languages; Object-oriented programming languages; Virtual Machines; Java Virtual Machines; Java; Dynamic software updating; Jvolve; Safe points; Updating code

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APA (6th Edition):

Subramanian, S. (2010). Dynamic software updates : a VM-centric approach. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2010-05-1436

Chicago Manual of Style (16th Edition):

Subramanian, Suriya. “Dynamic software updates : a VM-centric approach.” 2010. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2010-05-1436.

MLA Handbook (7th Edition):

Subramanian, Suriya. “Dynamic software updates : a VM-centric approach.” 2010. Web. 24 Jan 2021.

Vancouver:

Subramanian S. Dynamic software updates : a VM-centric approach. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2010. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2010-05-1436.

Council of Science Editors:

Subramanian S. Dynamic software updates : a VM-centric approach. [Doctoral Dissertation]. University of Texas – Austin; 2010. Available from: http://hdl.handle.net/2152/ETD-UT-2010-05-1436

9. Jibaja, Ivan. Exploiting hardware heterogeneity and parallelism for performance and energy efficiency of managed languages.

Degree: PhD, Computer science, 2015, University of Texas – Austin

 On the software side, managed languages and their workloads are ubiquitous, executing on mobile, desktop, and server hardware. Managed languages boost the productivity of programmers… (more)

Subjects/Keywords: Scheduling; Asymmetric; Multicore; Heterogeneous; Managed software; Languages; Performance; Energy; Parallelism; JavaScript; Java; SIMD

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APA (6th Edition):

Jibaja, I. (2015). Exploiting hardware heterogeneity and parallelism for performance and energy efficiency of managed languages. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/33304

Chicago Manual of Style (16th Edition):

Jibaja, Ivan. “Exploiting hardware heterogeneity and parallelism for performance and energy efficiency of managed languages.” 2015. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/33304.

MLA Handbook (7th Edition):

Jibaja, Ivan. “Exploiting hardware heterogeneity and parallelism for performance and energy efficiency of managed languages.” 2015. Web. 24 Jan 2021.

Vancouver:

Jibaja I. Exploiting hardware heterogeneity and parallelism for performance and energy efficiency of managed languages. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2015. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/33304.

Council of Science Editors:

Jibaja I. Exploiting hardware heterogeneity and parallelism for performance and energy efficiency of managed languages. [Doctoral Dissertation]. University of Texas – Austin; 2015. Available from: http://hdl.handle.net/2152/33304

10. Robatmili, Behnam. Efficient execution of sequential applications on multicore systems.

Degree: PhD, Computer Science, 2011, University of Texas – Austin

 Conventional CMOS scaling has been the engine of the technology revolution in most application domains. This trend has changed as in each technology generation, transistor… (more)

Subjects/Keywords: Microarchitecture; EDGE; Multicore; Single-thread performance; Dataflow; Block-atomic execution; Power efficiency; Composable cores

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APA (6th Edition):

Robatmili, B. (2011). Efficient execution of sequential applications on multicore systems. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2011-08-3987

Chicago Manual of Style (16th Edition):

Robatmili, Behnam. “Efficient execution of sequential applications on multicore systems.” 2011. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2011-08-3987.

MLA Handbook (7th Edition):

Robatmili, Behnam. “Efficient execution of sequential applications on multicore systems.” 2011. Web. 24 Jan 2021.

Vancouver:

Robatmili B. Efficient execution of sequential applications on multicore systems. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2011. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2011-08-3987.

Council of Science Editors:

Robatmili B. Efficient execution of sequential applications on multicore systems. [Doctoral Dissertation]. University of Texas – Austin; 2011. Available from: http://hdl.handle.net/2152/ETD-UT-2011-08-3987

11. Abraham, Sarah Anne. Fluid-based brush systems for novel digital media.

Degree: PhD, Computer science, 2015, University of Texas – Austin

 Digital media allows artists to create a wealth of visually-interesting effects that are impossible in traditional media. This includes temporal effects, such as cinemagraph animations… (more)

Subjects/Keywords: Painting systems; Non-photorealistic rendering; Digital brushes

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APA (6th Edition):

Abraham, S. A. (2015). Fluid-based brush systems for novel digital media. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/32931

Chicago Manual of Style (16th Edition):

Abraham, Sarah Anne. “Fluid-based brush systems for novel digital media.” 2015. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/32931.

MLA Handbook (7th Edition):

Abraham, Sarah Anne. “Fluid-based brush systems for novel digital media.” 2015. Web. 24 Jan 2021.

Vancouver:

Abraham SA. Fluid-based brush systems for novel digital media. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2015. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/32931.

Council of Science Editors:

Abraham SA. Fluid-based brush systems for novel digital media. [Doctoral Dissertation]. University of Texas – Austin; 2015. Available from: http://hdl.handle.net/2152/32931

12. Smith, Aaron Lee, 1977-. Explicit data graph compilation.

Degree: PhD, Computer Sciences, 2009, University of Texas – Austin

 Technology trends such as growing wire delays, power consumption limits, and diminishing clock rate improvements, present conventional instruction set architectures such as RISC, CISC, and… (more)

Subjects/Keywords: EDGE; Computer architecture; Compilers

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APA (6th Edition):

Smith, Aaron Lee, 1. (2009). Explicit data graph compilation. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2009-12-626

Chicago Manual of Style (16th Edition):

Smith, Aaron Lee, 1977-. “Explicit data graph compilation.” 2009. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2009-12-626.

MLA Handbook (7th Edition):

Smith, Aaron Lee, 1977-. “Explicit data graph compilation.” 2009. Web. 24 Jan 2021.

Vancouver:

Smith, Aaron Lee 1. Explicit data graph compilation. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2009. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2009-12-626.

Council of Science Editors:

Smith, Aaron Lee 1. Explicit data graph compilation. [Doctoral Dissertation]. University of Texas – Austin; 2009. Available from: http://hdl.handle.net/2152/ETD-UT-2009-12-626

13. Gebhart, Mark Alan. Energy-efficient mechanisms for managing on-chip storage in throughput processors.

Degree: PhD, Computer Science, 2012, University of Texas – Austin

 Modern computer systems are power or energy limited. While the number of transistors per chip continues to increase, classic Dennard voltage scaling has come to… (more)

Subjects/Keywords: Energy efficiency; Multi-threading; Register file organization; Throughput computing

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APA (6th Edition):

Gebhart, M. A. (2012). Energy-efficient mechanisms for managing on-chip storage in throughput processors. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2012-05-5141

Chicago Manual of Style (16th Edition):

Gebhart, Mark Alan. “Energy-efficient mechanisms for managing on-chip storage in throughput processors.” 2012. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2012-05-5141.

MLA Handbook (7th Edition):

Gebhart, Mark Alan. “Energy-efficient mechanisms for managing on-chip storage in throughput processors.” 2012. Web. 24 Jan 2021.

Vancouver:

Gebhart MA. Energy-efficient mechanisms for managing on-chip storage in throughput processors. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2012. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2012-05-5141.

Council of Science Editors:

Gebhart MA. Energy-efficient mechanisms for managing on-chip storage in throughput processors. [Doctoral Dissertation]. University of Texas – Austin; 2012. Available from: http://hdl.handle.net/2152/ETD-UT-2012-05-5141

14. Lee, Byeongcheol. Language and tool support for multilingual programs.

Degree: PhD, Computer Science, 2011, University of Texas – Austin

 Programmers compose programs in multiple languages to combine the advantages of innovations in new high-level programming languages with decades of engineering effort in legacy libraries… (more)

Subjects/Keywords: Multilingual programs; Composition; Interposition; Foreign function interface (FFI); Java native interface (JNI); Python/C; Dynamic analysis; FFI bugs; Specification; Specification generation; Type checking; Separate checking; Macros; Error messages; C

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APA (6th Edition):

Lee, B. (2011). Language and tool support for multilingual programs. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2011-08-4084

Chicago Manual of Style (16th Edition):

Lee, Byeongcheol. “Language and tool support for multilingual programs.” 2011. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2011-08-4084.

MLA Handbook (7th Edition):

Lee, Byeongcheol. “Language and tool support for multilingual programs.” 2011. Web. 24 Jan 2021.

Vancouver:

Lee B. Language and tool support for multilingual programs. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2011. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2011-08-4084.

Council of Science Editors:

Lee B. Language and tool support for multilingual programs. [Doctoral Dissertation]. University of Texas – Austin; 2011. Available from: http://hdl.handle.net/2152/ETD-UT-2011-08-4084

15. Jeong, Min Kyu. Core-characteristic-aware off-chip memory management in a multicore system-on-chip.

Degree: PhD, Electrical and Computer Engineering, 2012, University of Texas – Austin

 Future processors will integrate an increasing number of cores because the scaling of single-thread performance is limited and because smaller cores are more power efficient.… (more)

Subjects/Keywords: Memory; CMP; Locality; Parallelism; SoC; GPU; QoS

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APA (6th Edition):

Jeong, M. K. (2012). Core-characteristic-aware off-chip memory management in a multicore system-on-chip. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2012-12-6765

Chicago Manual of Style (16th Edition):

Jeong, Min Kyu. “Core-characteristic-aware off-chip memory management in a multicore system-on-chip.” 2012. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2012-12-6765.

MLA Handbook (7th Edition):

Jeong, Min Kyu. “Core-characteristic-aware off-chip memory management in a multicore system-on-chip.” 2012. Web. 24 Jan 2021.

Vancouver:

Jeong MK. Core-characteristic-aware off-chip memory management in a multicore system-on-chip. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2012. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2012-12-6765.

Council of Science Editors:

Jeong MK. Core-characteristic-aware off-chip memory management in a multicore system-on-chip. [Doctoral Dissertation]. University of Texas – Austin; 2012. Available from: http://hdl.handle.net/2152/ETD-UT-2012-12-6765


University of Texas – Austin

16. Wiedermann, Benjamin Alan. Integrating programming languages and databases via program analysis and language design.

Degree: PhD, Computer Sciences, 2009, University of Texas – Austin

 Researchers and practitioners alike have long sought to integrate programming languages and databases. Today's integration solutions focus on the data-types of the two domains, but… (more)

Subjects/Keywords: Programming languages; Databases; Transparent persistence; Impedance mismatch; Program analysis; Language design

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APA (6th Edition):

Wiedermann, B. A. (2009). Integrating programming languages and databases via program analysis and language design. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2009-12-687

Chicago Manual of Style (16th Edition):

Wiedermann, Benjamin Alan. “Integrating programming languages and databases via program analysis and language design.” 2009. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2009-12-687.

MLA Handbook (7th Edition):

Wiedermann, Benjamin Alan. “Integrating programming languages and databases via program analysis and language design.” 2009. Web. 24 Jan 2021.

Vancouver:

Wiedermann BA. Integrating programming languages and databases via program analysis and language design. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2009. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2009-12-687.

Council of Science Editors:

Wiedermann BA. Integrating programming languages and databases via program analysis and language design. [Doctoral Dissertation]. University of Texas – Austin; 2009. Available from: http://hdl.handle.net/2152/ETD-UT-2009-12-687


University of Texas – Austin

17. Chan, Ernie W., 1982-. Application of dependence analysis and runtime data flow graph scheduling to matrix computations.

Degree: PhD, Computer Sciences, 2010, University of Texas – Austin

 We present a methodology for exploiting shared-memory parallelism within matrix computations by expressing linear algebra algorithms as directed acyclic graphs. Our solution involves a separation… (more)

Subjects/Keywords: Matrix computation; Directed acyclic graph; Algorithm-by-blocks

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APA (6th Edition):

Chan, Ernie W., 1. (2010). Application of dependence analysis and runtime data flow graph scheduling to matrix computations. (Doctoral Dissertation). University of Texas – Austin. Retrieved from http://hdl.handle.net/2152/ETD-UT-2010-08-1563

Chicago Manual of Style (16th Edition):

Chan, Ernie W., 1982-. “Application of dependence analysis and runtime data flow graph scheduling to matrix computations.” 2010. Doctoral Dissertation, University of Texas – Austin. Accessed January 24, 2021. http://hdl.handle.net/2152/ETD-UT-2010-08-1563.

MLA Handbook (7th Edition):

Chan, Ernie W., 1982-. “Application of dependence analysis and runtime data flow graph scheduling to matrix computations.” 2010. Web. 24 Jan 2021.

Vancouver:

Chan, Ernie W. 1. Application of dependence analysis and runtime data flow graph scheduling to matrix computations. [Internet] [Doctoral dissertation]. University of Texas – Austin; 2010. [cited 2021 Jan 24]. Available from: http://hdl.handle.net/2152/ETD-UT-2010-08-1563.

Council of Science Editors:

Chan, Ernie W. 1. Application of dependence analysis and runtime data flow graph scheduling to matrix computations. [Doctoral Dissertation]. University of Texas – Austin; 2010. Available from: http://hdl.handle.net/2152/ETD-UT-2010-08-1563

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