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You searched for +publisher:"University of Notre Dame" +contributor:("Peter Kogge, Committee Member"). Showing records 1 – 13 of 13 total matches.

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University of Notre Dame

1. Peter James Bui. AIR: Accelerated Image Registration</h1>.

Degree: MSin Computer Science and Engineering, Computer Science and Engineering, 2010, University of Notre Dame

  This thesis presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming environment… (more)

Subjects/Keywords: performance analysis; gpgpu; image registration

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APA (6th Edition):

Bui, P. J. (2010). AIR: Accelerated Image Registration</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/d217qn61s8s

Chicago Manual of Style (16th Edition):

Bui, Peter James. “AIR: Accelerated Image Registration</h1>.” 2010. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/d217qn61s8s.

MLA Handbook (7th Edition):

Bui, Peter James. “AIR: Accelerated Image Registration</h1>.” 2010. Web. 30 Mar 2020.

Vancouver:

Bui PJ. AIR: Accelerated Image Registration</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2010. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/d217qn61s8s.

Council of Science Editors:

Bui PJ. AIR: Accelerated Image Registration</h1>. [Masters Thesis]. University of Notre Dame; 2010. Available from: https://curate.nd.edu/show/d217qn61s8s


University of Notre Dame

2. Michael Stephen Crocker. Design, Fault Studies, and Performance Analysis for Nanomagnet Logic PLAS and Other Nanomagnet Logic Architectures</h1>.

Degree: PhD, Computer Science and Engineering, 2011, University of Notre Dame

  In order to continue the performance and scaling trends that we have come to expect from Moore’s Law, many emergent computational models, devices, and… (more)

Subjects/Keywords: Design; Validation; Computer Architecture; Defects; Nanomagnet Logic; Programmable Logic Arrays

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APA (6th Edition):

Crocker, M. S. (2011). Design, Fault Studies, and Performance Analysis for Nanomagnet Logic PLAS and Other Nanomagnet Logic Architectures</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/1544bp0140q

Chicago Manual of Style (16th Edition):

Crocker, Michael Stephen. “Design, Fault Studies, and Performance Analysis for Nanomagnet Logic PLAS and Other Nanomagnet Logic Architectures</h1>.” 2011. Doctoral Dissertation, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/1544bp0140q.

MLA Handbook (7th Edition):

Crocker, Michael Stephen. “Design, Fault Studies, and Performance Analysis for Nanomagnet Logic PLAS and Other Nanomagnet Logic Architectures</h1>.” 2011. Web. 30 Mar 2020.

Vancouver:

Crocker MS. Design, Fault Studies, and Performance Analysis for Nanomagnet Logic PLAS and Other Nanomagnet Logic Architectures</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2011. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/1544bp0140q.

Council of Science Editors:

Crocker MS. Design, Fault Studies, and Performance Analysis for Nanomagnet Logic PLAS and Other Nanomagnet Logic Architectures</h1>. [Doctoral Dissertation]. University of Notre Dame; 2011. Available from: https://curate.nd.edu/show/1544bp0140q


University of Notre Dame

3. Michael James Gonzales. Safety-Critical Healthcare Technology Design</h1>.

Degree: PhD, Computer Science and Engineering, 2016, University of Notre Dame

  Preventable medical errors are a severe problem in healthcare, causing over 400,000 deaths per year in US hospitals alone. In acute care, the branch… (more)

Subjects/Keywords: healthcare; computer-supported collaborative work; resuscitation; health informatics; healthcare engineering; human factors; cognitive aids; human-computer interaction; acute care; patient safety

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APA (6th Edition):

Gonzales, M. J. (2016). Safety-Critical Healthcare Technology Design</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/g732d794172

Chicago Manual of Style (16th Edition):

Gonzales, Michael James. “Safety-Critical Healthcare Technology Design</h1>.” 2016. Doctoral Dissertation, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/g732d794172.

MLA Handbook (7th Edition):

Gonzales, Michael James. “Safety-Critical Healthcare Technology Design</h1>.” 2016. Web. 30 Mar 2020.

Vancouver:

Gonzales MJ. Safety-Critical Healthcare Technology Design</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2016. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/g732d794172.

Council of Science Editors:

Gonzales MJ. Safety-Critical Healthcare Technology Design</h1>. [Doctoral Dissertation]. University of Notre Dame; 2016. Available from: https://curate.nd.edu/show/g732d794172


University of Notre Dame

4. Matthew Van Antwerp. Temporal and Topological Analysis of Open Source Software Networks</h1>.

Degree: PhD, Computer Science and Engineering, 2013, University of Notre Dame

  This document presents work examining Open Source Software (OSS) project and developer networks, built from Concurrent Versions System (CVS) log data, from topological and… (more)

Subjects/Keywords: project success; open source software; sourceforge; network structure; savannah

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APA (6th Edition):

Antwerp, M. V. (2013). Temporal and Topological Analysis of Open Source Software Networks</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/vh53ws87t0c

Chicago Manual of Style (16th Edition):

Antwerp, Matthew Van. “Temporal and Topological Analysis of Open Source Software Networks</h1>.” 2013. Doctoral Dissertation, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/vh53ws87t0c.

MLA Handbook (7th Edition):

Antwerp, Matthew Van. “Temporal and Topological Analysis of Open Source Software Networks</h1>.” 2013. Web. 30 Mar 2020.

Vancouver:

Antwerp MV. Temporal and Topological Analysis of Open Source Software Networks</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2013. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/vh53ws87t0c.

Council of Science Editors:

Antwerp MV. Temporal and Topological Analysis of Open Source Software Networks</h1>. [Doctoral Dissertation]. University of Notre Dame; 2013. Available from: https://curate.nd.edu/show/vh53ws87t0c


University of Notre Dame

5. Sheng Li. An Integrated Power, Area, and Timing Modeling Framework for the Design of Multithreaded and Multi/Manycore Architectures</h1>.

Degree: PhD, Electrical Engineering, 2010, University of Notre Dame

  Multithreaded and multi/manycore processors have already become an important new research direction. These processors have demonstrated great performance and efficiency advantages. This dissertation presents… (more)

Subjects/Keywords: modeling; power; multicore processor; area; timing

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APA (6th Edition):

Li, S. (2010). An Integrated Power, Area, and Timing Modeling Framework for the Design of Multithreaded and Multi/Manycore Architectures</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/02870v8510q

Chicago Manual of Style (16th Edition):

Li, Sheng. “An Integrated Power, Area, and Timing Modeling Framework for the Design of Multithreaded and Multi/Manycore Architectures</h1>.” 2010. Doctoral Dissertation, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/02870v8510q.

MLA Handbook (7th Edition):

Li, Sheng. “An Integrated Power, Area, and Timing Modeling Framework for the Design of Multithreaded and Multi/Manycore Architectures</h1>.” 2010. Web. 30 Mar 2020.

Vancouver:

Li S. An Integrated Power, Area, and Timing Modeling Framework for the Design of Multithreaded and Multi/Manycore Architectures</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2010. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/02870v8510q.

Council of Science Editors:

Li S. An Integrated Power, Area, and Timing Modeling Framework for the Design of Multithreaded and Multi/Manycore Architectures</h1>. [Doctoral Dissertation]. University of Notre Dame; 2010. Available from: https://curate.nd.edu/show/02870v8510q


University of Notre Dame

6. Kyle Bruce Wheeler. Exploiting Locality with Qthreads for Portable Parallel Performance</h1>.

Degree: PhD, Computer Science and Engineering, 2009, University of Notre Dame

  Large scale hardware-supported multithreading, an attractive means of increasing computational power, benefits significantly from low per-thread costs. Hardware support for lightweight threads and synchronization… (more)

Subjects/Keywords: state; lightweight; data structures; adaptive; memory; topology

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APA (6th Edition):

Wheeler, K. B. (2009). Exploiting Locality with Qthreads for Portable Parallel Performance</h1>. (Doctoral Dissertation). University of Notre Dame. Retrieved from https://curate.nd.edu/show/st74cn7230q

Chicago Manual of Style (16th Edition):

Wheeler, Kyle Bruce. “Exploiting Locality with Qthreads for Portable Parallel Performance</h1>.” 2009. Doctoral Dissertation, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/st74cn7230q.

MLA Handbook (7th Edition):

Wheeler, Kyle Bruce. “Exploiting Locality with Qthreads for Portable Parallel Performance</h1>.” 2009. Web. 30 Mar 2020.

Vancouver:

Wheeler KB. Exploiting Locality with Qthreads for Portable Parallel Performance</h1>. [Internet] [Doctoral dissertation]. University of Notre Dame; 2009. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/st74cn7230q.

Council of Science Editors:

Wheeler KB. Exploiting Locality with Qthreads for Portable Parallel Performance</h1>. [Doctoral Dissertation]. University of Notre Dame; 2009. Available from: https://curate.nd.edu/show/st74cn7230q


University of Notre Dame

7. Amit Kashyap. Exploration of Chip Level Architecture of a Multithreaded PIM System</h1>.

Degree: MSin Electrical Engineering, Electrical Engineering, 2007, University of Notre Dame

  Lightweight Processing addresses the memory wall problem with a different approach. It tolerates memory latency by providing fast access to multiple lightweight threads of… (more)

Subjects/Keywords: LWP

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APA (6th Edition):

Kashyap, A. (2007). Exploration of Chip Level Architecture of a Multithreaded PIM System</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/73666397v85

Chicago Manual of Style (16th Edition):

Kashyap, Amit. “Exploration of Chip Level Architecture of a Multithreaded PIM System</h1>.” 2007. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/73666397v85.

MLA Handbook (7th Edition):

Kashyap, Amit. “Exploration of Chip Level Architecture of a Multithreaded PIM System</h1>.” 2007. Web. 30 Mar 2020.

Vancouver:

Kashyap A. Exploration of Chip Level Architecture of a Multithreaded PIM System</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2007. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/73666397v85.

Council of Science Editors:

Kashyap A. Exploration of Chip Level Architecture of a Multithreaded PIM System</h1>. [Masters Thesis]. University of Notre Dame; 2007. Available from: https://curate.nd.edu/show/73666397v85


University of Notre Dame

8. Dana Wheeler. Optical Interference Logic in Silicon-on-Insulator Substrates</h1>.

Degree: MSin Electrical Engineering, Electrical Engineering, 2005, University of Notre Dame

  Light has long been investigated as a medium in which to realize logic. The invention of the laser in 1958 generated great interest in… (more)

Subjects/Keywords: optical logic

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APA (6th Edition):

Wheeler, D. (2005). Optical Interference Logic in Silicon-on-Insulator Substrates</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/th83kw55151

Chicago Manual of Style (16th Edition):

Wheeler, Dana. “Optical Interference Logic in Silicon-on-Insulator Substrates</h1>.” 2005. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/th83kw55151.

MLA Handbook (7th Edition):

Wheeler, Dana. “Optical Interference Logic in Silicon-on-Insulator Substrates</h1>.” 2005. Web. 30 Mar 2020.

Vancouver:

Wheeler D. Optical Interference Logic in Silicon-on-Insulator Substrates</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2005. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/th83kw55151.

Council of Science Editors:

Wheeler D. Optical Interference Logic in Silicon-on-Insulator Substrates</h1>. [Masters Thesis]. University of Notre Dame; 2005. Available from: https://curate.nd.edu/show/th83kw55151


University of Notre Dame

9. Shyamkumar Thoziyoor. Pim Lite: Vlsi Prototype of a Multithreaded Processor-In-Memory Chip</h1>.

Degree: MSin Computer Science and Engineering, Computer Science and Engineering, 2004, University of Notre Dame

  We describe the VLSI implementation of PIM Lite, a prototype of the first multithreaded PIM chip. We give details about the RTL VHDL model,… (more)

Subjects/Keywords: deep-submicron; computer architecture; VLSI; VHDL; power distribution; DRC; clock distribution; processing-in-memory; intelligent RAM

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APA (6th Edition):

Thoziyoor, S. (2004). Pim Lite: Vlsi Prototype of a Multithreaded Processor-In-Memory Chip</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/2514nk33w25

Chicago Manual of Style (16th Edition):

Thoziyoor, Shyamkumar. “Pim Lite: Vlsi Prototype of a Multithreaded Processor-In-Memory Chip</h1>.” 2004. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/2514nk33w25.

MLA Handbook (7th Edition):

Thoziyoor, Shyamkumar. “Pim Lite: Vlsi Prototype of a Multithreaded Processor-In-Memory Chip</h1>.” 2004. Web. 30 Mar 2020.

Vancouver:

Thoziyoor S. Pim Lite: Vlsi Prototype of a Multithreaded Processor-In-Memory Chip</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2004. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/2514nk33w25.

Council of Science Editors:

Thoziyoor S. Pim Lite: Vlsi Prototype of a Multithreaded Processor-In-Memory Chip</h1>. [Masters Thesis]. University of Notre Dame; 2004. Available from: https://curate.nd.edu/show/2514nk33w25


University of Notre Dame

10. Trevor Mendo Cickovski. BioLogo, a Domain-Specific Language for Morphogenesis</h1>.

Degree: MS, Computer Science and Engineering, 2004, University of Notre Dame

  Morphogenesis governs the clustering and pattern formation of embryonic cells into bone and organs. Many of the patterning instabilities that result from cell interaction… (more)

Subjects/Keywords: domain-specific language; morphogenesis; cellular potts model

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APA (6th Edition):

Cickovski, T. M. (2004). BioLogo, a Domain-Specific Language for Morphogenesis</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/tx31qf8854h

Chicago Manual of Style (16th Edition):

Cickovski, Trevor Mendo. “BioLogo, a Domain-Specific Language for Morphogenesis</h1>.” 2004. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/tx31qf8854h.

MLA Handbook (7th Edition):

Cickovski, Trevor Mendo. “BioLogo, a Domain-Specific Language for Morphogenesis</h1>.” 2004. Web. 30 Mar 2020.

Vancouver:

Cickovski TM. BioLogo, a Domain-Specific Language for Morphogenesis</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2004. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/tx31qf8854h.

Council of Science Editors:

Cickovski TM. BioLogo, a Domain-Specific Language for Morphogenesis</h1>. [Masters Thesis]. University of Notre Dame; 2004. Available from: https://curate.nd.edu/show/tx31qf8854h


University of Notre Dame

11. Michael Stephen Crocker. Study of Spacings and Defects in Molecular QCA and Design of a QCA-based Programmable Logic Array</h1>.

Degree: MSin Computer Science and Engineering, Computer Science and Engineering, 2008, University of Notre Dame

  There has been a remarkable growth rate in computing performance for many years, however, the technology roadmap has indicated that current scaling trends cannot… (more)

Subjects/Keywords: reconfigurable logic; nanotechnology; defect tolerance; computer architecture; PLA

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APA (6th Edition):

Crocker, M. S. (2008). Study of Spacings and Defects in Molecular QCA and Design of a QCA-based Programmable Logic Array</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/1v53jw8420g

Chicago Manual of Style (16th Edition):

Crocker, Michael Stephen. “Study of Spacings and Defects in Molecular QCA and Design of a QCA-based Programmable Logic Array</h1>.” 2008. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/1v53jw8420g.

MLA Handbook (7th Edition):

Crocker, Michael Stephen. “Study of Spacings and Defects in Molecular QCA and Design of a QCA-based Programmable Logic Array</h1>.” 2008. Web. 30 Mar 2020.

Vancouver:

Crocker MS. Study of Spacings and Defects in Molecular QCA and Design of a QCA-based Programmable Logic Array</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2008. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/1v53jw8420g.

Council of Science Editors:

Crocker MS. Study of Spacings and Defects in Molecular QCA and Design of a QCA-based Programmable Logic Array</h1>. [Masters Thesis]. University of Notre Dame; 2008. Available from: https://curate.nd.edu/show/1v53jw8420g


University of Notre Dame

12. Branden James Moore. Exploiting Large Shared On-Chip Caches for Chip Multiprocessors</h1>.

Degree: MSin Computer Science and Engineering, Computer Science and Engineering, 2005, University of Notre Dame

  Chip multiprocessors are one of several emerging architectures that address the growing processor memory performance gap. At the same time, advances in chip manufacturing… (more)

Subjects/Keywords: chip multiprocessors; shared caches; merged logic and DRAM

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APA (6th Edition):

Moore, B. J. (2005). Exploiting Large Shared On-Chip Caches for Chip Multiprocessors</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/tb09j388f4p

Chicago Manual of Style (16th Edition):

Moore, Branden James. “Exploiting Large Shared On-Chip Caches for Chip Multiprocessors</h1>.” 2005. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/tb09j388f4p.

MLA Handbook (7th Edition):

Moore, Branden James. “Exploiting Large Shared On-Chip Caches for Chip Multiprocessors</h1>.” 2005. Web. 30 Mar 2020.

Vancouver:

Moore BJ. Exploiting Large Shared On-Chip Caches for Chip Multiprocessors</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2005. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/tb09j388f4p.

Council of Science Editors:

Moore BJ. Exploiting Large Shared On-Chip Caches for Chip Multiprocessors</h1>. [Masters Thesis]. University of Notre Dame; 2005. Available from: https://curate.nd.edu/show/tb09j388f4p


University of Notre Dame

13. Kevin Matthew Whitton. Creation of Dedicated Radiation Dose Calculation Hardware</h1>.

Degree: MSin Computer Science and Engineering, Computer Science and Engineering, 2005, University of Notre Dame

  Radiation dose calculation is an important step in the treatment of patients requiring radiation therapy. It ensures that the physician prescribed dose agrees with… (more)

Subjects/Keywords: Radiation Dose Calculation; Pipelining; Convolution; SOPC; FPGA

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APA (6th Edition):

Whitton, K. M. (2005). Creation of Dedicated Radiation Dose Calculation Hardware</h1>. (Masters Thesis). University of Notre Dame. Retrieved from https://curate.nd.edu/show/tm70ms38b3q

Chicago Manual of Style (16th Edition):

Whitton, Kevin Matthew. “Creation of Dedicated Radiation Dose Calculation Hardware</h1>.” 2005. Masters Thesis, University of Notre Dame. Accessed March 30, 2020. https://curate.nd.edu/show/tm70ms38b3q.

MLA Handbook (7th Edition):

Whitton, Kevin Matthew. “Creation of Dedicated Radiation Dose Calculation Hardware</h1>.” 2005. Web. 30 Mar 2020.

Vancouver:

Whitton KM. Creation of Dedicated Radiation Dose Calculation Hardware</h1>. [Internet] [Masters thesis]. University of Notre Dame; 2005. [cited 2020 Mar 30]. Available from: https://curate.nd.edu/show/tm70ms38b3q.

Council of Science Editors:

Whitton KM. Creation of Dedicated Radiation Dose Calculation Hardware</h1>. [Masters Thesis]. University of Notre Dame; 2005. Available from: https://curate.nd.edu/show/tm70ms38b3q

.