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You searched for +publisher:"University of New Mexico" +contributor:("Zarkesh-Ha, Payman"). Showing records 1 – 30 of 32 total matches.

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University of New Mexico

1. Khoshakhlagh, Anahita. Design of a Readout Integrated Circuit (ROIC) for Infrared Imaging Applications.

Degree: Electrical and Computer Engineering, 2011, University of New Mexico

 There has been a growing interest in using Infrared (IR) imaging systems in various applications ranging from medical diagnosis to military surveillance. The quality of… (more)

Subjects/Keywords: Readout Integrated Circuit (ROIC); IR Imaging; Focal Plane Array (FPA); Integrate-While-Read and Integrate-Then-Read

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APA (6th Edition):

Khoshakhlagh, A. (2011). Design of a Readout Integrated Circuit (ROIC) for Infrared Imaging Applications. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/12046

Chicago Manual of Style (16th Edition):

Khoshakhlagh, Anahita. “Design of a Readout Integrated Circuit (ROIC) for Infrared Imaging Applications.” 2011. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/12046.

MLA Handbook (7th Edition):

Khoshakhlagh, Anahita. “Design of a Readout Integrated Circuit (ROIC) for Infrared Imaging Applications.” 2011. Web. 04 Apr 2020.

Vancouver:

Khoshakhlagh A. Design of a Readout Integrated Circuit (ROIC) for Infrared Imaging Applications. [Internet] [Masters thesis]. University of New Mexico; 2011. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/12046.

Council of Science Editors:

Khoshakhlagh A. Design of a Readout Integrated Circuit (ROIC) for Infrared Imaging Applications. [Masters Thesis]. University of New Mexico; 2011. Available from: http://hdl.handle.net/1928/12046


University of New Mexico

2. Dey, Preyom. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits.

Degree: Electrical and Computer Engineering, 2015, University of New Mexico

  The demand of extremely long battery life for electronic devices is the driving force for modern semiconductor industry in recent years. Supply voltage scaling… (more)

Subjects/Keywords: Ultra Low Voltage Design; Electrical and Computer Engineering

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APA (6th Edition):

Dey, P. (2015). Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/27922

Chicago Manual of Style (16th Edition):

Dey, Preyom. “Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits.” 2015. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/27922.

MLA Handbook (7th Edition):

Dey, Preyom. “Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits.” 2015. Web. 04 Apr 2020.

Vancouver:

Dey P. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits. [Internet] [Masters thesis]. University of New Mexico; 2015. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/27922.

Council of Science Editors:

Dey P. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits. [Masters Thesis]. University of New Mexico; 2015. Available from: http://hdl.handle.net/1928/27922


University of New Mexico

3. Bezerra, George. Energy consumption in networks on chip : efficiency and scaling.

Degree: Department of Computer Science, 2012, University of New Mexico

 Computer architecture design is in a new era where performance is increased by replicating processing cores on a chip rather than making CPUs larger and… (more)

Subjects/Keywords: multi-core; many-core; energy consumption; communicaiton locality; scaling

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APA (6th Edition):

Bezerra, G. (2012). Energy consumption in networks on chip : efficiency and scaling. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/21020

Chicago Manual of Style (16th Edition):

Bezerra, George. “Energy consumption in networks on chip : efficiency and scaling.” 2012. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/21020.

MLA Handbook (7th Edition):

Bezerra, George. “Energy consumption in networks on chip : efficiency and scaling.” 2012. Web. 04 Apr 2020.

Vancouver:

Bezerra G. Energy consumption in networks on chip : efficiency and scaling. [Internet] [Doctoral dissertation]. University of New Mexico; 2012. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/21020.

Council of Science Editors:

Bezerra G. Energy consumption in networks on chip : efficiency and scaling. [Doctoral Dissertation]. University of New Mexico; 2012. Available from: http://hdl.handle.net/1928/21020


University of New Mexico

4. Aarestad, James. Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect.

Degree: Electrical and Computer Engineering, 2011, University of New Mexico

 Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation… (more)

Subjects/Keywords: Delay faults (Semiconductors); Silicon-on-insulator technology.

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APA (6th Edition):

Aarestad, J. (2011). Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/12832

Chicago Manual of Style (16th Edition):

Aarestad, James. “Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect.” 2011. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/12832.

MLA Handbook (7th Edition):

Aarestad, James. “Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect.” 2011. Web. 04 Apr 2020.

Vancouver:

Aarestad J. Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect. [Internet] [Masters thesis]. University of New Mexico; 2011. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/12832.

Council of Science Editors:

Aarestad J. Characterizing within-die and die-to-die delay variations introduced By process variations and SOI history effect. [Masters Thesis]. University of New Mexico; 2011. Available from: http://hdl.handle.net/1928/12832


University of New Mexico

5. Bonnie, Amanda. Experimental Design and Comparative Testing of a Hybrid-Cooled Computer Cluster.

Degree: Electrical and Computer Engineering, 2015, University of New Mexico

 With water cooling becoming an affordable option both at home and at scale, it is important to consider the possible benefits over air cooling. There… (more)

Subjects/Keywords: water cooling; power savings; varied temperatures; performance; water vs. air; data center; compute cluster; jitter

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APA (6th Edition):

Bonnie, A. (2015). Experimental Design and Comparative Testing of a Hybrid-Cooled Computer Cluster. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/30320

Chicago Manual of Style (16th Edition):

Bonnie, Amanda. “Experimental Design and Comparative Testing of a Hybrid-Cooled Computer Cluster.” 2015. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/30320.

MLA Handbook (7th Edition):

Bonnie, Amanda. “Experimental Design and Comparative Testing of a Hybrid-Cooled Computer Cluster.” 2015. Web. 04 Apr 2020.

Vancouver:

Bonnie A. Experimental Design and Comparative Testing of a Hybrid-Cooled Computer Cluster. [Internet] [Masters thesis]. University of New Mexico; 2015. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/30320.

Council of Science Editors:

Bonnie A. Experimental Design and Comparative Testing of a Hybrid-Cooled Computer Cluster. [Masters Thesis]. University of New Mexico; 2015. Available from: http://hdl.handle.net/1928/30320


University of New Mexico

6. Briggs, Matthew. Improving Mobile SOC's Performance as an Energy Efficient DSP Platform with Heterogeneous Computing.

Degree: Electrical and Computer Engineering, 2015, University of New Mexico

 Mobile system-on-chip (SOC) technology is improving at a staggering rate spurred primarily by the adoption of smartphones and tablets. This rapid innovation has allowed the… (more)

Subjects/Keywords: SOC; Android; Renderscript; DFT; FFT; Power

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APA (6th Edition):

Briggs, M. (2015). Improving Mobile SOC's Performance as an Energy Efficient DSP Platform with Heterogeneous Computing. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/25733

Chicago Manual of Style (16th Edition):

Briggs, Matthew. “Improving Mobile SOC's Performance as an Energy Efficient DSP Platform with Heterogeneous Computing.” 2015. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/25733.

MLA Handbook (7th Edition):

Briggs, Matthew. “Improving Mobile SOC's Performance as an Energy Efficient DSP Platform with Heterogeneous Computing.” 2015. Web. 04 Apr 2020.

Vancouver:

Briggs M. Improving Mobile SOC's Performance as an Energy Efficient DSP Platform with Heterogeneous Computing. [Internet] [Masters thesis]. University of New Mexico; 2015. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/25733.

Council of Science Editors:

Briggs M. Improving Mobile SOC's Performance as an Energy Efficient DSP Platform with Heterogeneous Computing. [Masters Thesis]. University of New Mexico; 2015. Available from: http://hdl.handle.net/1928/25733


University of New Mexico

7. Chakraborty, Raj. Novel Transistor Resistance Variation-based Physical Unclonable Functions with On-Chip Voltage-to-Digital Converter Designed for Use in Cryptographic and Authentication Applications.

Degree: Electrical and Computer Engineering, 2014, University of New Mexico

 Security mechanisms such as encryption, authentication, and feature activation depend on the integrity of embedded secret keys. Currently, this keying material is stored as digital… (more)

Subjects/Keywords: Physical unclonable functions; cryptography; hardware security; authentication; temperature stability; bitstring

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APA (6th Edition):

Chakraborty, R. (2014). Novel Transistor Resistance Variation-based Physical Unclonable Functions with On-Chip Voltage-to-Digital Converter Designed for Use in Cryptographic and Authentication Applications. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/24544

Chicago Manual of Style (16th Edition):

Chakraborty, Raj. “Novel Transistor Resistance Variation-based Physical Unclonable Functions with On-Chip Voltage-to-Digital Converter Designed for Use in Cryptographic and Authentication Applications.” 2014. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/24544.

MLA Handbook (7th Edition):

Chakraborty, Raj. “Novel Transistor Resistance Variation-based Physical Unclonable Functions with On-Chip Voltage-to-Digital Converter Designed for Use in Cryptographic and Authentication Applications.” 2014. Web. 04 Apr 2020.

Vancouver:

Chakraborty R. Novel Transistor Resistance Variation-based Physical Unclonable Functions with On-Chip Voltage-to-Digital Converter Designed for Use in Cryptographic and Authentication Applications. [Internet] [Doctoral dissertation]. University of New Mexico; 2014. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/24544.

Council of Science Editors:

Chakraborty R. Novel Transistor Resistance Variation-based Physical Unclonable Functions with On-Chip Voltage-to-Digital Converter Designed for Use in Cryptographic and Authentication Applications. [Doctoral Dissertation]. University of New Mexico; 2014. Available from: http://hdl.handle.net/1928/24544


University of New Mexico

8. Essenmacher, Paul. A real-time, reconfigurable system for energy, error-resilient, and scalable lossless ECG coding.

Degree: Electrical and Computer Engineering, 2011, University of New Mexico

 Electrocardiogram (ECG) monitoring systems have evolved to the point where they are now portable and can monitor the patient 24/7 and transmit alerts and ECG… (more)

Subjects/Keywords: Electrocardiography – Data processing.; Error-correcting codes (Information theory)

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APA (6th Edition):

Essenmacher, P. (2011). A real-time, reconfigurable system for energy, error-resilient, and scalable lossless ECG coding. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/13084

Chicago Manual of Style (16th Edition):

Essenmacher, Paul. “A real-time, reconfigurable system for energy, error-resilient, and scalable lossless ECG coding.” 2011. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/13084.

MLA Handbook (7th Edition):

Essenmacher, Paul. “A real-time, reconfigurable system for energy, error-resilient, and scalable lossless ECG coding.” 2011. Web. 04 Apr 2020.

Vancouver:

Essenmacher P. A real-time, reconfigurable system for energy, error-resilient, and scalable lossless ECG coding. [Internet] [Masters thesis]. University of New Mexico; 2011. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/13084.

Council of Science Editors:

Essenmacher P. A real-time, reconfigurable system for energy, error-resilient, and scalable lossless ECG coding. [Masters Thesis]. University of New Mexico; 2011. Available from: http://hdl.handle.net/1928/13084


University of New Mexico

9. Gu, Feng. Applying Multi-Packet Reception with DTN in Vehicular Ad-hoc Networks.

Degree: Electrical and Computer Engineering, 2011, University of New Mexico

 In the past decades, wireless network technologies have been widely applied to numerous different scenarios, in which Vehicular ad-hoc network (VANET) is one application that… (more)

Subjects/Keywords: Vehicular ad hoc networks; Delay Tolerant Networks; Multi-packet Reception; MAC

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APA (6th Edition):

Gu, F. (2011). Applying Multi-Packet Reception with DTN in Vehicular Ad-hoc Networks. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/12040

Chicago Manual of Style (16th Edition):

Gu, Feng. “Applying Multi-Packet Reception with DTN in Vehicular Ad-hoc Networks.” 2011. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/12040.

MLA Handbook (7th Edition):

Gu, Feng. “Applying Multi-Packet Reception with DTN in Vehicular Ad-hoc Networks.” 2011. Web. 04 Apr 2020.

Vancouver:

Gu F. Applying Multi-Packet Reception with DTN in Vehicular Ad-hoc Networks. [Internet] [Masters thesis]. University of New Mexico; 2011. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/12040.

Council of Science Editors:

Gu F. Applying Multi-Packet Reception with DTN in Vehicular Ad-hoc Networks. [Masters Thesis]. University of New Mexico; 2011. Available from: http://hdl.handle.net/1928/12040


University of New Mexico

10. Helinski, Ryan Lee. A Physical Unclonable Function derived from the power distribution system of an integrated circuit.

Degree: Electrical and Computer Engineering, 2011, University of New Mexico

 Hardware support for security mechanisms such as authentication, cryptographic protocols, digital rights management and hardware metering depend heavily on the security of embedded secret keys.… (more)

Subjects/Keywords: Computers – Circuits – Design and construction.; Integrated circuits – Verification.; Computer security.; Integrated passive components.; Public key cryptography.

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APA (6th Edition):

Helinski, R. L. (2011). A Physical Unclonable Function derived from the power distribution system of an integrated circuit. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/12078

Chicago Manual of Style (16th Edition):

Helinski, Ryan Lee. “A Physical Unclonable Function derived from the power distribution system of an integrated circuit.” 2011. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/12078.

MLA Handbook (7th Edition):

Helinski, Ryan Lee. “A Physical Unclonable Function derived from the power distribution system of an integrated circuit.” 2011. Web. 04 Apr 2020.

Vancouver:

Helinski RL. A Physical Unclonable Function derived from the power distribution system of an integrated circuit. [Internet] [Doctoral dissertation]. University of New Mexico; 2011. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/12078.

Council of Science Editors:

Helinski RL. A Physical Unclonable Function derived from the power distribution system of an integrated circuit. [Doctoral Dissertation]. University of New Mexico; 2011. Available from: http://hdl.handle.net/1928/12078


University of New Mexico

11. Ismari, Dylan. DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE.

Degree: Electrical and Computer Engineering, 2016, University of New Mexico

 A hardware Trojan (HT) detection method is presented that is based on measuring and detecting small systematic changes in path delays introduced by capacitive loading… (more)

Subjects/Keywords: Hardware Security; Hardware Trojans; Embedded Test Structure; Golden Model

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APA (6th Edition):

Ismari, D. (2016). DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/32303

Chicago Manual of Style (16th Edition):

Ismari, Dylan. “DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE.” 2016. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/32303.

MLA Handbook (7th Edition):

Ismari, Dylan. “DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE.” 2016. Web. 04 Apr 2020.

Vancouver:

Ismari D. DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE. [Internet] [Doctoral dissertation]. University of New Mexico; 2016. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/32303.

Council of Science Editors:

Ismari D. DETECTING DELAY ANOMALIES INTRODUCED BY HARDWARE TROJANS USING CHIP AVERAGING AND AN ON-CHIP HIGH RESOLUTION EMBEDDED TEST STRUCTURE. [Doctoral Dissertation]. University of New Mexico; 2016. Available from: http://hdl.handle.net/1928/32303


University of New Mexico

12. LeBoeuf, Thomas. Analog multiply and accumulate FPA readout circuit with digital multiply and sign maintenance.

Degree: Electrical and Computer Engineering, 2012, University of New Mexico

 The high bandwidth and power needed to process the data coming from modern high resolution focal plane arrays leads to the necessity for fast and… (more)

Subjects/Keywords: Signal processing  – Equipment and supplies.; Image processing  – Equipment and supplies.; Linear integrated circuits.

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APA (6th Edition):

LeBoeuf, T. (2012). Analog multiply and accumulate FPA readout circuit with digital multiply and sign maintenance. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/17438

Chicago Manual of Style (16th Edition):

LeBoeuf, Thomas. “Analog multiply and accumulate FPA readout circuit with digital multiply and sign maintenance.” 2012. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/17438.

MLA Handbook (7th Edition):

LeBoeuf, Thomas. “Analog multiply and accumulate FPA readout circuit with digital multiply and sign maintenance.” 2012. Web. 04 Apr 2020.

Vancouver:

LeBoeuf T. Analog multiply and accumulate FPA readout circuit with digital multiply and sign maintenance. [Internet] [Masters thesis]. University of New Mexico; 2012. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/17438.

Council of Science Editors:

LeBoeuf T. Analog multiply and accumulate FPA readout circuit with digital multiply and sign maintenance. [Masters Thesis]. University of New Mexico; 2012. Available from: http://hdl.handle.net/1928/17438


University of New Mexico

13. Purushotham, Naveen Nischal. Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment.

Degree: Electrical and Computer Engineering, 2011, University of New Mexico

 The perennial need for memory storage is further increasing with the advancements in technology. Both terrestrial and space related applications thrive on efficient ways and… (more)

Subjects/Keywords: 3D Memory; Memory Controller; Space Radiation

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APA (6th Edition):

Purushotham, N. N. (2011). Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/12059

Chicago Manual of Style (16th Edition):

Purushotham, Naveen Nischal. “Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment.” 2011. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/12059.

MLA Handbook (7th Edition):

Purushotham, Naveen Nischal. “Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment.” 2011. Web. 04 Apr 2020.

Vancouver:

Purushotham NN. Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment. [Internet] [Masters thesis]. University of New Mexico; 2011. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/12059.

Council of Science Editors:

Purushotham NN. Built-in controller for self-test and repair of 3D integrated Nand flash memory chip, used in radiation intense space environment. [Masters Thesis]. University of New Mexico; 2011. Available from: http://hdl.handle.net/1928/12059


University of New Mexico

14. Ramalingam Rajasekaran, Manoj Kumar. Carbon nanotubes as interconnect for next generation network on chip.

Degree: Electrical and Computer Engineering, 2012, University of New Mexico

 Multi-core processors provide better performance when compared with their single-core equivalent. Recently, Networks-on-Chip (NoC) have emerged as a communication methodology for multi core chips. Network-on-Chip… (more)

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APA (6th Edition):

Ramalingam Rajasekaran, M. K. (2012). Carbon nanotubes as interconnect for next generation network on chip. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/20781

Chicago Manual of Style (16th Edition):

Ramalingam Rajasekaran, Manoj Kumar. “Carbon nanotubes as interconnect for next generation network on chip.” 2012. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/20781.

MLA Handbook (7th Edition):

Ramalingam Rajasekaran, Manoj Kumar. “Carbon nanotubes as interconnect for next generation network on chip.” 2012. Web. 04 Apr 2020.

Vancouver:

Ramalingam Rajasekaran MK. Carbon nanotubes as interconnect for next generation network on chip. [Internet] [Masters thesis]. University of New Mexico; 2012. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/20781.

Council of Science Editors:

Ramalingam Rajasekaran MK. Carbon nanotubes as interconnect for next generation network on chip. [Masters Thesis]. University of New Mexico; 2012. Available from: http://hdl.handle.net/1928/20781


University of New Mexico

15. saqib, fareena. Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure.

Degree: Electrical and Computer Engineering, 2014, University of New Mexico

 Both random and systematic within-die process variations (PV) are growing more severe with shrinking geometries and increasing die size. Escalation in the variations in delay… (more)

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APA (6th Edition):

saqib, f. (2014). Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/24596

Chicago Manual of Style (16th Edition):

saqib, fareena. “Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure.” 2014. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/24596.

MLA Handbook (7th Edition):

saqib, fareena. “Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure.” 2014. Web. 04 Apr 2020.

Vancouver:

saqib f. Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure. [Internet] [Doctoral dissertation]. University of New Mexico; 2014. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/24596.

Council of Science Editors:

saqib f. Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure. [Doctoral Dissertation]. University of New Mexico; 2014. Available from: http://hdl.handle.net/1928/24596


University of New Mexico

16. Shirkhorshidian, Amir. Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures.

Degree: Electrical and Computer Engineering, 2013, University of New Mexico

 Quantum computers hold the promise of far exceeding the computational efficiency of classical computers in a variety of applications. An immense amount of interest has… (more)

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APA (6th Edition):

Shirkhorshidian, A. (2013). Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/22018

Chicago Manual of Style (16th Edition):

Shirkhorshidian, Amir. “Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures.” 2013. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/22018.

MLA Handbook (7th Edition):

Shirkhorshidian, Amir. “Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures.” 2013. Web. 04 Apr 2020.

Vancouver:

Shirkhorshidian A. Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures. [Internet] [Masters thesis]. University of New Mexico; 2013. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/22018.

Council of Science Editors:

Shirkhorshidian A. Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures. [Masters Thesis]. University of New Mexico; 2013. Available from: http://hdl.handle.net/1928/22018


University of New Mexico

17. Hasan, I.M. Mehdi. FDTD Analysis of Plasmonic and Nanojet Enhanced Photodetectors for Improved Performance.

Degree: Electrical and Computer Engineering, 2012, University of New Mexico

 The finite-difference time-domain (FDTD) technique is a very flexible and robust means to solve problems spanning a broad range of applications (defense, communication, computing, semiconductor… (more)

Subjects/Keywords: FDTD; Plasmonic; Photonic Nanojet

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APA (6th Edition):

Hasan, I. M. M. (2012). FDTD Analysis of Plasmonic and Nanojet Enhanced Photodetectors for Improved Performance. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/20985

Chicago Manual of Style (16th Edition):

Hasan, I M Mehdi. “FDTD Analysis of Plasmonic and Nanojet Enhanced Photodetectors for Improved Performance.” 2012. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/20985.

MLA Handbook (7th Edition):

Hasan, I M Mehdi. “FDTD Analysis of Plasmonic and Nanojet Enhanced Photodetectors for Improved Performance.” 2012. Web. 04 Apr 2020.

Vancouver:

Hasan IMM. FDTD Analysis of Plasmonic and Nanojet Enhanced Photodetectors for Improved Performance. [Internet] [Masters thesis]. University of New Mexico; 2012. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/20985.

Council of Science Editors:

Hasan IMM. FDTD Analysis of Plasmonic and Nanojet Enhanced Photodetectors for Improved Performance. [Masters Thesis]. University of New Mexico; 2012. Available from: http://hdl.handle.net/1928/20985


University of New Mexico

18. Aarestad, James C. A hardware-embedded, delay-based PUF engine designed for use in cryptographic and authentication applications.

Degree: Electrical and Computer Engineering, 2013, University of New Mexico

 Cryptographic and authentication applications in application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs), as well as codes for the activation of on-chip features, require… (more)

Subjects/Keywords: Computers – Security measures; Application-specific integrated circuits – Security measures; Field programmable gate arrays – Security measures; Integrated passive components.

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APA (6th Edition):

Aarestad, J. C. (2013). A hardware-embedded, delay-based PUF engine designed for use in cryptographic and authentication applications. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/23304

Chicago Manual of Style (16th Edition):

Aarestad, James C. “A hardware-embedded, delay-based PUF engine designed for use in cryptographic and authentication applications.” 2013. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/23304.

MLA Handbook (7th Edition):

Aarestad, James C. “A hardware-embedded, delay-based PUF engine designed for use in cryptographic and authentication applications.” 2013. Web. 04 Apr 2020.

Vancouver:

Aarestad JC. A hardware-embedded, delay-based PUF engine designed for use in cryptographic and authentication applications. [Internet] [Doctoral dissertation]. University of New Mexico; 2013. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/23304.

Council of Science Editors:

Aarestad JC. A hardware-embedded, delay-based PUF engine designed for use in cryptographic and authentication applications. [Doctoral Dissertation]. University of New Mexico; 2013. Available from: http://hdl.handle.net/1928/23304


University of New Mexico

19. Jang, Woo-Yong. Data compressive paradigm for spectral sensing and classification using electrically tunable detectors.

Degree: Electrical and Computer Engineering, 2013, University of New Mexico

 This dissertation contains three major parts: (1) demonstration of the algorithmic spectrometry in the mid-IR sensing regime using spectrally tunable quantum dots-in-a-well (DWELL) IR detector… (more)

Subjects/Keywords: Infrared detectors.; Quantum wells.; Quantum dots.; Data compression (Computer science)

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APA (6th Edition):

Jang, W. (2013). Data compressive paradigm for spectral sensing and classification using electrically tunable detectors. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/22045

Chicago Manual of Style (16th Edition):

Jang, Woo-Yong. “Data compressive paradigm for spectral sensing and classification using electrically tunable detectors.” 2013. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/22045.

MLA Handbook (7th Edition):

Jang, Woo-Yong. “Data compressive paradigm for spectral sensing and classification using electrically tunable detectors.” 2013. Web. 04 Apr 2020.

Vancouver:

Jang W. Data compressive paradigm for spectral sensing and classification using electrically tunable detectors. [Internet] [Doctoral dissertation]. University of New Mexico; 2013. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/22045.

Council of Science Editors:

Jang W. Data compressive paradigm for spectral sensing and classification using electrically tunable detectors. [Doctoral Dissertation]. University of New Mexico; 2013. Available from: http://hdl.handle.net/1928/22045


University of New Mexico

20. El-Howayek, Georges. Communication-Theoretic Foundations for Optical Receivers Using Dynamically Biased Avalanche Photodiodes.

Degree: Electrical and Computer Engineering, 2015, University of New Mexico

  To meet the demands of the exponential growth in video, voice, data and mobile device traffic over the internet, the telecommunication industry has been… (more)

Subjects/Keywords: Communication Theory; Optical Receivers; Avalanche Photodiodes; Dynamic biasing; Branching process; Intersymbol Interference; Bit error rate; Receiver sensitivity; Gaussian distribution; Stochastic process; Dead space; Dark current and tunneling; Electrical and Computer Engineering

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APA (6th Edition):

El-Howayek, G. (2015). Communication-Theoretic Foundations for Optical Receivers Using Dynamically Biased Avalanche Photodiodes. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/27778

Chicago Manual of Style (16th Edition):

El-Howayek, Georges. “Communication-Theoretic Foundations for Optical Receivers Using Dynamically Biased Avalanche Photodiodes.” 2015. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/27778.

MLA Handbook (7th Edition):

El-Howayek, Georges. “Communication-Theoretic Foundations for Optical Receivers Using Dynamically Biased Avalanche Photodiodes.” 2015. Web. 04 Apr 2020.

Vancouver:

El-Howayek G. Communication-Theoretic Foundations for Optical Receivers Using Dynamically Biased Avalanche Photodiodes. [Internet] [Doctoral dissertation]. University of New Mexico; 2015. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/27778.

Council of Science Editors:

El-Howayek G. Communication-Theoretic Foundations for Optical Receivers Using Dynamically Biased Avalanche Photodiodes. [Doctoral Dissertation]. University of New Mexico; 2015. Available from: http://hdl.handle.net/1928/27778


University of New Mexico

21. Mahto, Rakeshkumar. Fault Resilient and Reconfigurable Power Management Using Photovoltaic Integrated with CMOS Switches.

Degree: Electrical and Computer Engineering, 2016, University of New Mexico

  A Photovoltaic (PV) cell is a device which converts light incident upon it to electric current. The push for green energy due to global… (more)

Subjects/Keywords: Photovoltaics; MOSFET; CMOS; Hot spot; Fault tolerance; Resilience; Reconfigurable; Electrical and Computer Engineering

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APA (6th Edition):

Mahto, R. (2016). Fault Resilient and Reconfigurable Power Management Using Photovoltaic Integrated with CMOS Switches. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/33036

Chicago Manual of Style (16th Edition):

Mahto, Rakeshkumar. “Fault Resilient and Reconfigurable Power Management Using Photovoltaic Integrated with CMOS Switches.” 2016. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/33036.

MLA Handbook (7th Edition):

Mahto, Rakeshkumar. “Fault Resilient and Reconfigurable Power Management Using Photovoltaic Integrated with CMOS Switches.” 2016. Web. 04 Apr 2020.

Vancouver:

Mahto R. Fault Resilient and Reconfigurable Power Management Using Photovoltaic Integrated with CMOS Switches. [Internet] [Doctoral dissertation]. University of New Mexico; 2016. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/33036.

Council of Science Editors:

Mahto R. Fault Resilient and Reconfigurable Power Management Using Photovoltaic Integrated with CMOS Switches. [Doctoral Dissertation]. University of New Mexico; 2016. Available from: http://hdl.handle.net/1928/33036


University of New Mexico

22. Uzzal, Mohammad. Avalanche ISFET Sensing Chip for DNA Sequencing.

Degree: Electrical and Computer Engineering, 2016, University of New Mexico

  DNA sequencing is a fundamental tool for biological science, aimed primarily at uncovering the genetic contributions to diseases. The first Human DNA sequence, which… (more)

Subjects/Keywords: Avalanche ISFET (A-ISFET); Readout Circuits; pH-to-Current Sensitivity; Avalanche Breakdown; Genome Sequencing; PVT variation; Signal-to-Noise Ratio (SNR); Multiplication Factor; Excess Noise Factor; Avalanche region of operation; ion sensitive field effect transistor; Electrical and Computer Engineering

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APA (6th Edition):

Uzzal, M. (2016). Avalanche ISFET Sensing Chip for DNA Sequencing. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/33056

Chicago Manual of Style (16th Edition):

Uzzal, Mohammad. “Avalanche ISFET Sensing Chip for DNA Sequencing.” 2016. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/33056.

MLA Handbook (7th Edition):

Uzzal, Mohammad. “Avalanche ISFET Sensing Chip for DNA Sequencing.” 2016. Web. 04 Apr 2020.

Vancouver:

Uzzal M. Avalanche ISFET Sensing Chip for DNA Sequencing. [Internet] [Doctoral dissertation]. University of New Mexico; 2016. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/33056.

Council of Science Editors:

Uzzal M. Avalanche ISFET Sensing Chip for DNA Sequencing. [Doctoral Dissertation]. University of New Mexico; 2016. Available from: http://hdl.handle.net/1928/33056


University of New Mexico

23. Alaie, Seyedhamidreza. THEORY, FABRICATION, AND EXPERIMENTATION OF PHONONIC CRYSTALS IN MEMS AT MICRO/NANO SCALE: ENGINEERING OF THERMAL AND RF PHONONS TO APPLICATIONS IN THERMOELECTRICS AND MICRORESONATORS.

Degree: Mechanical Engineering, 2016, University of New Mexico

  Phononic Crystals (PnCs) are novel materials comprised of a periodic structure of inclusions in a matrix. This periodic arrangement creates phononic bandgaps, and modifies… (more)

Subjects/Keywords: Phononic Crystals; MEMS; Thermal Conductivity; Phonons; Microresonators; Microscale; Nanosclae; Characterization; Mechanical Engineering

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APA (6th Edition):

Alaie, S. (2016). THEORY, FABRICATION, AND EXPERIMENTATION OF PHONONIC CRYSTALS IN MEMS AT MICRO/NANO SCALE: ENGINEERING OF THERMAL AND RF PHONONS TO APPLICATIONS IN THERMOELECTRICS AND MICRORESONATORS. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/31699

Chicago Manual of Style (16th Edition):

Alaie, Seyedhamidreza. “THEORY, FABRICATION, AND EXPERIMENTATION OF PHONONIC CRYSTALS IN MEMS AT MICRO/NANO SCALE: ENGINEERING OF THERMAL AND RF PHONONS TO APPLICATIONS IN THERMOELECTRICS AND MICRORESONATORS.” 2016. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/31699.

MLA Handbook (7th Edition):

Alaie, Seyedhamidreza. “THEORY, FABRICATION, AND EXPERIMENTATION OF PHONONIC CRYSTALS IN MEMS AT MICRO/NANO SCALE: ENGINEERING OF THERMAL AND RF PHONONS TO APPLICATIONS IN THERMOELECTRICS AND MICRORESONATORS.” 2016. Web. 04 Apr 2020.

Vancouver:

Alaie S. THEORY, FABRICATION, AND EXPERIMENTATION OF PHONONIC CRYSTALS IN MEMS AT MICRO/NANO SCALE: ENGINEERING OF THERMAL AND RF PHONONS TO APPLICATIONS IN THERMOELECTRICS AND MICRORESONATORS. [Internet] [Doctoral dissertation]. University of New Mexico; 2016. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/31699.

Council of Science Editors:

Alaie S. THEORY, FABRICATION, AND EXPERIMENTATION OF PHONONIC CRYSTALS IN MEMS AT MICRO/NANO SCALE: ENGINEERING OF THERMAL AND RF PHONONS TO APPLICATIONS IN THERMOELECTRICS AND MICRORESONATORS. [Doctoral Dissertation]. University of New Mexico; 2016. Available from: http://hdl.handle.net/1928/31699


University of New Mexico

24. Cugler Fiorante, Glauco Rogerio. Spatio-temporal circuits for imaging sensors.

Degree: Electrical and Computer Engineering, 2013, University of New Mexico

 The first and second generations of infrared detectors—developed from the 1950s to the 1990s—were dominated by single pixel, linear, and staring small format, containing from… (more)

Subjects/Keywords: Readout Integrated Circuit; ROIC; FPGA-based testing system; Spatio-temporal tunable pixel; VLSI design; Mixed-signal design; Individual pixel voltage biasing; Infrared imaging ROIC; DWELL ROIC; p-i-n-i-p ROIC; IRFPA ROIC

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APA (6th Edition):

Cugler Fiorante, G. R. (2013). Spatio-temporal circuits for imaging sensors. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/23318

Chicago Manual of Style (16th Edition):

Cugler Fiorante, Glauco Rogerio. “Spatio-temporal circuits for imaging sensors.” 2013. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/23318.

MLA Handbook (7th Edition):

Cugler Fiorante, Glauco Rogerio. “Spatio-temporal circuits for imaging sensors.” 2013. Web. 04 Apr 2020.

Vancouver:

Cugler Fiorante GR. Spatio-temporal circuits for imaging sensors. [Internet] [Doctoral dissertation]. University of New Mexico; 2013. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/23318.

Council of Science Editors:

Cugler Fiorante GR. Spatio-temporal circuits for imaging sensors. [Doctoral Dissertation]. University of New Mexico; 2013. Available from: http://hdl.handle.net/1928/23318


University of New Mexico

25. Hossain, Md. Mottaleb. Linear Mode CMOS Compatible p-n Junction Avalanche Photodiode for Smart-lighting Applications.

Degree: Optical Science and Engineering, 2015, University of New Mexico

  There is a need in emerging smart lighting concepts for a high-speed sensing capability to enable adaptive lighting (smart spaces) and visible light communication.… (more)

Subjects/Keywords: Other Engineering

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APA (6th Edition):

Hossain, M. M. (2015). Linear Mode CMOS Compatible p-n Junction Avalanche Photodiode for Smart-lighting Applications. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/30340

Chicago Manual of Style (16th Edition):

Hossain, Md Mottaleb. “Linear Mode CMOS Compatible p-n Junction Avalanche Photodiode for Smart-lighting Applications.” 2015. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/30340.

MLA Handbook (7th Edition):

Hossain, Md Mottaleb. “Linear Mode CMOS Compatible p-n Junction Avalanche Photodiode for Smart-lighting Applications.” 2015. Web. 04 Apr 2020.

Vancouver:

Hossain MM. Linear Mode CMOS Compatible p-n Junction Avalanche Photodiode for Smart-lighting Applications. [Internet] [Masters thesis]. University of New Mexico; 2015. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/30340.

Council of Science Editors:

Hossain MM. Linear Mode CMOS Compatible p-n Junction Avalanche Photodiode for Smart-lighting Applications. [Masters Thesis]. University of New Mexico; 2015. Available from: http://hdl.handle.net/1928/30340

26. Ju, Jing. A Physical Unclonable Function Based on Inter-Metal Layer Resistance Variations and an Evaluation of its Temperature and Voltage Stability.

Degree: Electrical and Computer Engineering, 2014, University of New Mexico

 Keying material for encryption is stored as digital bistrings in non-volatile memory (NVM) on FPGAs and ASICs in current technologies. However, secrets stored this way… (more)

Subjects/Keywords: PG-PUF; Thresholding mechanism; Resistance Variation; Power Grid; Physical unclonable function; NIST

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APA (6th Edition):

Ju, J. (2014). A Physical Unclonable Function Based on Inter-Metal Layer Resistance Variations and an Evaluation of its Temperature and Voltage Stability. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/23553

Chicago Manual of Style (16th Edition):

Ju, Jing. “A Physical Unclonable Function Based on Inter-Metal Layer Resistance Variations and an Evaluation of its Temperature and Voltage Stability.” 2014. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/23553.

MLA Handbook (7th Edition):

Ju, Jing. “A Physical Unclonable Function Based on Inter-Metal Layer Resistance Variations and an Evaluation of its Temperature and Voltage Stability.” 2014. Web. 04 Apr 2020.

Vancouver:

Ju J. A Physical Unclonable Function Based on Inter-Metal Layer Resistance Variations and an Evaluation of its Temperature and Voltage Stability. [Internet] [Doctoral dissertation]. University of New Mexico; 2014. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/23553.

Council of Science Editors:

Ju J. A Physical Unclonable Function Based on Inter-Metal Layer Resistance Variations and an Evaluation of its Temperature and Voltage Stability. [Doctoral Dissertation]. University of New Mexico; 2014. Available from: http://hdl.handle.net/1928/23553


University of New Mexico

27. Silva, Johnny C. GUARDIAN : automated patient monitoring system.

Degree: Electrical and Computer Engineering, 2010, University of New Mexico

 Telemedicine allows medical professionals to monitor, examine, and consult with patients remotely by transferring medical information via wireless communication technologies. This thesis describes the design… (more)

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APA (6th Edition):

Silva, J. C. (2010). GUARDIAN : automated patient monitoring system. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/10849

Chicago Manual of Style (16th Edition):

Silva, Johnny C. “GUARDIAN : automated patient monitoring system.” 2010. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/10849.

MLA Handbook (7th Edition):

Silva, Johnny C. “GUARDIAN : automated patient monitoring system.” 2010. Web. 04 Apr 2020.

Vancouver:

Silva JC. GUARDIAN : automated patient monitoring system. [Internet] [Masters thesis]. University of New Mexico; 2010. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/10849.

Council of Science Editors:

Silva JC. GUARDIAN : automated patient monitoring system. [Masters Thesis]. University of New Mexico; 2010. Available from: http://hdl.handle.net/1928/10849


University of New Mexico

28. Arora, Tamanna. Using ant colony optimization for routing in microprocesors.

Degree: Department of Computer Science, 2009, University of New Mexico

 Power consumption is an important constraint on VLSI systems. With the advancement in technology, it is now possible to pack a large range of functionalities… (more)

Subjects/Keywords: VLSI; Routing; ACO

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APA (6th Edition):

Arora, T. (2009). Using ant colony optimization for routing in microprocesors. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/10258

Chicago Manual of Style (16th Edition):

Arora, Tamanna. “Using ant colony optimization for routing in microprocesors.” 2009. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/10258.

MLA Handbook (7th Edition):

Arora, Tamanna. “Using ant colony optimization for routing in microprocesors.” 2009. Web. 04 Apr 2020.

Vancouver:

Arora T. Using ant colony optimization for routing in microprocesors. [Internet] [Masters thesis]. University of New Mexico; 2009. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/10258.

Council of Science Editors:

Arora T. Using ant colony optimization for routing in microprocesors. [Masters Thesis]. University of New Mexico; 2009. Available from: http://hdl.handle.net/1928/10258


University of New Mexico

29. Cheng, Xiaoyang. Minimally invasive capacitive micromachined ultrasonic transducers array For biomedical applications.

Degree: Electrical and Computer Engineering, 2008, University of New Mexico

 Ultrasound covers a broad range of applications from underwater exploration and nondestructive evaluation of materials to medical diagnosis and treatment. The ultrasonic transducer plays an… (more)

Subjects/Keywords: Transducers; Biomedical; Ultrasonic transducers; Microelectromechanical systems

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APA (6th Edition):

Cheng, X. (2008). Minimally invasive capacitive micromachined ultrasonic transducers array For biomedical applications. (Doctoral Dissertation). University of New Mexico. Retrieved from http://hdl.handle.net/1928/6916

Chicago Manual of Style (16th Edition):

Cheng, Xiaoyang. “Minimally invasive capacitive micromachined ultrasonic transducers array For biomedical applications.” 2008. Doctoral Dissertation, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/6916.

MLA Handbook (7th Edition):

Cheng, Xiaoyang. “Minimally invasive capacitive micromachined ultrasonic transducers array For biomedical applications.” 2008. Web. 04 Apr 2020.

Vancouver:

Cheng X. Minimally invasive capacitive micromachined ultrasonic transducers array For biomedical applications. [Internet] [Doctoral dissertation]. University of New Mexico; 2008. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/6916.

Council of Science Editors:

Cheng X. Minimally invasive capacitive micromachined ultrasonic transducers array For biomedical applications. [Doctoral Dissertation]. University of New Mexico; 2008. Available from: http://hdl.handle.net/1928/6916


University of New Mexico

30. Mallajosyula, Aahlad. Single event upset hardened CMOS combinational logic and clock buffer design.

Degree: Electrical and Computer Engineering, 2009, University of New Mexico

 A radiation strike on semiconductor device may lead to charge collection, which may manifest as a wrong logic level causing failure. Soft errors or Single… (more)

Subjects/Keywords: Metal oxide semiconductors; Complementary

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APA (6th Edition):

Mallajosyula, A. (2009). Single event upset hardened CMOS combinational logic and clock buffer design. (Masters Thesis). University of New Mexico. Retrieved from http://hdl.handle.net/1928/7631

Chicago Manual of Style (16th Edition):

Mallajosyula, Aahlad. “Single event upset hardened CMOS combinational logic and clock buffer design.” 2009. Masters Thesis, University of New Mexico. Accessed April 04, 2020. http://hdl.handle.net/1928/7631.

MLA Handbook (7th Edition):

Mallajosyula, Aahlad. “Single event upset hardened CMOS combinational logic and clock buffer design.” 2009. Web. 04 Apr 2020.

Vancouver:

Mallajosyula A. Single event upset hardened CMOS combinational logic and clock buffer design. [Internet] [Masters thesis]. University of New Mexico; 2009. [cited 2020 Apr 04]. Available from: http://hdl.handle.net/1928/7631.

Council of Science Editors:

Mallajosyula A. Single event upset hardened CMOS combinational logic and clock buffer design. [Masters Thesis]. University of New Mexico; 2009. Available from: http://hdl.handle.net/1928/7631

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