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You searched for +publisher:"University of Arkansas" +contributor:("Miaoqing Huang"). Showing records 1 – 7 of 7 total matches.

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University of Arkansas

1. Lai, Chenggang. Automatic Performance Optimization on Heterogeneous Computer Systems using Manycore Coprocessors.

Degree: PhD, 2018, University of Arkansas

  Emerging computer architectures and advanced computing technologies, such as Intel’s Many Integrated Core (MIC) Architecture and graphics processing units (GPU), provide a promising solution… (more)

Subjects/Keywords: Acceleration; Heterogeneous System; Manycore Coprocessor; Computer and Systems Architecture; Graphics and Human Computer Interfaces; OS and Networks; Power and Energy; Systems Architecture

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APA (6th Edition):

Lai, C. (2018). Automatic Performance Optimization on Heterogeneous Computer Systems using Manycore Coprocessors. (Doctoral Dissertation). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/3060

Chicago Manual of Style (16th Edition):

Lai, Chenggang. “Automatic Performance Optimization on Heterogeneous Computer Systems using Manycore Coprocessors.” 2018. Doctoral Dissertation, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/3060.

MLA Handbook (7th Edition):

Lai, Chenggang. “Automatic Performance Optimization on Heterogeneous Computer Systems using Manycore Coprocessors.” 2018. Web. 14 Nov 2019.

Vancouver:

Lai C. Automatic Performance Optimization on Heterogeneous Computer Systems using Manycore Coprocessors. [Internet] [Doctoral dissertation]. University of Arkansas; 2018. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/3060.

Council of Science Editors:

Lai C. Automatic Performance Optimization on Heterogeneous Computer Systems using Manycore Coprocessors. [Doctoral Dissertation]. University of Arkansas; 2018. Available from: https://scholarworks.uark.edu/etd/3060


University of Arkansas

2. Sadeghian, Abazar. Achieving a better balance between productivity and performance on FPGAs through Heterogeneous Extensible Multiprocessor Systems.

Degree: MSCmpE, 2016, University of Arkansas

  Field Programmable Gate Arrays (FPGAs) were first introduced circa 1980, and they held the promise of delivering performance levels associated with customized circuits, but… (more)

Subjects/Keywords: Applied sciences; Accelerator; Custom hardware; Field Programmable gate arrays; Hardware/software co-design; Partial reconfiguration; System on chip; Digital Circuits; Other Electrical and Computer Engineering

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APA (6th Edition):

Sadeghian, A. (2016). Achieving a better balance between productivity and performance on FPGAs through Heterogeneous Extensible Multiprocessor Systems. (Masters Thesis). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/1584

Chicago Manual of Style (16th Edition):

Sadeghian, Abazar. “Achieving a better balance between productivity and performance on FPGAs through Heterogeneous Extensible Multiprocessor Systems.” 2016. Masters Thesis, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/1584.

MLA Handbook (7th Edition):

Sadeghian, Abazar. “Achieving a better balance between productivity and performance on FPGAs through Heterogeneous Extensible Multiprocessor Systems.” 2016. Web. 14 Nov 2019.

Vancouver:

Sadeghian A. Achieving a better balance between productivity and performance on FPGAs through Heterogeneous Extensible Multiprocessor Systems. [Internet] [Masters thesis]. University of Arkansas; 2016. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/1584.

Council of Science Editors:

Sadeghian A. Achieving a better balance between productivity and performance on FPGAs through Heterogeneous Extensible Multiprocessor Systems. [Masters Thesis]. University of Arkansas; 2016. Available from: https://scholarworks.uark.edu/etd/1584


University of Arkansas

3. Ding, Hongyuan. Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking.

Degree: PhD, 2017, University of Arkansas

  With the help of the parallelism provided by the fine-grained architecture, hardware accelerators on Field Programmable Gate Arrays (FPGAs) can significantly improve the performance… (more)

Subjects/Keywords: FPGA; Hardware Abstraction; Hardware Acceleration; Hardware Multitasking; MPSoC; OpenCL; Hardware Systems

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APA (6th Edition):

Ding, H. (2017). Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking. (Doctoral Dissertation). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/1985

Chicago Manual of Style (16th Edition):

Ding, Hongyuan. “Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking.” 2017. Doctoral Dissertation, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/1985.

MLA Handbook (7th Edition):

Ding, Hongyuan. “Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking.” 2017. Web. 14 Nov 2019.

Vancouver:

Ding H. Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking. [Internet] [Doctoral dissertation]. University of Arkansas; 2017. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/1985.

Council of Science Editors:

Ding H. Exploiting Hardware Abstraction for Parallel Programming Framework: Platform and Multitasking. [Doctoral Dissertation]. University of Arkansas; 2017. Available from: https://scholarworks.uark.edu/etd/1985


University of Arkansas

4. Ding, Hongyuan. Optimizing Performance and Scalability on Hybrid MPSoCs.

Degree: MSCmpE, 2014, University of Arkansas

  Hardware accelerators are capable of achieving significant performance improvement. But design- ing hardware accelerators lacks the flexibility and the productivity. Combining hardware accelerators with… (more)

Subjects/Keywords: Dynamic Scheduling; FPGA; High-level Synthesis; MPSoC; System Design; Hardware Systems; Systems and Communications

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APA (6th Edition):

Ding, H. (2014). Optimizing Performance and Scalability on Hybrid MPSoCs. (Masters Thesis). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/2024

Chicago Manual of Style (16th Edition):

Ding, Hongyuan. “Optimizing Performance and Scalability on Hybrid MPSoCs.” 2014. Masters Thesis, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/2024.

MLA Handbook (7th Edition):

Ding, Hongyuan. “Optimizing Performance and Scalability on Hybrid MPSoCs.” 2014. Web. 14 Nov 2019.

Vancouver:

Ding H. Optimizing Performance and Scalability on Hybrid MPSoCs. [Internet] [Masters thesis]. University of Arkansas; 2014. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/2024.

Council of Science Editors:

Ding H. Optimizing Performance and Scalability on Hybrid MPSoCs. [Masters Thesis]. University of Arkansas; 2014. Available from: https://scholarworks.uark.edu/etd/2024


University of Arkansas

5. Lai, Chenggang. Study of Parallel Programming Models on Computer Clusters with Accelerators.

Degree: MSCmpE, 2014, University of Arkansas

  In order to reach exascale computing capability, accelerators have become a crucial part in developing supercomputers. This work examines the potential of two latest… (more)

Subjects/Keywords: Accelerators; Hybrid Architecture; Parallel Programming; Computer and Systems Architecture; Programming Languages and Compilers

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APA (6th Edition):

Lai, C. (2014). Study of Parallel Programming Models on Computer Clusters with Accelerators. (Masters Thesis). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/2046

Chicago Manual of Style (16th Edition):

Lai, Chenggang. “Study of Parallel Programming Models on Computer Clusters with Accelerators.” 2014. Masters Thesis, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/2046.

MLA Handbook (7th Edition):

Lai, Chenggang. “Study of Parallel Programming Models on Computer Clusters with Accelerators.” 2014. Web. 14 Nov 2019.

Vancouver:

Lai C. Study of Parallel Programming Models on Computer Clusters with Accelerators. [Internet] [Masters thesis]. University of Arkansas; 2014. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/2046.

Council of Science Editors:

Lai C. Study of Parallel Programming Models on Computer Clusters with Accelerators. [Masters Thesis]. University of Arkansas; 2014. Available from: https://scholarworks.uark.edu/etd/2046


University of Arkansas

6. Warn, Seth. High Performance Geospatial Analysis on Emerging Parallel Architectures.

Degree: PhD, 2011, University of Arkansas

  Geographic information systems (GIS) are performing increasingly sophisticated analyses on growing data sets. These analyses demand high performance. At the same time, modern computing… (more)

Subjects/Keywords: Applied sciences; Geomatics; Geospatial analysis; Parallel architectures; Sift; Viewshed; Computer Sciences; Systems Architecture

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APA (6th Edition):

Warn, S. (2011). High Performance Geospatial Analysis on Emerging Parallel Architectures. (Doctoral Dissertation). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/156

Chicago Manual of Style (16th Edition):

Warn, Seth. “High Performance Geospatial Analysis on Emerging Parallel Architectures.” 2011. Doctoral Dissertation, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/156.

MLA Handbook (7th Edition):

Warn, Seth. “High Performance Geospatial Analysis on Emerging Parallel Architectures.” 2011. Web. 14 Nov 2019.

Vancouver:

Warn S. High Performance Geospatial Analysis on Emerging Parallel Architectures. [Internet] [Doctoral dissertation]. University of Arkansas; 2011. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/156.

Council of Science Editors:

Warn S. High Performance Geospatial Analysis on Emerging Parallel Architectures. [Doctoral Dissertation]. University of Arkansas; 2011. Available from: https://scholarworks.uark.edu/etd/156


University of Arkansas

7. Cartwright, Eugene Anthony, III. Extending the HybridThread SMP Model for Distributed Memory Systems.

Degree: MSCmpE, 2012, University of Arkansas

  Memory Hierarchy is of growing importance in system design today. As Moore's Law allows system designers to include more processors within their designs, data… (more)

Subjects/Keywords: Applied sciences; FPGA; Memory hierarchy; Multiprocessor; Reconfigurable computing; Digital Communications and Networking; Graphics and Human Computer Interfaces

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APA (6th Edition):

Cartwright, Eugene Anthony, I. (2012). Extending the HybridThread SMP Model for Distributed Memory Systems. (Masters Thesis). University of Arkansas. Retrieved from https://scholarworks.uark.edu/etd/400

Chicago Manual of Style (16th Edition):

Cartwright, Eugene Anthony, III. “Extending the HybridThread SMP Model for Distributed Memory Systems.” 2012. Masters Thesis, University of Arkansas. Accessed November 14, 2019. https://scholarworks.uark.edu/etd/400.

MLA Handbook (7th Edition):

Cartwright, Eugene Anthony, III. “Extending the HybridThread SMP Model for Distributed Memory Systems.” 2012. Web. 14 Nov 2019.

Vancouver:

Cartwright, Eugene Anthony I. Extending the HybridThread SMP Model for Distributed Memory Systems. [Internet] [Masters thesis]. University of Arkansas; 2012. [cited 2019 Nov 14]. Available from: https://scholarworks.uark.edu/etd/400.

Council of Science Editors:

Cartwright, Eugene Anthony I. Extending the HybridThread SMP Model for Distributed Memory Systems. [Masters Thesis]. University of Arkansas; 2012. Available from: https://scholarworks.uark.edu/etd/400

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