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You searched for +publisher:"Texas A&M University" +contributor:("Li, Peng"). Showing records 1 – 30 of 116 total matches.

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Texas A&M University

1. Li, Youjie. Energy Efficient Spiking Neuromorphic Architectures for Pattern Recognition.

Degree: MS, Computer Engineering, 2016, Texas A&M University

 There is a growing concern over reliability, power consumption, and performance of traditional Von Neumann machines, especially when dealing with complex tasks like pattern recognition.… (more)

Subjects/Keywords: Neuromorphic VLSI; spiking neural networks; approximate computing; pattern recognition

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APA (6th Edition):

Li, Y. (2016). Energy Efficient Spiking Neuromorphic Architectures for Pattern Recognition. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/156946

Chicago Manual of Style (16th Edition):

Li, Youjie. “Energy Efficient Spiking Neuromorphic Architectures for Pattern Recognition.” 2016. Masters Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/156946.

MLA Handbook (7th Edition):

Li, Youjie. “Energy Efficient Spiking Neuromorphic Architectures for Pattern Recognition.” 2016. Web. 19 Dec 2018.

Vancouver:

Li Y. Energy Efficient Spiking Neuromorphic Architectures for Pattern Recognition. [Internet] [Masters thesis]. Texas A&M University; 2016. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/156946.

Council of Science Editors:

Li Y. Energy Efficient Spiking Neuromorphic Architectures for Pattern Recognition. [Masters Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/156946


Texas A&M University

2. Wu, Chia-Yu. A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing.

Degree: 2015, Texas A&M University

 The routing of analog integrated circuits (IC) has long been a challenge due to numerous constraints (such as symmetry and topology-matching) that matter for overall… (more)

Subjects/Keywords: Physical Design; Routing; Analog ICs

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APA (6th Edition):

Wu, C. (2015). A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/155476

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Chia-Yu. “A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing.” 2015. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/155476.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Chia-Yu. “A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing.” 2015. Web. 19 Dec 2018.

Vancouver:

Wu C. A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing. [Internet] [Thesis]. Texas A&M University; 2015. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/155476.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu C. A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing. [Thesis]. Texas A&M University; 2015. Available from: http://hdl.handle.net/1969.1/155476

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

3. Thulasiraman, Kumaran. Enhanced Reinforcement Learning with Attentional Feedback and Temporally Attenuated Distal Rewards.

Degree: 2015, Texas A&M University

 This thesis presents a new reinforcement learning mechanism suitable to be employed in artificial spiking neural networks of leaky integrate-and-fire (LIF) or Izhikevich neurons. The… (more)

Subjects/Keywords: reinforcement learning; spiking neural networks; dopamine-modulated; STDP

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APA (6th Edition):

Thulasiraman, K. (2015). Enhanced Reinforcement Learning with Attentional Feedback and Temporally Attenuated Distal Rewards. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/155519

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Thulasiraman, Kumaran. “Enhanced Reinforcement Learning with Attentional Feedback and Temporally Attenuated Distal Rewards.” 2015. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/155519.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Thulasiraman, Kumaran. “Enhanced Reinforcement Learning with Attentional Feedback and Temporally Attenuated Distal Rewards.” 2015. Web. 19 Dec 2018.

Vancouver:

Thulasiraman K. Enhanced Reinforcement Learning with Attentional Feedback and Temporally Attenuated Distal Rewards. [Internet] [Thesis]. Texas A&M University; 2015. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/155519.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Thulasiraman K. Enhanced Reinforcement Learning with Attentional Feedback and Temporally Attenuated Distal Rewards. [Thesis]. Texas A&M University; 2015. Available from: http://hdl.handle.net/1969.1/155519

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

4. Lu, Ang. Proximity Optimization for Adaptive Circuit Design.

Degree: 2015, Texas A&M University

 The performance growth of conventional VLSI circuits is seriously hampered by various variation effects and the fundamental limit of chip power density. Adaptive circuit design… (more)

Subjects/Keywords: adaptive circuit design; incremental placement; cell clustering

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APA (6th Edition):

Lu, A. (2015). Proximity Optimization for Adaptive Circuit Design. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/156287

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lu, Ang. “Proximity Optimization for Adaptive Circuit Design.” 2015. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/156287.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lu, Ang. “Proximity Optimization for Adaptive Circuit Design.” 2015. Web. 19 Dec 2018.

Vancouver:

Lu A. Proximity Optimization for Adaptive Circuit Design. [Internet] [Thesis]. Texas A&M University; 2015. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/156287.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lu A. Proximity Optimization for Adaptive Circuit Design. [Thesis]. Texas A&M University; 2015. Available from: http://hdl.handle.net/1969.1/156287

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

5. An, Woo Kyung. Automated Reconstruction of Neurovascular Networks in Knife-Edge Scanning Microscope Mouse and Rat Brain Nissl Stained Data Sets.

Degree: 2016, Texas A&M University

 The Knife-Edge Scanning Microscope (KESM), developed at the Brain Network Laboratory at Texas A&M University, can image a whole small animal brain at sub- micrometer… (more)

Subjects/Keywords: KESM; neural network; signal processing; image processing; biomedical imaging; brain imaging

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APA (6th Edition):

An, W. K. (2016). Automated Reconstruction of Neurovascular Networks in Knife-Edge Scanning Microscope Mouse and Rat Brain Nissl Stained Data Sets. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/157988

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

An, Woo Kyung. “Automated Reconstruction of Neurovascular Networks in Knife-Edge Scanning Microscope Mouse and Rat Brain Nissl Stained Data Sets.” 2016. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/157988.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

An, Woo Kyung. “Automated Reconstruction of Neurovascular Networks in Knife-Edge Scanning Microscope Mouse and Rat Brain Nissl Stained Data Sets.” 2016. Web. 19 Dec 2018.

Vancouver:

An WK. Automated Reconstruction of Neurovascular Networks in Knife-Edge Scanning Microscope Mouse and Rat Brain Nissl Stained Data Sets. [Internet] [Thesis]. Texas A&M University; 2016. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/157988.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

An WK. Automated Reconstruction of Neurovascular Networks in Knife-Edge Scanning Microscope Mouse and Rat Brain Nissl Stained Data Sets. [Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/157988

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

6. Devpura, Priyank. Packet Compression in GPU Architectures.

Degree: 2017, Texas A&M University

 Graphical processing unit (GPU) can support multiple operations in parallel by executing it on multiple thread unit known as warp i.e. multiple threads running the… (more)

Subjects/Keywords: Compression; GPU; Computer Architecture

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Devpura, P. (2017). Packet Compression in GPU Architectures. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/161544

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Devpura, Priyank. “Packet Compression in GPU Architectures.” 2017. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/161544.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Devpura, Priyank. “Packet Compression in GPU Architectures.” 2017. Web. 19 Dec 2018.

Vancouver:

Devpura P. Packet Compression in GPU Architectures. [Internet] [Thesis]. Texas A&M University; 2017. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/161544.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Devpura P. Packet Compression in GPU Architectures. [Thesis]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/161544

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

7. Park, Sungho. A verilog-hdl implementation of virtual channels in a network-on-chip router.

Degree: 2009, Texas A&M University

 As the feature size is continuously decreasing and integration density is increasing, interconnections have become a dominating factor in determining the overall quality of a… (more)

Subjects/Keywords: NoC; Virtual Channels; Network-on-Chip; router

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APA (6th Edition):

Park, S. (2009). A verilog-hdl implementation of virtual channels in a network-on-chip router. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2890

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Park, Sungho. “A verilog-hdl implementation of virtual channels in a network-on-chip router.” 2009. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2890.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Park, Sungho. “A verilog-hdl implementation of virtual channels in a network-on-chip router.” 2009. Web. 19 Dec 2018.

Vancouver:

Park S. A verilog-hdl implementation of virtual channels in a network-on-chip router. [Internet] [Thesis]. Texas A&M University; 2009. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2890.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Park S. A verilog-hdl implementation of virtual channels in a network-on-chip router. [Thesis]. Texas A&M University; 2009. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2890

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

8. Jindal, Tanuj. Detecting Tangled Logic Structures in VLSI Netlists.

Degree: 2010, Texas A&M University

 This thesis proposes a new problem of identifying large and tangled logic structures in a synthesized netlist. Large groups of cells that are highly interconnected… (more)

Subjects/Keywords: TLS; Cluster; congestion

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APA (6th Edition):

Jindal, T. (2010). Detecting Tangled Logic Structures in VLSI Netlists. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8511

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jindal, Tanuj. “Detecting Tangled Logic Structures in VLSI Netlists.” 2010. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8511.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jindal, Tanuj. “Detecting Tangled Logic Structures in VLSI Netlists.” 2010. Web. 19 Dec 2018.

Vancouver:

Jindal T. Detecting Tangled Logic Structures in VLSI Netlists. [Internet] [Thesis]. Texas A&M University; 2010. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8511.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jindal T. Detecting Tangled Logic Structures in VLSI Netlists. [Thesis]. Texas A&M University; 2010. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8511

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

9. Bekal, Prasanna. Analysis and Modeling of Parasitic Capacitances in Advanced Nanoscale Devices.

Degree: 2012, Texas A&M University

 In order to correctly perform circuit simulation, it is crucial that parasitic capacitances near devices are accurately extracted and are consistent with the SPICE models.… (more)

Subjects/Keywords: Parasitic Extraction; fringing capacitance; MOSFET; Vertical BJT; FinFET; 3D Fieldsolver; Calibre xACT

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APA (6th Edition):

Bekal, P. (2012). Analysis and Modeling of Parasitic Capacitances in Advanced Nanoscale Devices. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11215

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Bekal, Prasanna. “Analysis and Modeling of Parasitic Capacitances in Advanced Nanoscale Devices.” 2012. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11215.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Bekal, Prasanna. “Analysis and Modeling of Parasitic Capacitances in Advanced Nanoscale Devices.” 2012. Web. 19 Dec 2018.

Vancouver:

Bekal P. Analysis and Modeling of Parasitic Capacitances in Advanced Nanoscale Devices. [Internet] [Thesis]. Texas A&M University; 2012. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11215.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Bekal P. Analysis and Modeling of Parasitic Capacitances in Advanced Nanoscale Devices. [Thesis]. Texas A&M University; 2012. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11215

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

10. Mukherjee, Parijat 1985-. Automatic Stability Checking for Large Analog Circuits.

Degree: 2010, Texas A&M University

 Small signal stability has always been an important concern for analog designers. Recent advances such as the Loop Finder algorithm allows designers to detect and… (more)

Subjects/Keywords: Model Order Reduction; Rational Krylov Algorithm; Region based pole search; Pole Discovery; Loop Finder; Stability analysis

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Mukherjee, P. 1. (2010). Automatic Stability Checking for Large Analog Circuits. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/148461

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Mukherjee, Parijat 1985-. “Automatic Stability Checking for Large Analog Circuits.” 2010. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/148461.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Mukherjee, Parijat 1985-. “Automatic Stability Checking for Large Analog Circuits.” 2010. Web. 19 Dec 2018.

Vancouver:

Mukherjee P1. Automatic Stability Checking for Large Analog Circuits. [Internet] [Thesis]. Texas A&M University; 2010. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/148461.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Mukherjee P1. Automatic Stability Checking for Large Analog Circuits. [Thesis]. Texas A&M University; 2010. Available from: http://hdl.handle.net/1969.1/148461

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

11. Li, Zhixing. Machine Learning Applied in 2D Parasitic Extraction.

Degree: 2014, Texas A&M University

 With the scale of interconnect number grows to billions, parasitic capacitance extraction speed is an important issue for fast turn-around time for designers. In this… (more)

Subjects/Keywords: Machine learning; fast and accurate extraction

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, Z. (2014). Machine Learning Applied in 2D Parasitic Extraction. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/154203

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Zhixing. “Machine Learning Applied in 2D Parasitic Extraction.” 2014. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/154203.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Zhixing. “Machine Learning Applied in 2D Parasitic Extraction.” 2014. Web. 19 Dec 2018.

Vancouver:

Li Z. Machine Learning Applied in 2D Parasitic Extraction. [Internet] [Thesis]. Texas A&M University; 2014. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/154203.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li Z. Machine Learning Applied in 2D Parasitic Extraction. [Thesis]. Texas A&M University; 2014. Available from: http://hdl.handle.net/1969.1/154203

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

12. Gao, Di. Multi-harmonic Modeling of Low-power PWM DC-DC Converter.

Degree: 2015, Texas A&M University

 Modeling and simulation of switched-mode Pulse Width Modulated (PWM) DC-DC converters form an essential ingredient in the analysis and design process of integrated circuits. In… (more)

Subjects/Keywords: Modeling; DC-DC Converter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Gao, D. (2015). Multi-harmonic Modeling of Low-power PWM DC-DC Converter. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/156238

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gao, Di. “Multi-harmonic Modeling of Low-power PWM DC-DC Converter.” 2015. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/156238.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gao, Di. “Multi-harmonic Modeling of Low-power PWM DC-DC Converter.” 2015. Web. 19 Dec 2018.

Vancouver:

Gao D. Multi-harmonic Modeling of Low-power PWM DC-DC Converter. [Internet] [Thesis]. Texas A&M University; 2015. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/156238.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gao D. Multi-harmonic Modeling of Low-power PWM DC-DC Converter. [Thesis]. Texas A&M University; 2015. Available from: http://hdl.handle.net/1969.1/156238

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

13. Lim, Sungjun. Automated Neurovascular Tracing and Analysis of the Knife-Edge Scanning Microscope Rat Nissl Data Set Using a Computing Cluster.

Degree: 2015, Texas A&M University

 3D reconstruction of the neurovascular networks in the brain is a first step toward the analysis of their function. However, existing three dimensional imaging techniques… (more)

Subjects/Keywords: Neuroscience; Vasculature; A computing cluster

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APA (6th Edition):

Lim, S. (2015). Automated Neurovascular Tracing and Analysis of the Knife-Edge Scanning Microscope Rat Nissl Data Set Using a Computing Cluster. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/156486

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lim, Sungjun. “Automated Neurovascular Tracing and Analysis of the Knife-Edge Scanning Microscope Rat Nissl Data Set Using a Computing Cluster.” 2015. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/156486.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lim, Sungjun. “Automated Neurovascular Tracing and Analysis of the Knife-Edge Scanning Microscope Rat Nissl Data Set Using a Computing Cluster.” 2015. Web. 19 Dec 2018.

Vancouver:

Lim S. Automated Neurovascular Tracing and Analysis of the Knife-Edge Scanning Microscope Rat Nissl Data Set Using a Computing Cluster. [Internet] [Thesis]. Texas A&M University; 2015. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/156486.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lim S. Automated Neurovascular Tracing and Analysis of the Knife-Edge Scanning Microscope Rat Nissl Data Set Using a Computing Cluster. [Thesis]. Texas A&M University; 2015. Available from: http://hdl.handle.net/1969.1/156486

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

14. Shrija, . A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform.

Degree: MS, Computer Engineering, 2016, Texas A&M University

 Approximate computing is a blooming field of research, which involves a compro- mise of an application’s accuracy to make it more efficient. It necessarily involves… (more)

Subjects/Keywords: Approximate Computing; JPEG; Compression; FPGA

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APA (6th Edition):

Shrija, .. (2016). A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform. (Masters Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/158697

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Chicago Manual of Style (16th Edition):

Shrija, .. “A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform.” 2016. Masters Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/158697.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

MLA Handbook (7th Edition):

Shrija, .. “A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform.” 2016. Web. 19 Dec 2018.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Vancouver:

Shrija, .. A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform. [Internet] [Masters thesis]. Texas A&M University; 2016. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/158697.

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete

Council of Science Editors:

Shrija, .. A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform. [Masters Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/158697

Note: this citation may be lacking information needed for this citation format:
Author name may be incomplete


Texas A&M University

15. Gao, Zhuoyang. Comparative Study on Performance and Variation Tolerance of Low Power Circuit.

Degree: 2015, Texas A&M University

 The demand for low-power electronic devices is increasing rapidly in current VLSI technology. Instead of conventional CMOS circuit operating at nominal supply voltage, several kinds… (more)

Subjects/Keywords: low power; adiabatic circuit; near-threshold computing

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APA (6th Edition):

Gao, Z. (2015). Comparative Study on Performance and Variation Tolerance of Low Power Circuit. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/156528

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Gao, Zhuoyang. “Comparative Study on Performance and Variation Tolerance of Low Power Circuit.” 2015. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/156528.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Gao, Zhuoyang. “Comparative Study on Performance and Variation Tolerance of Low Power Circuit.” 2015. Web. 19 Dec 2018.

Vancouver:

Gao Z. Comparative Study on Performance and Variation Tolerance of Low Power Circuit. [Internet] [Thesis]. Texas A&M University; 2015. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/156528.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Gao Z. Comparative Study on Performance and Variation Tolerance of Low Power Circuit. [Thesis]. Texas A&M University; 2015. Available from: http://hdl.handle.net/1969.1/156528

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

16. Chen, Pu. Security Attack Models for Split Manufacturing of Integrated Circuits.

Degree: 2016, Texas A&M University

 Split manufacturing of integrated circuits reduces vulnerabilities introduced by an untrusted foundry by manufacturing only a part of design at an untrusted high-end foundry and… (more)

Subjects/Keywords: Security; Split manufacturing; Binary decision diagram; Automatic test pattern generation

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APA (6th Edition):

Chen, P. (2016). Security Attack Models for Split Manufacturing of Integrated Circuits. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/158619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Pu. “Security Attack Models for Split Manufacturing of Integrated Circuits.” 2016. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/158619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Pu. “Security Attack Models for Split Manufacturing of Integrated Circuits.” 2016. Web. 19 Dec 2018.

Vancouver:

Chen P. Security Attack Models for Split Manufacturing of Integrated Circuits. [Internet] [Thesis]. Texas A&M University; 2016. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/158619.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen P. Security Attack Models for Split Manufacturing of Integrated Circuits. [Thesis]. Texas A&M University; 2016. Available from: http://hdl.handle.net/1969.1/158619

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

17. Ahn, Seungjai. Energy-efficient Q-learning for Collision Avoidance of Autonomous Robots.

Degree: 2017, Texas A&M University

 Recently, many companies have been studying intelligent cars, and improvements in sensor technology and computing are required. The intelligent cars use GPS to know where… (more)

Subjects/Keywords: Reinforcement Learning; Robot

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APA (6th Edition):

Ahn, S. (2017). Energy-efficient Q-learning for Collision Avoidance of Autonomous Robots. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/161486

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ahn, Seungjai. “Energy-efficient Q-learning for Collision Avoidance of Autonomous Robots.” 2017. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/161486.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ahn, Seungjai. “Energy-efficient Q-learning for Collision Avoidance of Autonomous Robots.” 2017. Web. 19 Dec 2018.

Vancouver:

Ahn S. Energy-efficient Q-learning for Collision Avoidance of Autonomous Robots. [Internet] [Thesis]. Texas A&M University; 2017. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/161486.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ahn S. Energy-efficient Q-learning for Collision Avoidance of Autonomous Robots. [Thesis]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/161486

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

18. Boyapati, Rahul. Application Centric Networks-On-Chip Design Solutions for Future Multicore Systems.

Degree: 2017, Texas A&M University

 With advances in technology, future multicore systems scaled to 100s and 1000s of cores/accelerators are being touted as an effective solution for extracting huge performance… (more)

Subjects/Keywords: Networks-On-Chip; Power efficient Designs; Approximate Computing; STT-MRAM technology

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APA (6th Edition):

Boyapati, R. (2017). Application Centric Networks-On-Chip Design Solutions for Future Multicore Systems. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/161506

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Boyapati, Rahul. “Application Centric Networks-On-Chip Design Solutions for Future Multicore Systems.” 2017. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/161506.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Boyapati, Rahul. “Application Centric Networks-On-Chip Design Solutions for Future Multicore Systems.” 2017. Web. 19 Dec 2018.

Vancouver:

Boyapati R. Application Centric Networks-On-Chip Design Solutions for Future Multicore Systems. [Internet] [Thesis]. Texas A&M University; 2017. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/161506.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Boyapati R. Application Centric Networks-On-Chip Design Solutions for Future Multicore Systems. [Thesis]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/161506

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

19. Narayana, Sushirdeep. Affect Recognition Using Electroencephalography Features.

Degree: 2017, Texas A&M University

 Affect is the psychological display of emotion often described with three principal dimensions: 1) valence 2) arousal and 3) dominance. This thesis work explores the… (more)

Subjects/Keywords: affect; electroencephalography; machine learning; Support Vector Machines; feature selection

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APA (6th Edition):

Narayana, S. (2017). Affect Recognition Using Electroencephalography Features. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/161603

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Narayana, Sushirdeep. “Affect Recognition Using Electroencephalography Features.” 2017. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/161603.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Narayana, Sushirdeep. “Affect Recognition Using Electroencephalography Features.” 2017. Web. 19 Dec 2018.

Vancouver:

Narayana S. Affect Recognition Using Electroencephalography Features. [Internet] [Thesis]. Texas A&M University; 2017. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/161603.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Narayana S. Affect Recognition Using Electroencephalography Features. [Thesis]. Texas A&M University; 2017. Available from: http://hdl.handle.net/1969.1/161603

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

20. Eschenko, Evan Lee. A low power prescaler, phase frequency detector, and charge pump for a 12 ghz frequency synthesizer.

Degree: 2009, Texas A&M University

 A low power implementation of a CMOS frequency synthesizer at 12 GHz is an important step to improve the efficiency of a wireless transceiver in… (more)

Subjects/Keywords: Prescaler

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APA (6th Edition):

Eschenko, E. L. (2009). A low power prescaler, phase frequency detector, and charge pump for a 12 ghz frequency synthesizer. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2496

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Eschenko, Evan Lee. “A low power prescaler, phase frequency detector, and charge pump for a 12 ghz frequency synthesizer.” 2009. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2496.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Eschenko, Evan Lee. “A low power prescaler, phase frequency detector, and charge pump for a 12 ghz frequency synthesizer.” 2009. Web. 19 Dec 2018.

Vancouver:

Eschenko EL. A low power prescaler, phase frequency detector, and charge pump for a 12 ghz frequency synthesizer. [Internet] [Thesis]. Texas A&M University; 2009. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2496.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Eschenko EL. A low power prescaler, phase frequency detector, and charge pump for a 12 ghz frequency synthesizer. [Thesis]. Texas A&M University; 2009. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2496

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

21. Liu, Chih-Chun. Dynamic thermal management in chip multiprocessor systems.

Degree: 2009, Texas A&M University

 Recently, processor power density has been increasing at an alarming rate result- ing in high on-chip temperature. Higher temperature increases current leakage and causes poor… (more)

Subjects/Keywords: DTM; CMP

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APA (6th Edition):

Liu, C. (2009). Dynamic thermal management in chip multiprocessor systems. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2913

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Chih-Chun. “Dynamic thermal management in chip multiprocessor systems.” 2009. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2913.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Chih-Chun. “Dynamic thermal management in chip multiprocessor systems.” 2009. Web. 19 Dec 2018.

Vancouver:

Liu C. Dynamic thermal management in chip multiprocessor systems. [Internet] [Thesis]. Texas A&M University; 2009. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2913.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu C. Dynamic thermal management in chip multiprocessor systems. [Thesis]. Texas A&M University; 2009. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2913

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

22. Feng, Zhuo. Modeling and Analysis of Large-Scale On-Chip Interconnects.

Degree: 2010, Texas A&M University

 As IC technologies scale to the nanometer regime, efficient and accurate modeling and analysis of VLSI systems with billions of transistors and interconnects becomes increasingly… (more)

Subjects/Keywords: process variation; statistical circuit modeling and analysis; model order reduction; statistical parameter dimension reduction; reduced rank regression; design-dependent interconnect corner extraction; statistical static timing analysis; power grid analysis; circuit simulation; general-purpose computation on graphics processing unit; GPU; massively parallel computing; multigrid; CUDA programming language; multi-core programming

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APA (6th Edition):

Feng, Z. (2010). Modeling and Analysis of Large-Scale On-Chip Interconnects. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7142

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Feng, Zhuo. “Modeling and Analysis of Large-Scale On-Chip Interconnects.” 2010. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7142.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Feng, Zhuo. “Modeling and Analysis of Large-Scale On-Chip Interconnects.” 2010. Web. 19 Dec 2018.

Vancouver:

Feng Z. Modeling and Analysis of Large-Scale On-Chip Interconnects. [Internet] [Thesis]. Texas A&M University; 2010. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7142.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Feng Z. Modeling and Analysis of Large-Scale On-Chip Interconnects. [Thesis]. Texas A&M University; 2010. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7142

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

23. Yi, Yang. Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages.

Degree: 2011, Texas A&M University

 Interconnect modeling plays an important role in design and verification of VLSI circuits and packages. For low frequency circuits, great advances for parasitic resistance and… (more)

Subjects/Keywords: Interconnect Modeling; Boundary Element Method; Inductance; Impedance.

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APA (6th Edition):

Yi, Y. (2011). Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-2912

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yi, Yang. “Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages.” 2011. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-2912.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yi, Yang. “Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages.” 2011. Web. 19 Dec 2018.

Vancouver:

Yi Y. Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-2912.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yi Y. Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-2912

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

24. Dayal, Akshit. Robust Optimization of Nanometer SRAM Designs.

Degree: 2011, Texas A&M University

 Technology scaling has been the most obvious choice of designers and chip manufacturing companies to improve the performance of analog and digital circuits. With the… (more)

Subjects/Keywords: SRAM; Static Noise Margin; Leakage Power; Response Surface Modeling; Dynamic noise Margin; Non Linear Programming; Access Time; Sequential Quadratic Programming

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APA (6th Edition):

Dayal, A. (2011). Robust Optimization of Nanometer SRAM Designs. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7589

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Dayal, Akshit. “Robust Optimization of Nanometer SRAM Designs.” 2011. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7589.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Dayal, Akshit. “Robust Optimization of Nanometer SRAM Designs.” 2011. Web. 19 Dec 2018.

Vancouver:

Dayal A. Robust Optimization of Nanometer SRAM Designs. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7589.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Dayal A. Robust Optimization of Nanometer SRAM Designs. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7589

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

25. Yu, Guo. Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies.

Degree: 2011, Texas A&M University

 As CMOS technologies move to sub-100nm regions, the design and verification for analog/mixed-signal circuits become more and more difficult due to the problems including the… (more)

Subjects/Keywords: analog/mixed-signal circuit; modeling; optimization; testing; yield

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APA (6th Edition):

Yu, G. (2011). Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7512

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yu, Guo. “Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies.” 2011. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7512.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yu, Guo. “Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies.” 2011. Web. 19 Dec 2018.

Vancouver:

Yu G. Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7512.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yu G. Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7512

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

26. Narasimhan, Srinath S. Circuit Optimization Using Efficient Parallel Pattern Search.

Degree: 2011, Texas A&M University

 Circuit optimization is extremely important in order to design today's high performance integrated circuits. As systems become more and more complex, traditional optimization techniques are… (more)

Subjects/Keywords: APPS; Circuit Optimization; Clock Mesh; Phase Locked Loop; Skew; Lock Time

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APA (6th Edition):

Narasimhan, S. S. (2011). Circuit Optimization Using Efficient Parallel Pattern Search. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2010-05-7704

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Narasimhan, Srinath S. “Circuit Optimization Using Efficient Parallel Pattern Search.” 2011. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2010-05-7704.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Narasimhan, Srinath S. “Circuit Optimization Using Efficient Parallel Pattern Search.” 2011. Web. 19 Dec 2018.

Vancouver:

Narasimhan SS. Circuit Optimization Using Efficient Parallel Pattern Search. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-05-7704.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Narasimhan SS. Circuit Optimization Using Efficient Parallel Pattern Search. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-05-7704

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

27. Ganta, Saikrishna. Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators.

Degree: 2011, Texas A&M University

 Low drop out (LDO) voltage regulators are widely used for post regulating the switching ripples generated by the switched mode power supplies (SMPS). Due to… (more)

Subjects/Keywords: LDO; PSR; Power Supply Rejection; Transient improvement; wideband; regulator

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APA (6th Edition):

Ganta, S. (2011). Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8448

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ganta, Saikrishna. “Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators.” 2011. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8448.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ganta, Saikrishna. “Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators.” 2011. Web. 19 Dec 2018.

Vancouver:

Ganta S. Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8448.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ganta S. Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8448

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

28. Karkala, Vinay. A PLL Design Based on a Standing Wave Resonant Oscillator.

Degree: 2011, Texas A&M University

 In this thesis, we present a new continuously variable high frequency standing wave oscillator and demonstrate its use in generating the phase locked clock signal… (more)

Subjects/Keywords: Voltage Controlled Oscillator; VCO; Phase Locked Loop; PLL; Standing Wave Resonant Oscillator; Traveling Wave Resonant Oscillator; Fine Tuning; Coarse Tuning; Transmission line; Parasitic Extraction; Locking Range; Clock distribution

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Karkala, V. (2011). A PLL Design Based on a Standing Wave Resonant Oscillator. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8546

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Karkala, Vinay. “A PLL Design Based on a Standing Wave Resonant Oscillator.” 2011. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8546.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Karkala, Vinay. “A PLL Design Based on a Standing Wave Resonant Oscillator.” 2011. Web. 19 Dec 2018.

Vancouver:

Karkala V. A PLL Design Based on a Standing Wave Resonant Oscillator. [Internet] [Thesis]. Texas A&M University; 2011. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8546.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Karkala V. A PLL Design Based on a Standing Wave Resonant Oscillator. [Thesis]. Texas A&M University; 2011. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8546

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

29. Wang, Mingchao. Large-Scale Simulation of Neural Networks with Biophysically Accurate Models on Graphics Processors.

Degree: 2012, Texas A&M University

 Efficient simulation of large-scale mammalian brain models provides a crucial computational means for understanding complex brain functions and neuronal dynamics. However, such tasks are hindered… (more)

Subjects/Keywords: brain functions; neuronal dynamics; parallel simulation; graphcis processors

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, M. (2012). Large-Scale Simulation of Neural Networks with Biophysically Accurate Models on Graphics Processors. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11161

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Mingchao. “Large-Scale Simulation of Neural Networks with Biophysically Accurate Models on Graphics Processors.” 2012. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11161.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Mingchao. “Large-Scale Simulation of Neural Networks with Biophysically Accurate Models on Graphics Processors.” 2012. Web. 19 Dec 2018.

Vancouver:

Wang M. Large-Scale Simulation of Neural Networks with Biophysically Accurate Models on Graphics Processors. [Internet] [Thesis]. Texas A&M University; 2012. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11161.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang M. Large-Scale Simulation of Neural Networks with Biophysically Accurate Models on Graphics Processors. [Thesis]. Texas A&M University; 2012. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11161

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


Texas A&M University

30. Deng, Yue. SAT-based Verification for Analog and Mixed-signal Circuits.

Degree: 2012, Texas A&M University

 The wide application of analog and mixed-signal (AMS) designs makes the verification of AMS circuits an important task. However, verification of AMS circuits remains as… (more)

Subjects/Keywords: Analog; verification; simulation; SAT; modeling; reachability anlysis

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Deng, Y. (2012). SAT-based Verification for Analog and Mixed-signal Circuits. (Thesis). Texas A&M University. Retrieved from http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11221

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Deng, Yue. “SAT-based Verification for Analog and Mixed-signal Circuits.” 2012. Thesis, Texas A&M University. Accessed December 19, 2018. http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11221.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Deng, Yue. “SAT-based Verification for Analog and Mixed-signal Circuits.” 2012. Web. 19 Dec 2018.

Vancouver:

Deng Y. SAT-based Verification for Analog and Mixed-signal Circuits. [Internet] [Thesis]. Texas A&M University; 2012. [cited 2018 Dec 19]. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11221.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Deng Y. SAT-based Verification for Analog and Mixed-signal Circuits. [Thesis]. Texas A&M University; 2012. Available from: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11221

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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