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You searched for +publisher:"Rochester Institute of Technology" +contributor:("Ivan Puchades"). Showing records 1 – 13 of 13 total matches.

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Rochester Institute of Technology

1. Chen, Chen. A Wireless Communication Platform for MEMS Sensors.

Degree: MS, Electrical Engineering, 2015, Rochester Institute of Technology

  Wireless measurement systems combining current advanced information collection, processing and wireless communication technology, have been applied to information measurement in special occasions. As a… (more)

Subjects/Keywords: Arduino; Bluetooth; MEMS; Sensor; Wireless

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APA (6th Edition):

Chen, C. (2015). A Wireless Communication Platform for MEMS Sensors. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/8809

Chicago Manual of Style (16th Edition):

Chen, Chen. “A Wireless Communication Platform for MEMS Sensors.” 2015. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/8809.

MLA Handbook (7th Edition):

Chen, Chen. “A Wireless Communication Platform for MEMS Sensors.” 2015. Web. 22 Oct 2019.

Vancouver:

Chen C. A Wireless Communication Platform for MEMS Sensors. [Internet] [Masters thesis]. Rochester Institute of Technology; 2015. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/8809.

Council of Science Editors:

Chen C. A Wireless Communication Platform for MEMS Sensors. [Masters Thesis]. Rochester Institute of Technology; 2015. Available from: https://scholarworks.rit.edu/theses/8809


Rochester Institute of Technology

2. Tapriya, Astha. Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping.

Degree: MS, Microelectronic Engineering, 2017, Rochester Institute of Technology

  Controlled doping of semiconductor material with high atomic accuracy and minimum defects in silicon is needed for next generation nanoscale and solar devices. The… (more)

Subjects/Keywords: Monolayer doping; Phosphorous; Shallow junction; Specific contact resistivity

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APA (6th Edition):

Tapriya, A. (2017). Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/9527

Chicago Manual of Style (16th Edition):

Tapriya, Astha. “Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping.” 2017. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/9527.

MLA Handbook (7th Edition):

Tapriya, Astha. “Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping.” 2017. Web. 22 Oct 2019.

Vancouver:

Tapriya A. Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping. [Internet] [Masters thesis]. Rochester Institute of Technology; 2017. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/9527.

Council of Science Editors:

Tapriya A. Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping. [Masters Thesis]. Rochester Institute of Technology; 2017. Available from: https://scholarworks.rit.edu/theses/9527


Rochester Institute of Technology

3. Shenoy Manur, Deekshith. FDMA Enabled Phase-based Wireless Network-on-Chip using Graphene-based THz-band Antennas.

Degree: MS, Computer Engineering, 2017, Rochester Institute of Technology

  The future growth in System-on-chip design is moving in the direction of multicore systems. Design of efficient interconnects between cores are crucial for improving… (more)

Subjects/Keywords: Graphene; Multichip system; Multicore architecture; Network-on-ship; THz; Wireless interconnects

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APA (6th Edition):

Shenoy Manur, D. (2017). FDMA Enabled Phase-based Wireless Network-on-Chip using Graphene-based THz-band Antennas. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/9691

Chicago Manual of Style (16th Edition):

Shenoy Manur, Deekshith. “FDMA Enabled Phase-based Wireless Network-on-Chip using Graphene-based THz-band Antennas.” 2017. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/9691.

MLA Handbook (7th Edition):

Shenoy Manur, Deekshith. “FDMA Enabled Phase-based Wireless Network-on-Chip using Graphene-based THz-band Antennas.” 2017. Web. 22 Oct 2019.

Vancouver:

Shenoy Manur D. FDMA Enabled Phase-based Wireless Network-on-Chip using Graphene-based THz-band Antennas. [Internet] [Masters thesis]. Rochester Institute of Technology; 2017. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/9691.

Council of Science Editors:

Shenoy Manur D. FDMA Enabled Phase-based Wireless Network-on-Chip using Graphene-based THz-band Antennas. [Masters Thesis]. Rochester Institute of Technology; 2017. Available from: https://scholarworks.rit.edu/theses/9691


Rochester Institute of Technology

4. Locke, Joshua R. CMOS Compatible 3-Axis Magnetic Field Sensor using Hall Effect Sensing.

Degree: MS, Microelectronic Engineering, 2015, Rochester Institute of Technology

  The purpose of this study is to design, fabricate and test a CMOS compatible 3-axis Hall effect sensor capable of detecting the earth’s magnetic… (more)

Subjects/Keywords: CMOS processing; Hall effect; Magnetic sensing; MEMS

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APA (6th Edition):

Locke, J. R. (2015). CMOS Compatible 3-Axis Magnetic Field Sensor using Hall Effect Sensing. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/8939

Chicago Manual of Style (16th Edition):

Locke, Joshua R. “CMOS Compatible 3-Axis Magnetic Field Sensor using Hall Effect Sensing.” 2015. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/8939.

MLA Handbook (7th Edition):

Locke, Joshua R. “CMOS Compatible 3-Axis Magnetic Field Sensor using Hall Effect Sensing.” 2015. Web. 22 Oct 2019.

Vancouver:

Locke JR. CMOS Compatible 3-Axis Magnetic Field Sensor using Hall Effect Sensing. [Internet] [Masters thesis]. Rochester Institute of Technology; 2015. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/8939.

Council of Science Editors:

Locke JR. CMOS Compatible 3-Axis Magnetic Field Sensor using Hall Effect Sensing. [Masters Thesis]. Rochester Institute of Technology; 2015. Available from: https://scholarworks.rit.edu/theses/8939


Rochester Institute of Technology

5. Liotta, Nicholas O. An Industrial Fluid Multi-Sensor.

Degree: MS, Electrical Engineering, 2012, Rochester Institute of Technology

  Determining oil quality is an important part of any industry that uses oil as lubrication. Over time oil quality degrades with use or from… (more)

Subjects/Keywords: None provided

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APA (6th Edition):

Liotta, N. O. (2012). An Industrial Fluid Multi-Sensor. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/8608

Chicago Manual of Style (16th Edition):

Liotta, Nicholas O. “An Industrial Fluid Multi-Sensor.” 2012. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/8608.

MLA Handbook (7th Edition):

Liotta, Nicholas O. “An Industrial Fluid Multi-Sensor.” 2012. Web. 22 Oct 2019.

Vancouver:

Liotta NO. An Industrial Fluid Multi-Sensor. [Internet] [Masters thesis]. Rochester Institute of Technology; 2012. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/8608.

Council of Science Editors:

Liotta NO. An Industrial Fluid Multi-Sensor. [Masters Thesis]. Rochester Institute of Technology; 2012. Available from: https://scholarworks.rit.edu/theses/8608


Rochester Institute of Technology

6. Sanchez, Ky-el. Design, Fabrication and Test of a Graphene-Based THz Modulator.

Degree: MS, Microelectronic Engineering, 2019, Rochester Institute of Technology

  One of the most promising approaches to achieve high-speed wireless communication in the terahertz regime is by designing and fabricating devices based on the… (more)

Subjects/Keywords: Graphene plasmonics; Micro-electronic fabrication; THz modulator

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APA (6th Edition):

Sanchez, K. (2019). Design, Fabrication and Test of a Graphene-Based THz Modulator. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/10095

Chicago Manual of Style (16th Edition):

Sanchez, Ky-el. “Design, Fabrication and Test of a Graphene-Based THz Modulator.” 2019. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/10095.

MLA Handbook (7th Edition):

Sanchez, Ky-el. “Design, Fabrication and Test of a Graphene-Based THz Modulator.” 2019. Web. 22 Oct 2019.

Vancouver:

Sanchez K. Design, Fabrication and Test of a Graphene-Based THz Modulator. [Internet] [Masters thesis]. Rochester Institute of Technology; 2019. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/10095.

Council of Science Editors:

Sanchez K. Design, Fabrication and Test of a Graphene-Based THz Modulator. [Masters Thesis]. Rochester Institute of Technology; 2019. Available from: https://scholarworks.rit.edu/theses/10095


Rochester Institute of Technology

7. Shinde, Tanmay Vinay. Design, Fault Modeling and Testing Of a Fully Integrated Low Noise Amplifier (LNA) in 45 nm CMOS Technology for Inter and Intra-Chip Wireless Interconnects.

Degree: MS, Electrical Engineering, 2018, Rochester Institute of Technology

  Research in recent years has demonstrated that intra and inter-chip wireless interconnects are capable of establishing energy-efficient data communications within as well as between… (more)

Subjects/Keywords: None provided

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APA (6th Edition):

Shinde, T. V. (2018). Design, Fault Modeling and Testing Of a Fully Integrated Low Noise Amplifier (LNA) in 45 nm CMOS Technology for Inter and Intra-Chip Wireless Interconnects. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/9880

Chicago Manual of Style (16th Edition):

Shinde, Tanmay Vinay. “Design, Fault Modeling and Testing Of a Fully Integrated Low Noise Amplifier (LNA) in 45 nm CMOS Technology for Inter and Intra-Chip Wireless Interconnects.” 2018. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/9880.

MLA Handbook (7th Edition):

Shinde, Tanmay Vinay. “Design, Fault Modeling and Testing Of a Fully Integrated Low Noise Amplifier (LNA) in 45 nm CMOS Technology for Inter and Intra-Chip Wireless Interconnects.” 2018. Web. 22 Oct 2019.

Vancouver:

Shinde TV. Design, Fault Modeling and Testing Of a Fully Integrated Low Noise Amplifier (LNA) in 45 nm CMOS Technology for Inter and Intra-Chip Wireless Interconnects. [Internet] [Masters thesis]. Rochester Institute of Technology; 2018. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/9880.

Council of Science Editors:

Shinde TV. Design, Fault Modeling and Testing Of a Fully Integrated Low Noise Amplifier (LNA) in 45 nm CMOS Technology for Inter and Intra-Chip Wireless Interconnects. [Masters Thesis]. Rochester Institute of Technology; 2018. Available from: https://scholarworks.rit.edu/theses/9880


Rochester Institute of Technology

8. Sethupathi, Harithshanmaa. A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs.

Degree: MS, Microelectronic Engineering, 2019, Rochester Institute of Technology

  The continuous demand for ultra-high resolution and improved video performance on increasingly larger active-matrix displays has advanced the research field of thin film transistors… (more)

Subjects/Keywords: Copper; Display devices; IGZO TFT; Titanium

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APA (6th Edition):

Sethupathi, H. (2019). A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/10191

Chicago Manual of Style (16th Edition):

Sethupathi, Harithshanmaa. “A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs.” 2019. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/10191.

MLA Handbook (7th Edition):

Sethupathi, Harithshanmaa. “A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs.” 2019. Web. 22 Oct 2019.

Vancouver:

Sethupathi H. A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs. [Internet] [Masters thesis]. Rochester Institute of Technology; 2019. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/10191.

Council of Science Editors:

Sethupathi H. A Study on Copper-Gate Integration with Titanium Interface Layers for IGZO TFTs. [Masters Thesis]. Rochester Institute of Technology; 2019. Available from: https://scholarworks.rit.edu/theses/10191


Rochester Institute of Technology

9. Garg, Viraj. Engineering Source/Channel/Drain Regions for PMOS TFTs in Flash Lamp Annealed Polycrystalline Silicon.

Degree: MS, Microelectronic Engineering, 2019, Rochester Institute of Technology

  The flat panel industry requires high performance semiconductor materials to withstand the growth rate in the standards of display quality due to the inability… (more)

Subjects/Keywords: Channel; Drain; Interface; Mixed-phase; Preamorphization; Source

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APA (6th Edition):

Garg, V. (2019). Engineering Source/Channel/Drain Regions for PMOS TFTs in Flash Lamp Annealed Polycrystalline Silicon. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/10149

Chicago Manual of Style (16th Edition):

Garg, Viraj. “Engineering Source/Channel/Drain Regions for PMOS TFTs in Flash Lamp Annealed Polycrystalline Silicon.” 2019. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/10149.

MLA Handbook (7th Edition):

Garg, Viraj. “Engineering Source/Channel/Drain Regions for PMOS TFTs in Flash Lamp Annealed Polycrystalline Silicon.” 2019. Web. 22 Oct 2019.

Vancouver:

Garg V. Engineering Source/Channel/Drain Regions for PMOS TFTs in Flash Lamp Annealed Polycrystalline Silicon. [Internet] [Masters thesis]. Rochester Institute of Technology; 2019. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/10149.

Council of Science Editors:

Garg V. Engineering Source/Channel/Drain Regions for PMOS TFTs in Flash Lamp Annealed Polycrystalline Silicon. [Masters Thesis]. Rochester Institute of Technology; 2019. Available from: https://scholarworks.rit.edu/theses/10149

10. Melnick, Joshua Robert. Aluminum Nitride Contour Mode Resonators.

Degree: MS, Microelectronic Engineering, 2015, Rochester Institute of Technology

  Resonators are a major component in RF electronic products. They are used in a host of ways to filter radio signals. Modern and Future… (more)

Subjects/Keywords: Aluminum nitride; Apodization; Filter; MEMS; Process; Resonator

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APA (6th Edition):

Melnick, J. R. (2015). Aluminum Nitride Contour Mode Resonators. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/8699

Chicago Manual of Style (16th Edition):

Melnick, Joshua Robert. “Aluminum Nitride Contour Mode Resonators.” 2015. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/8699.

MLA Handbook (7th Edition):

Melnick, Joshua Robert. “Aluminum Nitride Contour Mode Resonators.” 2015. Web. 22 Oct 2019.

Vancouver:

Melnick JR. Aluminum Nitride Contour Mode Resonators. [Internet] [Masters thesis]. Rochester Institute of Technology; 2015. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/8699.

Council of Science Editors:

Melnick JR. Aluminum Nitride Contour Mode Resonators. [Masters Thesis]. Rochester Institute of Technology; 2015. Available from: https://scholarworks.rit.edu/theses/8699

11. Cabrera, David. Material Engineering for Phase Change Memory.

Degree: MS, Electrical Engineering, 2014, Rochester Institute of Technology

  As semiconductor devices continue to scale downward, and portable consumer electronics become more prevalent there is a need to develop memory technology that will… (more)

Subjects/Keywords: Chalcogenide; Dopants; Drift; Phase change; Threshold field

…Microsystems Fabrication Laboratory at the Rochester Institute of Technology (RIT). Masks… …Institute of Technology VLSI Very Large Scale Integrated RAM Random Access Memory DRAM… …52 ix List of Symbols Vth Threshold Voltage x List of Acronyms RIT Rochester… 

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APA (6th Edition):

Cabrera, D. (2014). Material Engineering for Phase Change Memory. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/7939

Chicago Manual of Style (16th Edition):

Cabrera, David. “Material Engineering for Phase Change Memory.” 2014. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/7939.

MLA Handbook (7th Edition):

Cabrera, David. “Material Engineering for Phase Change Memory.” 2014. Web. 22 Oct 2019.

Vancouver:

Cabrera D. Material Engineering for Phase Change Memory. [Internet] [Masters thesis]. Rochester Institute of Technology; 2014. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/7939.

Council of Science Editors:

Cabrera D. Material Engineering for Phase Change Memory. [Masters Thesis]. Rochester Institute of Technology; 2014. Available from: https://scholarworks.rit.edu/theses/7939

12. Parikh, Samarth. Manufacturing Design and Fabrication of 100 nm (Leff) CMOS Devices.

Degree: MS, Microelectronic Engineering, 2014, Rochester Institute of Technology

  A CMOS process for fabricating 100 nm CMOS devices has been developed. The Leff = 100 nm NMOS and PMOS transistors are the smallest… (more)

Subjects/Keywords: CMOS; CMOS fabrication; CMOS scaling; Microelectronic manufacturing; Recessed oxide isolation; Titanium silicide

Rochester Institute of Technology started the nation’s first Microelectronic Engineering program… 

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APA (6th Edition):

Parikh, S. (2014). Manufacturing Design and Fabrication of 100 nm (Leff) CMOS Devices. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/7948

Chicago Manual of Style (16th Edition):

Parikh, Samarth. “Manufacturing Design and Fabrication of 100 nm (Leff) CMOS Devices.” 2014. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/7948.

MLA Handbook (7th Edition):

Parikh, Samarth. “Manufacturing Design and Fabrication of 100 nm (Leff) CMOS Devices.” 2014. Web. 22 Oct 2019.

Vancouver:

Parikh S. Manufacturing Design and Fabrication of 100 nm (Leff) CMOS Devices. [Internet] [Masters thesis]. Rochester Institute of Technology; 2014. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/7948.

Council of Science Editors:

Parikh S. Manufacturing Design and Fabrication of 100 nm (Leff) CMOS Devices. [Masters Thesis]. Rochester Institute of Technology; 2014. Available from: https://scholarworks.rit.edu/theses/7948

13. Amareshbabu, Chandan K. Modeling, Simulation and Fabrication of 100 nm (Leff) High Performance CMOS Transistors.

Degree: MS, Electrical Engineering, 2014, Rochester Institute of Technology

  A 100 nm CMOS process is modeled and simulated using advanced ion implantation, diffusion models, recombination and mobility models; in ATHENA and ATLAS respectively.… (more)

Subjects/Keywords: Fabrication; Diffusion; Doping concentration; Lithography; Metals; Dry etch

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APA (6th Edition):

Amareshbabu, C. K. (2014). Modeling, Simulation and Fabrication of 100 nm (Leff) High Performance CMOS Transistors. (Masters Thesis). Rochester Institute of Technology. Retrieved from https://scholarworks.rit.edu/theses/8334

Chicago Manual of Style (16th Edition):

Amareshbabu, Chandan K. “Modeling, Simulation and Fabrication of 100 nm (Leff) High Performance CMOS Transistors.” 2014. Masters Thesis, Rochester Institute of Technology. Accessed October 22, 2019. https://scholarworks.rit.edu/theses/8334.

MLA Handbook (7th Edition):

Amareshbabu, Chandan K. “Modeling, Simulation and Fabrication of 100 nm (Leff) High Performance CMOS Transistors.” 2014. Web. 22 Oct 2019.

Vancouver:

Amareshbabu CK. Modeling, Simulation and Fabrication of 100 nm (Leff) High Performance CMOS Transistors. [Internet] [Masters thesis]. Rochester Institute of Technology; 2014. [cited 2019 Oct 22]. Available from: https://scholarworks.rit.edu/theses/8334.

Council of Science Editors:

Amareshbabu CK. Modeling, Simulation and Fabrication of 100 nm (Leff) High Performance CMOS Transistors. [Masters Thesis]. Rochester Institute of Technology; 2014. Available from: https://scholarworks.rit.edu/theses/8334

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