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You searched for +publisher:"Rice University" +contributor:("Cavallaro, Joseph R."). Showing records 1 – 30 of 42 total matches.

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Rice University

1. Amiri, Kiarash. Cooperative Partial Detection for MIMO Relay Networks.

Degree: PhD, Engineering, 2011, Rice University

 Cooperative communication has recently re-emerged as a possible paradigm shift to realize the promises of the ever increasing wireless communication market; however, there have been… (more)

Subjects/Keywords: Electrical Engineering; Computer engineering

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APA (6th Edition):

Amiri, K. (2011). Cooperative Partial Detection for MIMO Relay Networks. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/64372

Chicago Manual of Style (16th Edition):

Amiri, Kiarash. “Cooperative Partial Detection for MIMO Relay Networks.” 2011. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/64372.

MLA Handbook (7th Edition):

Amiri, Kiarash. “Cooperative Partial Detection for MIMO Relay Networks.” 2011. Web. 13 Oct 2019.

Vancouver:

Amiri K. Cooperative Partial Detection for MIMO Relay Networks. [Internet] [Doctoral dissertation]. Rice University; 2011. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/64372.

Council of Science Editors:

Amiri K. Cooperative Partial Detection for MIMO Relay Networks. [Doctoral Dissertation]. Rice University; 2011. Available from: http://hdl.handle.net/1911/64372


Rice University

2. Sun, Yang. Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems.

Degree: PhD, Engineering, 2011, Rice University

 In wireless communications, the use of multiple antennas at both the transmitter and the receiver is a key technology to enable high data rate transmission… (more)

Subjects/Keywords: Applied sciences; Parallel architectures; VLSI; MIMO; Turbo decoders; Low-density parity-check codes; Computer engineering; Electrical engineering

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APA (6th Edition):

Sun, Y. (2011). Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/70461

Chicago Manual of Style (16th Edition):

Sun, Yang. “Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems.” 2011. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/70461.

MLA Handbook (7th Edition):

Sun, Yang. “Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems.” 2011. Web. 13 Oct 2019.

Vancouver:

Sun Y. Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems. [Internet] [Doctoral dissertation]. Rice University; 2011. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/70461.

Council of Science Editors:

Sun Y. Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems. [Doctoral Dissertation]. Rice University; 2011. Available from: http://hdl.handle.net/1911/70461


Rice University

3. Wu, Michael. Efficient Detectors for LTE Uplink Systems: From Small to Large Systems.

Degree: PhD, Engineering, 2016, Rice University

 3GPP Long Term Evolution (LTE) is currently the most popular cellular wireless communication standard. Future releases of the 3GPP specifications consider large-scale (or massive) multiple-input… (more)

Subjects/Keywords: MIMO; LTE; Large-Scale MIMO

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APA (6th Edition):

Wu, M. (2016). Efficient Detectors for LTE Uplink Systems: From Small to Large Systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/95555

Chicago Manual of Style (16th Edition):

Wu, Michael. “Efficient Detectors for LTE Uplink Systems: From Small to Large Systems.” 2016. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/95555.

MLA Handbook (7th Edition):

Wu, Michael. “Efficient Detectors for LTE Uplink Systems: From Small to Large Systems.” 2016. Web. 13 Oct 2019.

Vancouver:

Wu M. Efficient Detectors for LTE Uplink Systems: From Small to Large Systems. [Internet] [Doctoral dissertation]. Rice University; 2016. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/95555.

Council of Science Editors:

Wu M. Efficient Detectors for LTE Uplink Systems: From Small to Large Systems. [Doctoral Dissertation]. Rice University; 2016. Available from: http://hdl.handle.net/1911/95555


Rice University

4. Karkooti, Marjan. Distributed partial decoding in cooperative communication systems.

Degree: PhD, Engineering, 2009, Rice University

 Increasing demand for wireless services is putting major pressure on network resources, which demands a new paradigm with a more efficient design. Recently, cooperative communications… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Karkooti, M. (2009). Distributed partial decoding in cooperative communication systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/61944

Chicago Manual of Style (16th Edition):

Karkooti, Marjan. “Distributed partial decoding in cooperative communication systems.” 2009. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/61944.

MLA Handbook (7th Edition):

Karkooti, Marjan. “Distributed partial decoding in cooperative communication systems.” 2009. Web. 13 Oct 2019.

Vancouver:

Karkooti M. Distributed partial decoding in cooperative communication systems. [Internet] [Doctoral dissertation]. Rice University; 2009. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/61944.

Council of Science Editors:

Karkooti M. Distributed partial decoding in cooperative communication systems. [Doctoral Dissertation]. Rice University; 2009. Available from: http://hdl.handle.net/1911/61944


Rice University

5. Wu, Michael. On the application of graphics processor to wireless receiver design.

Degree: MS, Engineering, 2010, Rice University

 In many wireless systems, a Turbo decoder is often combined with a soft-output multiple-input and multiple-output (MIMO) detector at the receiver to maximize performance in… (more)

Subjects/Keywords: Computer; Electronics; Electrical engineering

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APA (6th Edition):

Wu, M. (2010). On the application of graphics processor to wireless receiver design. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/62098

Chicago Manual of Style (16th Edition):

Wu, Michael. “On the application of graphics processor to wireless receiver design.” 2010. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/62098.

MLA Handbook (7th Edition):

Wu, Michael. “On the application of graphics processor to wireless receiver design.” 2010. Web. 13 Oct 2019.

Vancouver:

Wu M. On the application of graphics processor to wireless receiver design. [Internet] [Masters thesis]. Rice University; 2010. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/62098.

Council of Science Editors:

Wu M. On the application of graphics processor to wireless receiver design. [Masters Thesis]. Rice University; 2010. Available from: http://hdl.handle.net/1911/62098

6. Vosoughi, Aida. Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks.

Degree: PhD, Engineering, 2016, Rice University

 Dynamic spectrum access paradigm, enabled by cognitive radios, presents an adaptive approach for spectrum sharing by allowing secondary users to use licensed spectrum bands on… (more)

Subjects/Keywords: Dynamic spectrum access; Cognitive radio ad hoc networks; Distributed consensus-based cooperative spectrum sensing; Trust management; Insistent spectrum sensing data falsification attack

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APA (6th Edition):

Vosoughi, A. (2016). Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/96522

Chicago Manual of Style (16th Edition):

Vosoughi, Aida. “Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks.” 2016. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/96522.

MLA Handbook (7th Edition):

Vosoughi, Aida. “Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks.” 2016. Web. 13 Oct 2019.

Vancouver:

Vosoughi A. Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks. [Internet] [Doctoral dissertation]. Rice University; 2016. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/96522.

Council of Science Editors:

Vosoughi A. Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks. [Doctoral Dissertation]. Rice University; 2016. Available from: http://hdl.handle.net/1911/96522


Rice University

7. Giles, Ellis Robinson. WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory.

Degree: MS, Engineering, 2015, Rice University

 In-memory computing is gaining popularity as a means of sidestepping the performance bottlenecks of traditional block-based storage devices. However, the volatile nature of DRAM makes… (more)

Subjects/Keywords: SCM; Atomicity; Persistence; Storage Class Memory; Phase Change Memory; PCM

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APA (6th Edition):

Giles, E. R. (2015). WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/87822

Chicago Manual of Style (16th Edition):

Giles, Ellis Robinson. “WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory.” 2015. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/87822.

MLA Handbook (7th Edition):

Giles, Ellis Robinson. “WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory.” 2015. Web. 13 Oct 2019.

Vancouver:

Giles ER. WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory. [Internet] [Masters thesis]. Rice University; 2015. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/87822.

Council of Science Editors:

Giles ER. WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory. [Masters Thesis]. Rice University; 2015. Available from: http://hdl.handle.net/1911/87822


Rice University

8. Wang, Guohui. Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems.

Degree: PhD, Engineering, 2014, Rice University

 During past several years, there has been a trend that the modern mobile SoC (system-on-chip) chipsets start to incorporate in one single chip the functionality… (more)

Subjects/Keywords: Mobile computing; parallel algorithm; parallel architecture; VLSI; GPU

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APA (6th Edition):

Wang, G. (2014). Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/88381

Chicago Manual of Style (16th Edition):

Wang, Guohui. “Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems.” 2014. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/88381.

MLA Handbook (7th Edition):

Wang, Guohui. “Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems.” 2014. Web. 13 Oct 2019.

Vancouver:

Wang G. Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems. [Internet] [Doctoral dissertation]. Rice University; 2014. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/88381.

Council of Science Editors:

Wang G. Design Space Exploration of Parallel Algorithms and Architectures for Wireless Communication and Mobile Computing Systems. [Doctoral Dissertation]. Rice University; 2014. Available from: http://hdl.handle.net/1911/88381


Rice University

9. Yin, Bei. Low Complexity Detection and Precoding for Massive MIMO Systems: Algorithm, Architecture, and Application.

Degree: PhD, Engineering, 2014, Rice University

 Massive (or large-scale) MIMO is an emerging technology to improve the spectral efficiency of existing (small-scale) MIMO wireless communication systems. The main idea is to… (more)

Subjects/Keywords: Massive MIMO; Large-scale MIMO; detection; precoding; VLSI; Neumann; conjugate gradient; least square

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APA (6th Edition):

Yin, B. (2014). Low Complexity Detection and Precoding for Massive MIMO Systems: Algorithm, Architecture, and Application. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/87787

Chicago Manual of Style (16th Edition):

Yin, Bei. “Low Complexity Detection and Precoding for Massive MIMO Systems: Algorithm, Architecture, and Application.” 2014. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/87787.

MLA Handbook (7th Edition):

Yin, Bei. “Low Complexity Detection and Precoding for Massive MIMO Systems: Algorithm, Architecture, and Application.” 2014. Web. 13 Oct 2019.

Vancouver:

Yin B. Low Complexity Detection and Precoding for Massive MIMO Systems: Algorithm, Architecture, and Application. [Internet] [Doctoral dissertation]. Rice University; 2014. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/87787.

Council of Science Editors:

Yin B. Low Complexity Detection and Precoding for Massive MIMO Systems: Algorithm, Architecture, and Application. [Doctoral Dissertation]. Rice University; 2014. Available from: http://hdl.handle.net/1911/87787


Rice University

10. Xu, Chao. Automated OS-level Device Runtime Power Management.

Degree: MS, Engineering, 2014, Rice University

 Hardware devices on a modern System-on-Chip (SoC), ranging from accelerators to IO controllers, usually account for the largest portion of the chip area. It is… (more)

Subjects/Keywords: Runtime power management; SoC; OS

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APA (6th Edition):

Xu, C. (2014). Automated OS-level Device Runtime Power Management. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/87791

Chicago Manual of Style (16th Edition):

Xu, Chao. “Automated OS-level Device Runtime Power Management.” 2014. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/87791.

MLA Handbook (7th Edition):

Xu, Chao. “Automated OS-level Device Runtime Power Management.” 2014. Web. 13 Oct 2019.

Vancouver:

Xu C. Automated OS-level Device Runtime Power Management. [Internet] [Masters thesis]. Rice University; 2014. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/87791.

Council of Science Editors:

Xu C. Automated OS-level Device Runtime Power Management. [Masters Thesis]. Rice University; 2014. Available from: http://hdl.handle.net/1911/87791


Rice University

11. Wang, Hui. Resource Allocation Models for Multi-Tiered Storage: Balancing System Efficiency and QoS.

Degree: PhD, Engineering, 2015, Rice University

 Multi-tiered storage systems made up of combined Solid State Drives (SSDs) and Hard Disks (HDs) are becoming increasingly popular in shared data centers due to… (more)

Subjects/Keywords: Resource allocation models; QoS; Multi-tiered storage

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APA (6th Edition):

Wang, H. (2015). Resource Allocation Models for Multi-Tiered Storage: Balancing System Efficiency and QoS. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/88385

Chicago Manual of Style (16th Edition):

Wang, Hui. “Resource Allocation Models for Multi-Tiered Storage: Balancing System Efficiency and QoS.” 2015. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/88385.

MLA Handbook (7th Edition):

Wang, Hui. “Resource Allocation Models for Multi-Tiered Storage: Balancing System Efficiency and QoS.” 2015. Web. 13 Oct 2019.

Vancouver:

Wang H. Resource Allocation Models for Multi-Tiered Storage: Balancing System Efficiency and QoS. [Internet] [Doctoral dissertation]. Rice University; 2015. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/88385.

Council of Science Editors:

Wang H. Resource Allocation Models for Multi-Tiered Storage: Balancing System Efficiency and QoS. [Doctoral Dissertation]. Rice University; 2015. Available from: http://hdl.handle.net/1911/88385

12. Reyes, Jose Eduardo. Virtual Ring Buffer for Camera Application Concurrency.

Degree: MS, Engineering, 2015, Rice University

 Smartphones with integrated cameras have inspired a growing number of real- time, computer vision applications. Existing camera software architectures, however, do not support concurrency: only… (more)

Subjects/Keywords: Camera Driver Application Concurrency

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APA (6th Edition):

Reyes, J. E. (2015). Virtual Ring Buffer for Camera Application Concurrency. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/88109

Chicago Manual of Style (16th Edition):

Reyes, Jose Eduardo. “Virtual Ring Buffer for Camera Application Concurrency.” 2015. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/88109.

MLA Handbook (7th Edition):

Reyes, Jose Eduardo. “Virtual Ring Buffer for Camera Application Concurrency.” 2015. Web. 13 Oct 2019.

Vancouver:

Reyes JE. Virtual Ring Buffer for Camera Application Concurrency. [Internet] [Masters thesis]. Rice University; 2015. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/88109.

Council of Science Editors:

Reyes JE. Virtual Ring Buffer for Camera Application Concurrency. [Masters Thesis]. Rice University; 2015. Available from: http://hdl.handle.net/1911/88109

13. Krishna, Abhilash. Multiphysics model of a cardiac myocyte: A voltage-clamp study.

Degree: PhD, Engineering, 2013, Rice University

 We develop a composite multiphysics model of excitation-contraction coupling for a rat ventricular myocyte under voltage clamp (VC) conditions to: (1) probe mechanisms underlying the… (more)

Subjects/Keywords: Multiphysics model; Excitation-contraction coupling; Rats; Ventricular myocyte; Voltage clamp; Electromechanics; FFR; Force-frequency response; CICR; Calcium-induced calcium-release; Myofilament contraction

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APA (6th Edition):

Krishna, A. (2013). Multiphysics model of a cardiac myocyte: A voltage-clamp study. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/71664

Chicago Manual of Style (16th Edition):

Krishna, Abhilash. “Multiphysics model of a cardiac myocyte: A voltage-clamp study.” 2013. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/71664.

MLA Handbook (7th Edition):

Krishna, Abhilash. “Multiphysics model of a cardiac myocyte: A voltage-clamp study.” 2013. Web. 13 Oct 2019.

Vancouver:

Krishna A. Multiphysics model of a cardiac myocyte: A voltage-clamp study. [Internet] [Doctoral dissertation]. Rice University; 2013. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/71664.

Council of Science Editors:

Krishna A. Multiphysics model of a cardiac myocyte: A voltage-clamp study. [Doctoral Dissertation]. Rice University; 2013. Available from: http://hdl.handle.net/1911/71664

14. Elnably, Ahmed. Reward Scheduling for QoS in Cloud Applications.

Degree: MS, Engineering, 2012, Rice University

 The growing popularity of multi-tenant, cloud-based computing platforms is increasing interest in resource allocation models that permit flexible sharing of the underlying infrastructure. This thesis… (more)

Subjects/Keywords: QoS; Scheduling; Cloud; Storage Systems; Computer engineering

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APA (6th Edition):

Elnably, A. (2012). Reward Scheduling for QoS in Cloud Applications. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/64697

Chicago Manual of Style (16th Edition):

Elnably, Ahmed. “Reward Scheduling for QoS in Cloud Applications.” 2012. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/64697.

MLA Handbook (7th Edition):

Elnably, Ahmed. “Reward Scheduling for QoS in Cloud Applications.” 2012. Web. 13 Oct 2019.

Vancouver:

Elnably A. Reward Scheduling for QoS in Cloud Applications. [Internet] [Masters thesis]. Rice University; 2012. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/64697.

Council of Science Editors:

Elnably A. Reward Scheduling for QoS in Cloud Applications. [Masters Thesis]. Rice University; 2012. Available from: http://hdl.handle.net/1911/64697


Rice University

15. Gadhiok, Manik. Symbol timing synchronization for OFDM-based WLAN systems.

Degree: MS, Engineering, 2008, Rice University

 In this work, we address the problem of symbol timing synchronization for Orthogonal Frequency Division Multiplexing (OFDM) WLAN systems. OFDM systems are known to be… (more)

Subjects/Keywords: Electrical engineering; Computer science

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APA (6th Edition):

Gadhiok, M. (2008). Symbol timing synchronization for OFDM-based WLAN systems. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/64350

Chicago Manual of Style (16th Edition):

Gadhiok, Manik. “Symbol timing synchronization for OFDM-based WLAN systems.” 2008. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/64350.

MLA Handbook (7th Edition):

Gadhiok, Manik. “Symbol timing synchronization for OFDM-based WLAN systems.” 2008. Web. 13 Oct 2019.

Vancouver:

Gadhiok M. Symbol timing synchronization for OFDM-based WLAN systems. [Internet] [Masters thesis]. Rice University; 2008. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/64350.

Council of Science Editors:

Gadhiok M. Symbol timing synchronization for OFDM-based WLAN systems. [Masters Thesis]. Rice University; 2008. Available from: http://hdl.handle.net/1911/64350


Rice University

16. Radosavljevic, Predrag. Sphere detection and LDPC decoding algorithms and architectures for wireless systems.

Degree: PhD, Engineering, 2008, Rice University

 Ever increasing demand for high data rate wireless transmissions with high spectral efficiency leads to utilization of communication systems with multiple transmit and receive antennas.… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Radosavljevic, P. (2008). Sphere detection and LDPC decoding algorithms and architectures for wireless systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/22250

Chicago Manual of Style (16th Edition):

Radosavljevic, Predrag. “Sphere detection and LDPC decoding algorithms and architectures for wireless systems.” 2008. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/22250.

MLA Handbook (7th Edition):

Radosavljevic, Predrag. “Sphere detection and LDPC decoding algorithms and architectures for wireless systems.” 2008. Web. 13 Oct 2019.

Vancouver:

Radosavljevic P. Sphere detection and LDPC decoding algorithms and architectures for wireless systems. [Internet] [Doctoral dissertation]. Rice University; 2008. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/22250.

Council of Science Editors:

Radosavljevic P. Sphere detection and LDPC decoding algorithms and architectures for wireless systems. [Doctoral Dissertation]. Rice University; 2008. Available from: http://hdl.handle.net/1911/22250


Rice University

17. Brogioli, Michael C. Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads.

Degree: PhD, Engineering, 2007, Rice University

 Telecommunications and multimedia form a vast segment of the embedded systems market. Variations in standards coupled with the desire for software programmability often result in… (more)

Subjects/Keywords: Computer science

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APA (6th Edition):

Brogioli, M. C. (2007). Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/20579

Chicago Manual of Style (16th Edition):

Brogioli, Michael C. “Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads.” 2007. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/20579.

MLA Handbook (7th Edition):

Brogioli, Michael C. “Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads.” 2007. Web. 13 Oct 2019.

Vancouver:

Brogioli MC. Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads. [Internet] [Doctoral dissertation]. Rice University; 2007. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/20579.

Council of Science Editors:

Brogioli MC. Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads. [Doctoral Dissertation]. Rice University; 2007. Available from: http://hdl.handle.net/1911/20579


Rice University

18. Amiri, Kiarash. Architecture for detection in MIMO wireless systems.

Degree: MS, Engineering, 2007, Rice University

 In this work, we study two main classes of detectors for spatially multiplexed Multiple-input Multiple-output (MIMO) systems. For the first group, i.e. hard-decision detectors, we… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Amiri, K. (2007). Architecture for detection in MIMO wireless systems. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/20484

Chicago Manual of Style (16th Edition):

Amiri, Kiarash. “Architecture for detection in MIMO wireless systems.” 2007. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/20484.

MLA Handbook (7th Edition):

Amiri, Kiarash. “Architecture for detection in MIMO wireless systems.” 2007. Web. 13 Oct 2019.

Vancouver:

Amiri K. Architecture for detection in MIMO wireless systems. [Internet] [Masters thesis]. Rice University; 2007. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/20484.

Council of Science Editors:

Amiri K. Architecture for detection in MIMO wireless systems. [Masters Thesis]. Rice University; 2007. Available from: http://hdl.handle.net/1911/20484


Rice University

19. Hemkumar, Nariankadu D. Efficient VLSI architectures for matrix factorizations.

Degree: PhD, Engineering, 1994, Rice University

 The SVD (Singular Value Decomposition) is a critical matrix factorization in many real-time computations from an application domain which includes signal processing and robotics; and… (more)

Subjects/Keywords: Electronics; Electrical engineering; Mathematics; Computer science

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APA (6th Edition):

Hemkumar, N. D. (1994). Efficient VLSI architectures for matrix factorizations. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/16731

Chicago Manual of Style (16th Edition):

Hemkumar, Nariankadu D. “Efficient VLSI architectures for matrix factorizations.” 1994. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/16731.

MLA Handbook (7th Edition):

Hemkumar, Nariankadu D. “Efficient VLSI architectures for matrix factorizations.” 1994. Web. 13 Oct 2019.

Vancouver:

Hemkumar ND. Efficient VLSI architectures for matrix factorizations. [Internet] [Doctoral dissertation]. Rice University; 1994. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/16731.

Council of Science Editors:

Hemkumar ND. Efficient VLSI architectures for matrix factorizations. [Doctoral Dissertation]. Rice University; 1994. Available from: http://hdl.handle.net/1911/16731


Rice University

20. Kota, Kishore. Architectural, numerical and implementation issues in the VLSI design of an integrated CORDIC-SVD processor.

Degree: MS, Engineering, 1991, Rice University

 This thesis describes the design of a systolic array for computing the Singular Value Decomposition (SVD) based on the Brent, Luk, Van Loan array. The… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Kota, K. (1991). Architectural, numerical and implementation issues in the VLSI design of an integrated CORDIC-SVD processor. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/13529

Chicago Manual of Style (16th Edition):

Kota, Kishore. “Architectural, numerical and implementation issues in the VLSI design of an integrated CORDIC-SVD processor.” 1991. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/13529.

MLA Handbook (7th Edition):

Kota, Kishore. “Architectural, numerical and implementation issues in the VLSI design of an integrated CORDIC-SVD processor.” 1991. Web. 13 Oct 2019.

Vancouver:

Kota K. Architectural, numerical and implementation issues in the VLSI design of an integrated CORDIC-SVD processor. [Internet] [Masters thesis]. Rice University; 1991. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/13529.

Council of Science Editors:

Kota K. Architectural, numerical and implementation issues in the VLSI design of an integrated CORDIC-SVD processor. [Masters Thesis]. Rice University; 1991. Available from: http://hdl.handle.net/1911/13529


Rice University

21. Sengupta, Chaitali. An integrated CAD framework linking VLSI layout editors and process simulators.

Degree: MS, Engineering, 1995, Rice University

 This thesis presents an Integrated CAD Framework which links VLSI layout editors to lithographic simulators and provides information on the simulated resolution of a feature… (more)

Subjects/Keywords: Electronics; Electrical engineering; Industrial engineering

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APA (6th Edition):

Sengupta, C. (1995). An integrated CAD framework linking VLSI layout editors and process simulators. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/13995

Chicago Manual of Style (16th Edition):

Sengupta, Chaitali. “An integrated CAD framework linking VLSI layout editors and process simulators.” 1995. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/13995.

MLA Handbook (7th Edition):

Sengupta, Chaitali. “An integrated CAD framework linking VLSI layout editors and process simulators.” 1995. Web. 13 Oct 2019.

Vancouver:

Sengupta C. An integrated CAD framework linking VLSI layout editors and process simulators. [Internet] [Masters thesis]. Rice University; 1995. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/13995.

Council of Science Editors:

Sengupta C. An integrated CAD framework linking VLSI layout editors and process simulators. [Masters Thesis]. Rice University; 1995. Available from: http://hdl.handle.net/1911/13995


Rice University

22. Hemkumar, Nariankadu Datatreya. A systolic VLSI architecture for complex SVD.

Degree: MS, Engineering, 1991, Rice University

 This thesis presents a systolic algorithm for the SVD of arbitrary complex matrices, based on the cyclic Jacobi method with "parallel ordering". As a basic… (more)

Subjects/Keywords: Electronics; Electrical engineering; Computer science

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APA (6th Edition):

Hemkumar, N. D. (1991). A systolic VLSI architecture for complex SVD. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/13526

Chicago Manual of Style (16th Edition):

Hemkumar, Nariankadu Datatreya. “A systolic VLSI architecture for complex SVD.” 1991. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/13526.

MLA Handbook (7th Edition):

Hemkumar, Nariankadu Datatreya. “A systolic VLSI architecture for complex SVD.” 1991. Web. 13 Oct 2019.

Vancouver:

Hemkumar ND. A systolic VLSI architecture for complex SVD. [Internet] [Masters thesis]. Rice University; 1991. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/13526.

Council of Science Editors:

Hemkumar ND. A systolic VLSI architecture for complex SVD. [Masters Thesis]. Rice University; 1991. Available from: http://hdl.handle.net/1911/13526


Rice University

23. Visinsky, Monica Lynn. Dynamic fault detection and intelligent fault tolerance for robotics.

Degree: PhD, Engineering, 1994, Rice University

 As robotics has begun to spread from the accessible arenas of laboratories and industry into more dangerous and remote environments such as space or hazardous… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Visinsky, M. L. (1994). Dynamic fault detection and intelligent fault tolerance for robotics. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/16786

Chicago Manual of Style (16th Edition):

Visinsky, Monica Lynn. “Dynamic fault detection and intelligent fault tolerance for robotics.” 1994. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/16786.

MLA Handbook (7th Edition):

Visinsky, Monica Lynn. “Dynamic fault detection and intelligent fault tolerance for robotics.” 1994. Web. 13 Oct 2019.

Vancouver:

Visinsky ML. Dynamic fault detection and intelligent fault tolerance for robotics. [Internet] [Doctoral dissertation]. Rice University; 1994. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/16786.

Council of Science Editors:

Visinsky ML. Dynamic fault detection and intelligent fault tolerance for robotics. [Doctoral Dissertation]. Rice University; 1994. Available from: http://hdl.handle.net/1911/16786


Rice University

24. Kota, Kishore. Parallel algorithms and architectures for near-far resistant CDMA acquisition.

Degree: PhD, Engineering, 1996, Rice University

 Subspace-based algorithms are a class of algorithms for estimation problems in array signal processing and more recently near-far resistant Code Division Multiple Access (CDMA) acquisition… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Kota, K. (1996). Parallel algorithms and architectures for near-far resistant CDMA acquisition. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/16952

Chicago Manual of Style (16th Edition):

Kota, Kishore. “Parallel algorithms and architectures for near-far resistant CDMA acquisition.” 1996. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/16952.

MLA Handbook (7th Edition):

Kota, Kishore. “Parallel algorithms and architectures for near-far resistant CDMA acquisition.” 1996. Web. 13 Oct 2019.

Vancouver:

Kota K. Parallel algorithms and architectures for near-far resistant CDMA acquisition. [Internet] [Doctoral dissertation]. Rice University; 1996. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/16952.

Council of Science Editors:

Kota K. Parallel algorithms and architectures for near-far resistant CDMA acquisition. [Doctoral Dissertation]. Rice University; 1996. Available from: http://hdl.handle.net/1911/16952


Rice University

25. Rajagopal, Sridhar. Baseband architecture design for future wireless base-station receivers.

Degree: MS, Engineering, 2000, Rice University

 This thesis demonstrates the use of designing efficient algorithms and architectures to meet the real-time requirements of future wireless base-station receivers. Next generation receivers will… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Rajagopal, S. (2000). Baseband architecture design for future wireless base-station receivers. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/17371

Chicago Manual of Style (16th Edition):

Rajagopal, Sridhar. “Baseband architecture design for future wireless base-station receivers.” 2000. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/17371.

MLA Handbook (7th Edition):

Rajagopal, Sridhar. “Baseband architecture design for future wireless base-station receivers.” 2000. Web. 13 Oct 2019.

Vancouver:

Rajagopal S. Baseband architecture design for future wireless base-station receivers. [Internet] [Masters thesis]. Rice University; 2000. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/17371.

Council of Science Editors:

Rajagopal S. Baseband architecture design for future wireless base-station receivers. [Masters Thesis]. Rice University; 2000. Available from: http://hdl.handle.net/1911/17371


Rice University

26. Chadha, Kanu. A reconfigurable decoder architecture for wireless LAN and cellular systems.

Degree: MS, Engineering, 2001, Rice University

 The rapid growth of wireless communications has led to the demand for communication devices which can support multiple standards and have the capability of switching… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Chadha, K. (2001). A reconfigurable decoder architecture for wireless LAN and cellular systems. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/17406

Chicago Manual of Style (16th Edition):

Chadha, Kanu. “A reconfigurable decoder architecture for wireless LAN and cellular systems.” 2001. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/17406.

MLA Handbook (7th Edition):

Chadha, Kanu. “A reconfigurable decoder architecture for wireless LAN and cellular systems.” 2001. Web. 13 Oct 2019.

Vancouver:

Chadha K. A reconfigurable decoder architecture for wireless LAN and cellular systems. [Internet] [Masters thesis]. Rice University; 2001. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/17406.

Council of Science Editors:

Chadha K. A reconfigurable decoder architecture for wireless LAN and cellular systems. [Masters Thesis]. Rice University; 2001. Available from: http://hdl.handle.net/1911/17406


Rice University

27. Sengupta, Chaitali. Algorithms and architectures for channel estimation in wireless CDMA communication systems.

Degree: PhD, Engineering, 1999, Rice University

 Wireless cellular communication is witnessing a rapid growth in markets, technology, and range of services. An attractive approach for economical, spectrally efficient, and high quality… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Sengupta, C. (1999). Algorithms and architectures for channel estimation in wireless CDMA communication systems. (Doctoral Dissertation). Rice University. Retrieved from http://hdl.handle.net/1911/19442

Chicago Manual of Style (16th Edition):

Sengupta, Chaitali. “Algorithms and architectures for channel estimation in wireless CDMA communication systems.” 1999. Doctoral Dissertation, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/19442.

MLA Handbook (7th Edition):

Sengupta, Chaitali. “Algorithms and architectures for channel estimation in wireless CDMA communication systems.” 1999. Web. 13 Oct 2019.

Vancouver:

Sengupta C. Algorithms and architectures for channel estimation in wireless CDMA communication systems. [Internet] [Doctoral dissertation]. Rice University; 1999. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/19442.

Council of Science Editors:

Sengupta C. Algorithms and architectures for channel estimation in wireless CDMA communication systems. [Doctoral Dissertation]. Rice University; 1999. Available from: http://hdl.handle.net/1911/19442


Rice University

28. Radosavljevic, Predrag. Channel equalization algorithms for MIMO downlink and ASIP architectures.

Degree: MS, Engineering, 2004, Rice University

 Processors for mobile handsets in 3G cellular systems require: high speed, flexibility and low power dissipation. While computationally efficient, ASIC processors are often not flexible… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Radosavljevic, P. (2004). Channel equalization algorithms for MIMO downlink and ASIP architectures. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/17722

Chicago Manual of Style (16th Edition):

Radosavljevic, Predrag. “Channel equalization algorithms for MIMO downlink and ASIP architectures.” 2004. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/17722.

MLA Handbook (7th Edition):

Radosavljevic, Predrag. “Channel equalization algorithms for MIMO downlink and ASIP architectures.” 2004. Web. 13 Oct 2019.

Vancouver:

Radosavljevic P. Channel equalization algorithms for MIMO downlink and ASIP architectures. [Internet] [Masters thesis]. Rice University; 2004. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/17722.

Council of Science Editors:

Radosavljevic P. Channel equalization algorithms for MIMO downlink and ASIP architectures. [Masters Thesis]. Rice University; 2004. Available from: http://hdl.handle.net/1911/17722


Rice University

29. Jones, Bryan A. Rapid prototyping of wireless communications systems.

Degree: MS, Engineering, 2002, Rice University

 This thesis introduces rapid prototyping methodology which overcomes important barriers in the design and implementation of digital signal processing (DSP) algorithms and systems on embedded… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Jones, B. A. (2002). Rapid prototyping of wireless communications systems. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/17513

Chicago Manual of Style (16th Edition):

Jones, Bryan A. “Rapid prototyping of wireless communications systems.” 2002. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/17513.

MLA Handbook (7th Edition):

Jones, Bryan A. “Rapid prototyping of wireless communications systems.” 2002. Web. 13 Oct 2019.

Vancouver:

Jones BA. Rapid prototyping of wireless communications systems. [Internet] [Masters thesis]. Rice University; 2002. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/17513.

Council of Science Editors:

Jones BA. Rapid prototyping of wireless communications systems. [Masters Thesis]. Rice University; 2002. Available from: http://hdl.handle.net/1911/17513


Rice University

30. Xu, Gang. Implementation issues of multiuser detection in CDMA communication systems.

Degree: MS, Engineering, 1999, Rice University

 Multistage detectors have been accepted in designs for next generation CDMA base stations because they are less complex than some other multiuser detectors. In this… (more)

Subjects/Keywords: Electronics; Electrical engineering

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APA (6th Edition):

Xu, G. (1999). Implementation issues of multiuser detection in CDMA communication systems. (Masters Thesis). Rice University. Retrieved from http://hdl.handle.net/1911/17315

Chicago Manual of Style (16th Edition):

Xu, Gang. “Implementation issues of multiuser detection in CDMA communication systems.” 1999. Masters Thesis, Rice University. Accessed October 13, 2019. http://hdl.handle.net/1911/17315.

MLA Handbook (7th Edition):

Xu, Gang. “Implementation issues of multiuser detection in CDMA communication systems.” 1999. Web. 13 Oct 2019.

Vancouver:

Xu G. Implementation issues of multiuser detection in CDMA communication systems. [Internet] [Masters thesis]. Rice University; 1999. [cited 2019 Oct 13]. Available from: http://hdl.handle.net/1911/17315.

Council of Science Editors:

Xu G. Implementation issues of multiuser detection in CDMA communication systems. [Masters Thesis]. Rice University; 1999. Available from: http://hdl.handle.net/1911/17315

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