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You searched for +publisher:"Oregon State University" +contributor:("Temes, Gabor"). Showing records 1 – 30 of 81 total matches.

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Oregon State University

1. Gande, Manideep. Design techniques for time based data converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data… (more)

Subjects/Keywords: Time based data converters; Analog-to-digital converters

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APA (6th Edition):

Gande, M. (2013). Design techniques for time based data converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/39773

Chicago Manual of Style (16th Edition):

Gande, Manideep. “Design techniques for time based data converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/39773.

MLA Handbook (7th Edition):

Gande, Manideep. “Design techniques for time based data converters.” 2013. Web. 03 Aug 2020.

Vancouver:

Gande M. Design techniques for time based data converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/39773.

Council of Science Editors:

Gande M. Design techniques for time based data converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/39773


Oregon State University

2. Jung, Youngho. Wideband and high accuracy delta sigma modulation data converter.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 Nowadays, needs for wideband and high accuracy analog-to-digital converter are increasing rapidly in manifold applications such as wireless communication, digital video and other consumer electronics.… (more)

Subjects/Keywords: ΔΣ modulator; Modulators (Electronics)

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APA (6th Edition):

Jung, Y. (2014). Wideband and high accuracy delta sigma modulation data converter. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/51836

Chicago Manual of Style (16th Edition):

Jung, Youngho. “Wideband and high accuracy delta sigma modulation data converter.” 2014. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/51836.

MLA Handbook (7th Edition):

Jung, Youngho. “Wideband and high accuracy delta sigma modulation data converter.” 2014. Web. 03 Aug 2020.

Vancouver:

Jung Y. Wideband and high accuracy delta sigma modulation data converter. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/51836.

Council of Science Editors:

Jung Y. Wideband and high accuracy delta sigma modulation data converter. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/51836


Oregon State University

3. Hu, Yue. Efficient use of time information in analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information… (more)

Subjects/Keywords: Analog-to-digital converters

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APA (6th Edition):

Hu, Y. (2014). Efficient use of time information in analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/52553

Chicago Manual of Style (16th Edition):

Hu, Yue. “Efficient use of time information in analog-to-digital converters.” 2014. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/52553.

MLA Handbook (7th Edition):

Hu, Yue. “Efficient use of time information in analog-to-digital converters.” 2014. Web. 03 Aug 2020.

Vancouver:

Hu Y. Efficient use of time information in analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/52553.

Council of Science Editors:

Hu Y. Efficient use of time information in analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/52553


Oregon State University

4. Lee, Kyehyung. High efficiency delta-sigma modulation data converters.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single… (more)

Subjects/Keywords: delta-sigma modulation; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Lee, K. (2008). High efficiency delta-sigma modulation data converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/8457

Chicago Manual of Style (16th Edition):

Lee, Kyehyung. “High efficiency delta-sigma modulation data converters.” 2008. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/8457.

MLA Handbook (7th Edition):

Lee, Kyehyung. “High efficiency delta-sigma modulation data converters.” 2008. Web. 03 Aug 2020.

Vancouver:

Lee K. High efficiency delta-sigma modulation data converters. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/8457.

Council of Science Editors:

Lee K. High efficiency delta-sigma modulation data converters. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/8457


Oregon State University

5. Leung, Jerry. Data driven optimization in SAR ADC.

Degree: MS, Electrical and Computer Engineering, 2014, Oregon State University

 Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques… (more)

Subjects/Keywords: SAR; Successive approximation analog-to-digital converters

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APA (6th Edition):

Leung, J. (2014). Data driven optimization in SAR ADC. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/54631

Chicago Manual of Style (16th Edition):

Leung, Jerry. “Data driven optimization in SAR ADC.” 2014. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/54631.

MLA Handbook (7th Edition):

Leung, Jerry. “Data driven optimization in SAR ADC.” 2014. Web. 03 Aug 2020.

Vancouver:

Leung J. Data driven optimization in SAR ADC. [Internet] [Masters thesis]. Oregon State University; 2014. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/54631.

Council of Science Editors:

Leung J. Data driven optimization in SAR ADC. [Masters Thesis]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/54631


Oregon State University

6. Meng, Xin. Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays.

Degree: PhD, Electrical and Computer Engineering, 2015, Oregon State University

 Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization… (more)

Subjects/Keywords: ADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Meng, X. (2015). Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/55892

Chicago Manual of Style (16th Edition):

Meng, Xin. “Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays.” 2015. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/55892.

MLA Handbook (7th Edition):

Meng, Xin. “Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays.” 2015. Web. 03 Aug 2020.

Vancouver:

Meng X. Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays. [Internet] [Doctoral dissertation]. Oregon State University; 2015. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/55892.

Council of Science Editors:

Meng X. Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays. [Doctoral Dissertation]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/55892


Oregon State University

7. Wang, Tao. Low-power high-resolution delta-sigma ADC design techniques.

Degree: PhD, Electrical and Computer Engineering, 2012, Oregon State University

 This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to… (more)

Subjects/Keywords: ADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Wang, T. (2012). Low-power high-resolution delta-sigma ADC design techniques. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/29740

Chicago Manual of Style (16th Edition):

Wang, Tao. “Low-power high-resolution delta-sigma ADC design techniques.” 2012. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/29740.

MLA Handbook (7th Edition):

Wang, Tao. “Low-power high-resolution delta-sigma ADC design techniques.” 2012. Web. 03 Aug 2020.

Vancouver:

Wang T. Low-power high-resolution delta-sigma ADC design techniques. [Internet] [Doctoral dissertation]. Oregon State University; 2012. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/29740.

Council of Science Editors:

Wang T. Low-power high-resolution delta-sigma ADC design techniques. [Doctoral Dissertation]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/29740


Oregon State University

8. Kuo, Ming-Hung. Low-power high-linearity digital-to-analog converters.

Degree: MS, Electrical and Computer Engineering, 2012, Oregon State University

 In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB)… (more)

Subjects/Keywords: DAC; Digital-to-analog converters  – Design and construction

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APA (6th Edition):

Kuo, M. (2012). Low-power high-linearity digital-to-analog converters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/28313

Chicago Manual of Style (16th Edition):

Kuo, Ming-Hung. “Low-power high-linearity digital-to-analog converters.” 2012. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/28313.

MLA Handbook (7th Edition):

Kuo, Ming-Hung. “Low-power high-linearity digital-to-analog converters.” 2012. Web. 03 Aug 2020.

Vancouver:

Kuo M. Low-power high-linearity digital-to-analog converters. [Internet] [Masters thesis]. Oregon State University; 2012. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/28313.

Council of Science Editors:

Kuo M. Low-power high-linearity digital-to-analog converters. [Masters Thesis]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/28313


Oregon State University

9. Zhang, Yi. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.

Degree: PhD, Electrical and Computer Engineering, 2016, Oregon State University

 Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among… (more)

Subjects/Keywords: Incremental ADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Zhang, Y. (2016). Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/59929

Chicago Manual of Style (16th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/59929.

MLA Handbook (7th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Web. 03 Aug 2020.

Vancouver:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Internet] [Doctoral dissertation]. Oregon State University; 2016. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/59929.

Council of Science Editors:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Doctoral Dissertation]. Oregon State University; 2016. Available from: http://hdl.handle.net/1957/59929


Oregon State University

10. Gregoire, B. Robert. Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 This thesis presents methods to reduce the effects of finite opamp DC gain, output voltage swing limitations in opamps, and component mismatches. The primary contribution… (more)

Subjects/Keywords: Correlated Level Shifting; Pipelined ADCs  – Noise  – Mathematical models

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APA (6th Edition):

Gregoire, B. R. (2008). Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/9948

Chicago Manual of Style (16th Edition):

Gregoire, B Robert. “Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps.” 2008. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/9948.

MLA Handbook (7th Edition):

Gregoire, B Robert. “Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps.” 2008. Web. 03 Aug 2020.

Vancouver:

Gregoire BR. Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/9948.

Council of Science Editors:

Gregoire BR. Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/9948


Oregon State University

11. Yu, Wenhuan. Design techniques for low power ADCs.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the… (more)

Subjects/Keywords: data converter; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Yu, W. (2010). Design techniques for low power ADCs. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/14316

Chicago Manual of Style (16th Edition):

Yu, Wenhuan. “Design techniques for low power ADCs.” 2010. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/14316.

MLA Handbook (7th Edition):

Yu, Wenhuan. “Design techniques for low power ADCs.” 2010. Web. 03 Aug 2020.

Vancouver:

Yu W. Design techniques for low power ADCs. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/14316.

Council of Science Editors:

Yu W. Design techniques for low power ADCs. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/14316


Oregon State University

12. Maghari, Nima. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 Delta-sigma analog-to-digital converters (ADCs) are suitable for many applications due to several advantages such as relaxed anti-aliasing filter, high signal-to noise and distortion ratio (SNDR)… (more)

Subjects/Keywords: Analog Ciruits; Analog-to-digital converters

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APA (6th Edition):

Maghari, N. (2010). Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/18851

Chicago Manual of Style (16th Edition):

Maghari, Nima. “Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.” 2010. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/18851.

MLA Handbook (7th Edition):

Maghari, Nima. “Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.” 2010. Web. 03 Aug 2020.

Vancouver:

Maghari N. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/18851.

Council of Science Editors:

Maghari N. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/18851


Oregon State University

13. Mark, Shannon. Dual referencing guidelines to minimize power delivery noise coupling.

Degree: MS, Electrical and Computer Engineering, 2011, Oregon State University

 Dual referencing has been garnering a lot of attention in the power integrity community, specifically in the voltage mode driver application because it shows a… (more)

Subjects/Keywords: Dual Referencing

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APA (6th Edition):

Mark, S. (2011). Dual referencing guidelines to minimize power delivery noise coupling. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/21724

Chicago Manual of Style (16th Edition):

Mark, Shannon. “Dual referencing guidelines to minimize power delivery noise coupling.” 2011. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/21724.

MLA Handbook (7th Edition):

Mark, Shannon. “Dual referencing guidelines to minimize power delivery noise coupling.” 2011. Web. 03 Aug 2020.

Vancouver:

Mark S. Dual referencing guidelines to minimize power delivery noise coupling. [Internet] [Masters thesis]. Oregon State University; 2011. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/21724.

Council of Science Editors:

Mark S. Dual referencing guidelines to minimize power delivery noise coupling. [Masters Thesis]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/21724


Oregon State University

14. Gao, Xiaoran. A survey on continuous-time modulators : theory, designs and implementations.

Degree: MS, Electrical and Computer Engineering, 2008, Oregon State University

 Recently, delta-sigma modulation has become a widely applied technique for high-performance analog-to-digital conversion of narrow-band signals. Most of the early designs used discrete-time structure for… (more)

Subjects/Keywords: Delta-Sigma; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Gao, X. (2008). A survey on continuous-time modulators : theory, designs and implementations. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/8386

Chicago Manual of Style (16th Edition):

Gao, Xiaoran. “A survey on continuous-time modulators : theory, designs and implementations.” 2008. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/8386.

MLA Handbook (7th Edition):

Gao, Xiaoran. “A survey on continuous-time modulators : theory, designs and implementations.” 2008. Web. 03 Aug 2020.

Vancouver:

Gao X. A survey on continuous-time modulators : theory, designs and implementations. [Internet] [Masters thesis]. Oregon State University; 2008. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/8386.

Council of Science Editors:

Gao X. A survey on continuous-time modulators : theory, designs and implementations. [Masters Thesis]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/8386


Oregon State University

15. Gubbins, David Patrick. Continuous time input pipeline ADCs.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 Analog-to-digital converters (ADCs) convert analog continuous time signals into discrete time, digital format. One precondition that must be met for conventional nyquist rate ADCs is… (more)

Subjects/Keywords: analog; Pipelined ADCs  – Design and construction  – Mathematical models

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APA (6th Edition):

Gubbins, D. P. (2008). Continuous time input pipeline ADCs. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/10160

Chicago Manual of Style (16th Edition):

Gubbins, David Patrick. “Continuous time input pipeline ADCs.” 2008. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/10160.

MLA Handbook (7th Edition):

Gubbins, David Patrick. “Continuous time input pipeline ADCs.” 2008. Web. 03 Aug 2020.

Vancouver:

Gubbins DP. Continuous time input pipeline ADCs. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/10160.

Council of Science Editors:

Gubbins DP. Continuous time input pipeline ADCs. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/10160


Oregon State University

16. Elshazly, Amr. Performance enhancement techniques for low power digital phase locked loops.

Degree: PhD, Electrical and Computer Engineering, 2012, Oregon State University

 Desire for low-power, high performance computing has been at core of the symbiotic union between digital circuits and CMOS scaling. While digital circuit performance improves… (more)

Subjects/Keywords: Phase locked loops; Phase-locked loops

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APA (6th Edition):

Elshazly, A. (2012). Performance enhancement techniques for low power digital phase locked loops. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/31116

Chicago Manual of Style (16th Edition):

Elshazly, Amr. “Performance enhancement techniques for low power digital phase locked loops.” 2012. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/31116.

MLA Handbook (7th Edition):

Elshazly, Amr. “Performance enhancement techniques for low power digital phase locked loops.” 2012. Web. 03 Aug 2020.

Vancouver:

Elshazly A. Performance enhancement techniques for low power digital phase locked loops. [Internet] [Doctoral dissertation]. Oregon State University; 2012. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/31116.

Council of Science Editors:

Elshazly A. Performance enhancement techniques for low power digital phase locked loops. [Doctoral Dissertation]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/31116


Oregon State University

17. Ma, Chao. Energy-efficient clock generation for communication and computing systems using injection locking.

Degree: MS, Electrical and Computer Engineering, 2012, Oregon State University

 The design of high-performance, high-speed clock generation and distribution becomes challenging in terms of phase noise, jitter and power consumption, due to the fast development… (more)

Subjects/Keywords: Clock generation; Injection-locked ring oscillators; Integrated circuits

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APA (6th Edition):

Ma, C. (2012). Energy-efficient clock generation for communication and computing systems using injection locking. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/33929

Chicago Manual of Style (16th Edition):

Ma, Chao. “Energy-efficient clock generation for communication and computing systems using injection locking.” 2012. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/33929.

MLA Handbook (7th Edition):

Ma, Chao. “Energy-efficient clock generation for communication and computing systems using injection locking.” 2012. Web. 03 Aug 2020.

Vancouver:

Ma C. Energy-efficient clock generation for communication and computing systems using injection locking. [Internet] [Masters thesis]. Oregon State University; 2012. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/33929.

Council of Science Editors:

Ma C. Energy-efficient clock generation for communication and computing systems using injection locking. [Masters Thesis]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/33929


Oregon State University

18. Nishida, Yoshio. Improved design techniques for analog and mixed circuits.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 Although the digital revolution can realize many of past analog components in the digital forms, our world is surrounded with analog signals such as voice,… (more)

Subjects/Keywords: analog; Analog-to-digital converters  – Design

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APA (6th Edition):

Nishida, Y. (2008). Improved design techniques for analog and mixed circuits. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/7985

Chicago Manual of Style (16th Edition):

Nishida, Yoshio. “Improved design techniques for analog and mixed circuits.” 2008. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/7985.

MLA Handbook (7th Edition):

Nishida, Yoshio. “Improved design techniques for analog and mixed circuits.” 2008. Web. 03 Aug 2020.

Vancouver:

Nishida Y. Improved design techniques for analog and mixed circuits. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/7985.

Council of Science Editors:

Nishida Y. Improved design techniques for analog and mixed circuits. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/7985


Oregon State University

19. Chen, Chia-Hung. Micropower incremental analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended… (more)

Subjects/Keywords: IADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Chen, C. (2013). Micropower incremental analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/44655

Chicago Manual of Style (16th Edition):

Chen, Chia-Hung. “Micropower incremental analog-to-digital converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/44655.

MLA Handbook (7th Edition):

Chen, Chia-Hung. “Micropower incremental analog-to-digital converters.” 2013. Web. 03 Aug 2020.

Vancouver:

Chen C. Micropower incremental analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/44655.

Council of Science Editors:

Chen C. Micropower incremental analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/44655


Oregon State University

20. Wang, Yan. Design techniques for wideband low-power Delta-Sigma analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of… (more)

Subjects/Keywords: wideband; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Wang, Y. (2009). Design techniques for wideband low-power Delta-Sigma analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/13664

Chicago Manual of Style (16th Edition):

Wang, Yan. “Design techniques for wideband low-power Delta-Sigma analog-to-digital converters.” 2009. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/13664.

MLA Handbook (7th Edition):

Wang, Yan. “Design techniques for wideband low-power Delta-Sigma analog-to-digital converters.” 2009. Web. 03 Aug 2020.

Vancouver:

Wang Y. Design techniques for wideband low-power Delta-Sigma analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/13664.

Council of Science Editors:

Wang Y. Design techniques for wideband low-power Delta-Sigma analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/13664


Oregon State University

21. Kesharwani, Divya. A comparative study between sinusoidal and squarewave clocking for alleviating the jitter limitation in multi-gigaHertz ADCs.

Degree: MS, Electrical and Computer Engineering, 2010, Oregon State University

 Abstract: Various applications like wireless UWB communication, fast data acquisition systems and digital storage oscilloscopes needs ADCs with instantaneous input signal bandwidth from 0.1-40 GigaHertz… (more)

Subjects/Keywords: sine wave, square wave, jitter; Electronic noise

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APA (6th Edition):

Kesharwani, D. (2010). A comparative study between sinusoidal and squarewave clocking for alleviating the jitter limitation in multi-gigaHertz ADCs. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/15299

Chicago Manual of Style (16th Edition):

Kesharwani, Divya. “A comparative study between sinusoidal and squarewave clocking for alleviating the jitter limitation in multi-gigaHertz ADCs.” 2010. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/15299.

MLA Handbook (7th Edition):

Kesharwani, Divya. “A comparative study between sinusoidal and squarewave clocking for alleviating the jitter limitation in multi-gigaHertz ADCs.” 2010. Web. 03 Aug 2020.

Vancouver:

Kesharwani D. A comparative study between sinusoidal and squarewave clocking for alleviating the jitter limitation in multi-gigaHertz ADCs. [Internet] [Masters thesis]. Oregon State University; 2010. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/15299.

Council of Science Editors:

Kesharwani D. A comparative study between sinusoidal and squarewave clocking for alleviating the jitter limitation in multi-gigaHertz ADCs. [Masters Thesis]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/15299


Oregon State University

22. Shen, Weilun. Low-power double-sampled delta-sigma modulator for broadband applications.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 High speed and high resolution analog-to-digital converter is a key building block for broadband wireless communications, high definition video applications, medical images and so on.… (more)

Subjects/Keywords: Analog-to-Digital Converter; Modulators (Electronics)

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APA (6th Edition):

Shen, W. (2010). Low-power double-sampled delta-sigma modulator for broadband applications. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/17568

Chicago Manual of Style (16th Edition):

Shen, Weilun. “Low-power double-sampled delta-sigma modulator for broadband applications.” 2010. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/17568.

MLA Handbook (7th Edition):

Shen, Weilun. “Low-power double-sampled delta-sigma modulator for broadband applications.” 2010. Web. 03 Aug 2020.

Vancouver:

Shen W. Low-power double-sampled delta-sigma modulator for broadband applications. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/17568.

Council of Science Editors:

Shen W. Low-power double-sampled delta-sigma modulator for broadband applications. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/17568


Oregon State University

23. Rajaee, Omid. Design of low OSR, high precision analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 Advances in electronic systems have lead to the demand for high resolution, high bandwidth Analog-to-Digital Converters (ADCs). Oversampled ADCs are well- known for high accuracy… (more)

Subjects/Keywords: Oversampled ADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Rajaee, O. (2010). Design of low OSR, high precision analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/19654

Chicago Manual of Style (16th Edition):

Rajaee, Omid. “Design of low OSR, high precision analog-to-digital converters.” 2010. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/19654.

MLA Handbook (7th Edition):

Rajaee, Omid. “Design of low OSR, high precision analog-to-digital converters.” 2010. Web. 03 Aug 2020.

Vancouver:

Rajaee O. Design of low OSR, high precision analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/19654.

Council of Science Editors:

Rajaee O. Design of low OSR, high precision analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/19654


Oregon State University

24. Chae, Jeong Seok. Novel structures for high-speed delta-sigma data converters.

Degree: PhD, Electrical and Computer Engineering, 2011, Oregon State University

 As CMOS processes keep scaling down devices, the maximum operating frequencies of CMOS devices increase, and hence circuits can process very wide band signals. Moreover,… (more)

Subjects/Keywords: Analog-to-digital converter; Modulators (Electronics)

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APA (6th Edition):

Chae, J. S. (2011). Novel structures for high-speed delta-sigma data converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/19813

Chicago Manual of Style (16th Edition):

Chae, Jeong Seok. “Novel structures for high-speed delta-sigma data converters.” 2011. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/19813.

MLA Handbook (7th Edition):

Chae, Jeong Seok. “Novel structures for high-speed delta-sigma data converters.” 2011. Web. 03 Aug 2020.

Vancouver:

Chae JS. Novel structures for high-speed delta-sigma data converters. [Internet] [Doctoral dissertation]. Oregon State University; 2011. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/19813.

Council of Science Editors:

Chae JS. Novel structures for high-speed delta-sigma data converters. [Doctoral Dissertation]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/19813


Oregon State University

25. Tong, Tao. Design techniques for successive approximation register analog-to-digital converters.

Degree: MS, Electrical and Computer Engineering, 2011, Oregon State University

 Successive approximation register analog-to-digital converters (SAR ADCs) have been widely used for medium-speed, medium-resolution applications due to their excellent power efficiency and digital compatibility. Recently,… (more)

Subjects/Keywords: analog-to-digital converters

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APA (6th Edition):

Tong, T. (2011). Design techniques for successive approximation register analog-to-digital converters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/22662

Chicago Manual of Style (16th Edition):

Tong, Tao. “Design techniques for successive approximation register analog-to-digital converters.” 2011. Masters Thesis, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/22662.

MLA Handbook (7th Edition):

Tong, Tao. “Design techniques for successive approximation register analog-to-digital converters.” 2011. Web. 03 Aug 2020.

Vancouver:

Tong T. Design techniques for successive approximation register analog-to-digital converters. [Internet] [Masters thesis]. Oregon State University; 2011. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/22662.

Council of Science Editors:

Tong T. Design techniques for successive approximation register analog-to-digital converters. [Masters Thesis]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/22662


Oregon State University

26. Zanbaghi, Ramin. Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2011, Oregon State University

 There is a significant need in recent mobile communication and wireless broadband systems for high-performance analog-to-digital converters (ADCs) that have wide bandwidth (BW>5-MHz) and high… (more)

Subjects/Keywords: delta-sigma modulator; Analog-to-digital converters

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APA (6th Edition):

Zanbaghi, R. (2011). Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/23456

Chicago Manual of Style (16th Edition):

Zanbaghi, Ramin. “Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters.” 2011. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/23456.

MLA Handbook (7th Edition):

Zanbaghi, Ramin. “Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters.” 2011. Web. 03 Aug 2020.

Vancouver:

Zanbaghi R. Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2011. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/23456.

Council of Science Editors:

Zanbaghi R. Wide-bandwidth, high-resolution delta-sigma analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/23456


Oregon State University

27. Oh, Taehwan. Power efficient analog-to-digital converters using both voltage and time domain information.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs… (more)

Subjects/Keywords: Delta-sigma; Analog-to-digital converters

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APA (6th Edition):

Oh, T. (2013). Power efficient analog-to-digital converters using both voltage and time domain information. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/39042

Chicago Manual of Style (16th Edition):

Oh, Taehwan. “Power efficient analog-to-digital converters using both voltage and time domain information.” 2013. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/39042.

MLA Handbook (7th Edition):

Oh, Taehwan. “Power efficient analog-to-digital converters using both voltage and time domain information.” 2013. Web. 03 Aug 2020.

Vancouver:

Oh T. Power efficient analog-to-digital converters using both voltage and time domain information. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/39042.

Council of Science Editors:

Oh T. Power efficient analog-to-digital converters using both voltage and time domain information. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/39042

28. Lee, Sang Hyeon. High efficiency wideband low-power delta-sigma modulators.

Degree: PhD, Electrical and Computer Engineering, 2012, Oregon State University

 Delta-sigma analog-to-digital converters traditionally have been used for low speed, high resolution applications such as measurements, sensors, voice and audio systems. Through continued device scaling… (more)

Subjects/Keywords: delta sigma; Modulators (Electronics)

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APA (6th Edition):

Lee, S. H. (2012). High efficiency wideband low-power delta-sigma modulators. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/30022

Chicago Manual of Style (16th Edition):

Lee, Sang Hyeon. “High efficiency wideband low-power delta-sigma modulators.” 2012. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/30022.

MLA Handbook (7th Edition):

Lee, Sang Hyeon. “High efficiency wideband low-power delta-sigma modulators.” 2012. Web. 03 Aug 2020.

Vancouver:

Lee SH. High efficiency wideband low-power delta-sigma modulators. [Internet] [Doctoral dissertation]. Oregon State University; 2012. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/30022.

Council of Science Editors:

Lee SH. High efficiency wideband low-power delta-sigma modulators. [Doctoral Dissertation]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/30022

29. Crop, Joseph A. Methods to improve the reliability and resiliency of near/sub-threshold digital circuits.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 Energy consumption is one of the primary bottlenecks to both large and small scale modern compute platforms. Reducing the operating voltage of digital circuits to… (more)

Subjects/Keywords: Electrical Engineer; Low voltage integrated circuits  – Reliability

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APA (6th Edition):

Crop, J. A. (2014). Methods to improve the reliability and resiliency of near/sub-threshold digital circuits. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/48935

Chicago Manual of Style (16th Edition):

Crop, Joseph A. “Methods to improve the reliability and resiliency of near/sub-threshold digital circuits.” 2014. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/48935.

MLA Handbook (7th Edition):

Crop, Joseph A. “Methods to improve the reliability and resiliency of near/sub-threshold digital circuits.” 2014. Web. 03 Aug 2020.

Vancouver:

Crop JA. Methods to improve the reliability and resiliency of near/sub-threshold digital circuits. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/48935.

Council of Science Editors:

Crop JA. Methods to improve the reliability and resiliency of near/sub-threshold digital circuits. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/48935

30. Li, Wei. Low-power successive approximation analog to digital converter with digital calibration.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies… (more)

Subjects/Keywords: ADC; Successive approximation analog-to-digital converters  – Calibration

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APA (6th Edition):

Li, W. (2014). Low-power successive approximation analog to digital converter with digital calibration. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/46788

Chicago Manual of Style (16th Edition):

Li, Wei. “Low-power successive approximation analog to digital converter with digital calibration.” 2014. Doctoral Dissertation, Oregon State University. Accessed August 03, 2020. http://hdl.handle.net/1957/46788.

MLA Handbook (7th Edition):

Li, Wei. “Low-power successive approximation analog to digital converter with digital calibration.” 2014. Web. 03 Aug 2020.

Vancouver:

Li W. Low-power successive approximation analog to digital converter with digital calibration. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2020 Aug 03]. Available from: http://hdl.handle.net/1957/46788.

Council of Science Editors:

Li W. Low-power successive approximation analog to digital converter with digital calibration. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/46788

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