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You searched for +publisher:"Oregon State University" +contributor:("Moon, Un-Ku"). Showing records 1 – 30 of 81 total matches.

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1. Coker, Brandilyn. Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters.

Degree: MS, Electrical & Computer Engineering, 2015, Oregon State University

 Analog to digital converters (ADCs) are a critical part of communication between the physical world and the increasingly digital systems humans use every day. ADCs… (more)

Subjects/Keywords: nonlinearity; Analog-to-digital converters  – Calibration

…the blind calibration algorithm for nonlinearity in ADCs developed at Oregon State… …University. Chapter 4 explores the limitations of the algorithm, both those inherent in the… 

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APA (6th Edition):

Coker, B. (2015). Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/55408

Chicago Manual of Style (16th Edition):

Coker, Brandilyn. “Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters.” 2015. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/55408.

MLA Handbook (7th Edition):

Coker, Brandilyn. “Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters.” 2015. Web. 13 Apr 2021.

Vancouver:

Coker B. Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters. [Internet] [Masters thesis]. Oregon State University; 2015. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/55408.

Council of Science Editors:

Coker B. Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters. [Masters Thesis]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/55408


Oregon State University

2. Zhang, Yi. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.

Degree: PhD, Electrical and Computer Engineering, 2016, Oregon State University

 Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among… (more)

Subjects/Keywords: Incremental ADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Zhang, Y. (2016). Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/59929

Chicago Manual of Style (16th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/59929.

MLA Handbook (7th Edition):

Zhang, Yi. “Power Efficient Architectures for High Accuracy Analog-to-Digital Converters.” 2016. Web. 13 Apr 2021.

Vancouver:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Internet] [Doctoral dissertation]. Oregon State University; 2016. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/59929.

Council of Science Editors:

Zhang Y. Power Efficient Architectures for High Accuracy Analog-to-Digital Converters. [Doctoral Dissertation]. Oregon State University; 2016. Available from: http://hdl.handle.net/1957/59929


Oregon State University

3. Gregoire, B. Robert. Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 This thesis presents methods to reduce the effects of finite opamp DC gain, output voltage swing limitations in opamps, and component mismatches. The primary contribution… (more)

Subjects/Keywords: Correlated Level Shifting; Pipelined ADCs  – Noise  – Mathematical models

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APA (6th Edition):

Gregoire, B. R. (2008). Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/9948

Chicago Manual of Style (16th Edition):

Gregoire, B Robert. “Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps.” 2008. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/9948.

MLA Handbook (7th Edition):

Gregoire, B Robert. “Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps.” 2008. Web. 13 Apr 2021.

Vancouver:

Gregoire BR. Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/9948.

Council of Science Editors:

Gregoire BR. Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/9948


Oregon State University

4. Kwon, Sunwoo, 1974-. A multi-bit hybrid DSM over full-scale range without feedback DEM.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best… (more)

Subjects/Keywords: Delta-Sigma; Modulators (Electronics)  – Design  – Mathematical models

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APA (6th Edition):

Kwon, Sunwoo, 1. (2009). A multi-bit hybrid DSM over full-scale range without feedback DEM. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/11295

Chicago Manual of Style (16th Edition):

Kwon, Sunwoo, 1974-. “A multi-bit hybrid DSM over full-scale range without feedback DEM.” 2009. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/11295.

MLA Handbook (7th Edition):

Kwon, Sunwoo, 1974-. “A multi-bit hybrid DSM over full-scale range without feedback DEM.” 2009. Web. 13 Apr 2021.

Vancouver:

Kwon, Sunwoo 1. A multi-bit hybrid DSM over full-scale range without feedback DEM. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/11295.

Council of Science Editors:

Kwon, Sunwoo 1. A multi-bit hybrid DSM over full-scale range without feedback DEM. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/11295


Oregon State University

5. Bang, Sarvesh Jagdish. Design techniques for high efficiency LED drivers.

Degree: MS, Electrical and Computer Engineering, 2009, Oregon State University

 The increasing popularity of cellular phones with integrated cameras in the recent past has led to major improvements in its image quality. However, integration of… (more)

Subjects/Keywords: LED; Electric power  – Conservation

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APA (6th Edition):

Bang, S. J. (2009). Design techniques for high efficiency LED drivers. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/13071

Chicago Manual of Style (16th Edition):

Bang, Sarvesh Jagdish. “Design techniques for high efficiency LED drivers.” 2009. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/13071.

MLA Handbook (7th Edition):

Bang, Sarvesh Jagdish. “Design techniques for high efficiency LED drivers.” 2009. Web. 13 Apr 2021.

Vancouver:

Bang SJ. Design techniques for high efficiency LED drivers. [Internet] [Masters thesis]. Oregon State University; 2009. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/13071.

Council of Science Editors:

Bang SJ. Design techniques for high efficiency LED drivers. [Masters Thesis]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/13071


Oregon State University

6. Maghari, Nima. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 Delta-sigma analog-to-digital converters (ADCs) are suitable for many applications due to several advantages such as relaxed anti-aliasing filter, high signal-to noise and distortion ratio (SNDR)… (more)

Subjects/Keywords: Analog Ciruits; Analog-to-digital converters

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APA (6th Edition):

Maghari, N. (2010). Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/18851

Chicago Manual of Style (16th Edition):

Maghari, Nima. “Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.” 2010. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/18851.

MLA Handbook (7th Edition):

Maghari, Nima. “Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters.” 2010. Web. 13 Apr 2021.

Vancouver:

Maghari N. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/18851.

Council of Science Editors:

Maghari N. Architectural compensation techniques for analog inaccuracies in ΔΣ analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/18851


Oregon State University

7. Drost, Brian George. Time-based analog signal processing.

Degree: MS, Electrical and Computer Engineering, 2011, Oregon State University

 As CMOS processes size continues to shrink, a number of factors limit the ability of analog circuit performance to scale with the process. These issues… (more)

Subjects/Keywords: Analog Filter

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APA (6th Edition):

Drost, B. G. (2011). Time-based analog signal processing. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/21810

Chicago Manual of Style (16th Edition):

Drost, Brian George. “Time-based analog signal processing.” 2011. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/21810.

MLA Handbook (7th Edition):

Drost, Brian George. “Time-based analog signal processing.” 2011. Web. 13 Apr 2021.

Vancouver:

Drost BG. Time-based analog signal processing. [Internet] [Masters thesis]. Oregon State University; 2011. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/21810.

Council of Science Editors:

Drost BG. Time-based analog signal processing. [Masters Thesis]. Oregon State University; 2011. Available from: http://hdl.handle.net/1957/21810


Oregon State University

8. Gubbins, David Patrick. Continuous time input pipeline ADCs.

Degree: PhD, Electrical and Computer Engineering, 2008, Oregon State University

 Analog-to-digital converters (ADCs) convert analog continuous time signals into discrete time, digital format. One precondition that must be met for conventional nyquist rate ADCs is… (more)

Subjects/Keywords: analog; Pipelined ADCs  – Design and construction  – Mathematical models

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APA (6th Edition):

Gubbins, D. P. (2008). Continuous time input pipeline ADCs. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/10160

Chicago Manual of Style (16th Edition):

Gubbins, David Patrick. “Continuous time input pipeline ADCs.” 2008. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/10160.

MLA Handbook (7th Edition):

Gubbins, David Patrick. “Continuous time input pipeline ADCs.” 2008. Web. 13 Apr 2021.

Vancouver:

Gubbins DP. Continuous time input pipeline ADCs. [Internet] [Doctoral dissertation]. Oregon State University; 2008. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/10160.

Council of Science Editors:

Gubbins DP. Continuous time input pipeline ADCs. [Doctoral Dissertation]. Oregon State University; 2008. Available from: http://hdl.handle.net/1957/10160


Oregon State University

9. Lingam, Naga Sasidhar. Low power design techniques for high speed pipelined ADCs.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 Real world is analog but the processing of signals can best be done in digital domain. So the need for Analog to Digital Converters(ADCs) is… (more)

Subjects/Keywords: ADC; Pipelined ADCs  – Design and construction  – Mathematical models

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APA (6th Edition):

Lingam, N. S. (2009). Low power design techniques for high speed pipelined ADCs. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/10294

Chicago Manual of Style (16th Edition):

Lingam, Naga Sasidhar. “Low power design techniques for high speed pipelined ADCs.” 2009. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/10294.

MLA Handbook (7th Edition):

Lingam, Naga Sasidhar. “Low power design techniques for high speed pipelined ADCs.” 2009. Web. 13 Apr 2021.

Vancouver:

Lingam NS. Low power design techniques for high speed pipelined ADCs. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/10294.

Council of Science Editors:

Lingam NS. Low power design techniques for high speed pipelined ADCs. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/10294


Oregon State University

10. Ramachandran, Ashwin. A new data encoding scheme for equalization - Integrated Pulse Width Modulation (iPWM).

Degree: MS, 2017, Oregon State University

 This work presents a new data encoding scheme: Integrated Pulse Width Modulation (iPWM) for equalizing lossy wireline channels with the aim of achieving energy efficient… (more)

Subjects/Keywords: Transceiver

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APA (6th Edition):

Ramachandran, A. (2017). A new data encoding scheme for equalization - Integrated Pulse Width Modulation (iPWM). (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/61785

Chicago Manual of Style (16th Edition):

Ramachandran, Ashwin. “A new data encoding scheme for equalization - Integrated Pulse Width Modulation (iPWM).” 2017. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/61785.

MLA Handbook (7th Edition):

Ramachandran, Ashwin. “A new data encoding scheme for equalization - Integrated Pulse Width Modulation (iPWM).” 2017. Web. 13 Apr 2021.

Vancouver:

Ramachandran A. A new data encoding scheme for equalization - Integrated Pulse Width Modulation (iPWM). [Internet] [Masters thesis]. Oregon State University; 2017. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/61785.

Council of Science Editors:

Ramachandran A. A new data encoding scheme for equalization - Integrated Pulse Width Modulation (iPWM). [Masters Thesis]. Oregon State University; 2017. Available from: http://hdl.handle.net/1957/61785


Oregon State University

11. Li, Hao. Design Techniques of High-Speed Silicon Photonics Transceiver.

Degree: PhD, Electrical and Computer Engineering, 2016, Oregon State University

 The rapid scaling of network bandwidth and data center throughput has motivated the wide adoption of high speed transceivers. Silicon photonics (Si-Photonic) is one of… (more)

Subjects/Keywords: Silicon Photonics; Photonics  – Design and construction

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APA (6th Edition):

Li, H. (2016). Design Techniques of High-Speed Silicon Photonics Transceiver. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/59930

Chicago Manual of Style (16th Edition):

Li, Hao. “Design Techniques of High-Speed Silicon Photonics Transceiver.” 2016. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/59930.

MLA Handbook (7th Edition):

Li, Hao. “Design Techniques of High-Speed Silicon Photonics Transceiver.” 2016. Web. 13 Apr 2021.

Vancouver:

Li H. Design Techniques of High-Speed Silicon Photonics Transceiver. [Internet] [Doctoral dissertation]. Oregon State University; 2016. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/59930.

Council of Science Editors:

Li H. Design Techniques of High-Speed Silicon Photonics Transceiver. [Doctoral Dissertation]. Oregon State University; 2016. Available from: http://hdl.handle.net/1957/59930


Oregon State University

12. Rao, Sachin B. Linearizing techniques for voltage controlled oscillator based analog to digital converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Voltage controlled oscillator (VCO) based ADC is an important class of time-domain ADC that has gained widespread acceptance due to their several desirable properties. VCO-based… (more)

Subjects/Keywords: VCO-based ADC; Analog-to-digital converters

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APA (6th Edition):

Rao, S. B. (2013). Linearizing techniques for voltage controlled oscillator based analog to digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/38709

Chicago Manual of Style (16th Edition):

Rao, Sachin B. “Linearizing techniques for voltage controlled oscillator based analog to digital converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/38709.

MLA Handbook (7th Edition):

Rao, Sachin B. “Linearizing techniques for voltage controlled oscillator based analog to digital converters.” 2013. Web. 13 Apr 2021.

Vancouver:

Rao SB. Linearizing techniques for voltage controlled oscillator based analog to digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/38709.

Council of Science Editors:

Rao SB. Linearizing techniques for voltage controlled oscillator based analog to digital converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/38709


Oregon State University

13. Gande, Manideep. Design techniques for time based data converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data… (more)

Subjects/Keywords: Time based data converters; Analog-to-digital converters

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APA (6th Edition):

Gande, M. (2013). Design techniques for time based data converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/39773

Chicago Manual of Style (16th Edition):

Gande, Manideep. “Design techniques for time based data converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/39773.

MLA Handbook (7th Edition):

Gande, Manideep. “Design techniques for time based data converters.” 2013. Web. 13 Apr 2021.

Vancouver:

Gande M. Design techniques for time based data converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/39773.

Council of Science Editors:

Gande M. Design techniques for time based data converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/39773


Oregon State University

14. Jung, Youngho. Wideband and high accuracy delta sigma modulation data converter.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 Nowadays, needs for wideband and high accuracy analog-to-digital converter are increasing rapidly in manifold applications such as wireless communication, digital video and other consumer electronics.… (more)

Subjects/Keywords: ΔΣ modulator; Modulators (Electronics)

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APA (6th Edition):

Jung, Y. (2014). Wideband and high accuracy delta sigma modulation data converter. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/51836

Chicago Manual of Style (16th Edition):

Jung, Youngho. “Wideband and high accuracy delta sigma modulation data converter.” 2014. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/51836.

MLA Handbook (7th Edition):

Jung, Youngho. “Wideband and high accuracy delta sigma modulation data converter.” 2014. Web. 13 Apr 2021.

Vancouver:

Jung Y. Wideband and high accuracy delta sigma modulation data converter. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/51836.

Council of Science Editors:

Jung Y. Wideband and high accuracy delta sigma modulation data converter. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/51836


Oregon State University

15. Hu, Yue. Efficient use of time information in analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information… (more)

Subjects/Keywords: Analog-to-digital converters

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APA (6th Edition):

Hu, Y. (2014). Efficient use of time information in analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/52553

Chicago Manual of Style (16th Edition):

Hu, Yue. “Efficient use of time information in analog-to-digital converters.” 2014. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/52553.

MLA Handbook (7th Edition):

Hu, Yue. “Efficient use of time information in analog-to-digital converters.” 2014. Web. 13 Apr 2021.

Vancouver:

Hu Y. Efficient use of time information in analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/52553.

Council of Science Editors:

Hu Y. Efficient use of time information in analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/52553


Oregon State University

16. Leung, Jerry. Data driven optimization in SAR ADC.

Degree: MS, Electrical and Computer Engineering, 2014, Oregon State University

 Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques… (more)

Subjects/Keywords: SAR; Successive approximation analog-to-digital converters

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APA (6th Edition):

Leung, J. (2014). Data driven optimization in SAR ADC. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/54631

Chicago Manual of Style (16th Edition):

Leung, Jerry. “Data driven optimization in SAR ADC.” 2014. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/54631.

MLA Handbook (7th Edition):

Leung, Jerry. “Data driven optimization in SAR ADC.” 2014. Web. 13 Apr 2021.

Vancouver:

Leung J. Data driven optimization in SAR ADC. [Internet] [Masters thesis]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/54631.

Council of Science Editors:

Leung J. Data driven optimization in SAR ADC. [Masters Thesis]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/54631


Oregon State University

17. Farahbakhshian, Farshad. Dynamic biasing for ring amplification.

Degree: MS, Electrical and Computer Engineering, 2014, Oregon State University

 New amplifier architectures are presented using non-traditional methods of biasing. Time-based dynamic biasing and signal-based dynamic biasing are discussed in the context of new architectures.… (more)

Subjects/Keywords: ring amplifier; Amplifiers (Electronics)

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APA (6th Edition):

Farahbakhshian, F. (2014). Dynamic biasing for ring amplification. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/54635

Chicago Manual of Style (16th Edition):

Farahbakhshian, Farshad. “Dynamic biasing for ring amplification.” 2014. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/54635.

MLA Handbook (7th Edition):

Farahbakhshian, Farshad. “Dynamic biasing for ring amplification.” 2014. Web. 13 Apr 2021.

Vancouver:

Farahbakhshian F. Dynamic biasing for ring amplification. [Internet] [Masters thesis]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/54635.

Council of Science Editors:

Farahbakhshian F. Dynamic biasing for ring amplification. [Masters Thesis]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/54635


Oregon State University

18. Waters, Allen. Automated verilog-to-layout synthesis of ADCs using custom analog cells.

Degree: PhD, Electrical and Computer Engineering, 2015, Oregon State University

 A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools… (more)

Subjects/Keywords: Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Waters, A. (2015). Automated verilog-to-layout synthesis of ADCs using custom analog cells. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/55310

Chicago Manual of Style (16th Edition):

Waters, Allen. “Automated verilog-to-layout synthesis of ADCs using custom analog cells.” 2015. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/55310.

MLA Handbook (7th Edition):

Waters, Allen. “Automated verilog-to-layout synthesis of ADCs using custom analog cells.” 2015. Web. 13 Apr 2021.

Vancouver:

Waters A. Automated verilog-to-layout synthesis of ADCs using custom analog cells. [Internet] [Doctoral dissertation]. Oregon State University; 2015. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/55310.

Council of Science Editors:

Waters A. Automated verilog-to-layout synthesis of ADCs using custom analog cells. [Doctoral Dissertation]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/55310


Oregon State University

19. Wang, Yunqi. High-Resolution mm-wave Digitally Controlled Oscillator in CMOS.

Degree: MS, Electrical and Computer Engineering, 2015, Oregon State University

 All-digital PLLs promise exible and precise frequency modulation continous-wave(FMCW) radar signal signal for 77GHz radar applications. Such PLLs require digitally-controlled oscillators(DCO) with wide frequency tuning… (more)

Subjects/Keywords: digitally-controlled oscillator; Oscillators, Electric

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APA (6th Edition):

Wang, Y. (2015). High-Resolution mm-wave Digitally Controlled Oscillator in CMOS. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/57951

Chicago Manual of Style (16th Edition):

Wang, Yunqi. “High-Resolution mm-wave Digitally Controlled Oscillator in CMOS.” 2015. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/57951.

MLA Handbook (7th Edition):

Wang, Yunqi. “High-Resolution mm-wave Digitally Controlled Oscillator in CMOS.” 2015. Web. 13 Apr 2021.

Vancouver:

Wang Y. High-Resolution mm-wave Digitally Controlled Oscillator in CMOS. [Internet] [Masters thesis]. Oregon State University; 2015. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/57951.

Council of Science Editors:

Wang Y. High-Resolution mm-wave Digitally Controlled Oscillator in CMOS. [Masters Thesis]. Oregon State University; 2015. Available from: http://hdl.handle.net/1957/57951


Oregon State University

20. Garg, Robin. Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS.

Degree: MS, Electrical and Computer Engineering, 2016, Oregon State University

 This work presents the design and implementation of a low power phased-array receiver frontend at 28 GHz in 65 nm CMOS. The frontend incorporates a… (more)

Subjects/Keywords: Phased-array Receivers; Phased array antennas

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APA (6th Edition):

Garg, R. (2016). Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/59208

Chicago Manual of Style (16th Edition):

Garg, Robin. “Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS.” 2016. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/59208.

MLA Handbook (7th Edition):

Garg, Robin. “Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS.” 2016. Web. 13 Apr 2021.

Vancouver:

Garg R. Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS. [Internet] [Masters thesis]. Oregon State University; 2016. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/59208.

Council of Science Editors:

Garg R. Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS. [Masters Thesis]. Oregon State University; 2016. Available from: http://hdl.handle.net/1957/59208


Oregon State University

21. Khan, Qadeer Ahmad. Digitally assisted control techniques for high performance switching DC-DC converters.

Degree: PhD, Electrical and Computer Engineering, 2012, Oregon State University

 Digitally controlled switching DC-DC converters have recently emerged as an attractive alternative to conventional switching converters based on analog control techniques. This research focuses on… (more)

Subjects/Keywords: voltage regulator; DC-to-DC converters  – Automatic control

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APA (6th Edition):

Khan, Q. A. (2012). Digitally assisted control techniques for high performance switching DC-DC converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/30174

Chicago Manual of Style (16th Edition):

Khan, Qadeer Ahmad. “Digitally assisted control techniques for high performance switching DC-DC converters.” 2012. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/30174.

MLA Handbook (7th Edition):

Khan, Qadeer Ahmad. “Digitally assisted control techniques for high performance switching DC-DC converters.” 2012. Web. 13 Apr 2021.

Vancouver:

Khan QA. Digitally assisted control techniques for high performance switching DC-DC converters. [Internet] [Doctoral dissertation]. Oregon State University; 2012. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/30174.

Council of Science Editors:

Khan QA. Digitally assisted control techniques for high performance switching DC-DC converters. [Doctoral Dissertation]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/30174


Oregon State University

22. Kuo, Ming-Hung. Low-power high-linearity digital-to-analog converters.

Degree: MS, Electrical and Computer Engineering, 2012, Oregon State University

 In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB)… (more)

Subjects/Keywords: DAC; Digital-to-analog converters  – Design and construction

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APA (6th Edition):

Kuo, M. (2012). Low-power high-linearity digital-to-analog converters. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/28313

Chicago Manual of Style (16th Edition):

Kuo, Ming-Hung. “Low-power high-linearity digital-to-analog converters.” 2012. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/28313.

MLA Handbook (7th Edition):

Kuo, Ming-Hung. “Low-power high-linearity digital-to-analog converters.” 2012. Web. 13 Apr 2021.

Vancouver:

Kuo M. Low-power high-linearity digital-to-analog converters. [Internet] [Masters thesis]. Oregon State University; 2012. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/28313.

Council of Science Editors:

Kuo M. Low-power high-linearity digital-to-analog converters. [Masters Thesis]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/28313


Oregon State University

23. Bai, Rui. Design techniques for low-power electrical and optical serial link receivers.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 As computation power continues to grow, the demand for data transfer bandwidth is also rising. This is reflected in the increasing data-rate of high-speed links.… (more)

Subjects/Keywords: serial-link; Serial communications

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APA (6th Edition):

Bai, R. (2014). Design techniques for low-power electrical and optical serial link receivers. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/49094

Chicago Manual of Style (16th Edition):

Bai, Rui. “Design techniques for low-power electrical and optical serial link receivers.” 2014. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/49094.

MLA Handbook (7th Edition):

Bai, Rui. “Design techniques for low-power electrical and optical serial link receivers.” 2014. Web. 13 Apr 2021.

Vancouver:

Bai R. Design techniques for low-power electrical and optical serial link receivers. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/49094.

Council of Science Editors:

Bai R. Design techniques for low-power electrical and optical serial link receivers. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/49094


Oregon State University

24. Guerber, Jon. Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters.

Degree: PhD, Electrical and Computer Engineering, 2012, Oregon State University

 In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and… (more)

Subjects/Keywords: SAR ADC; Analog-to-digital converters

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APA (6th Edition):

Guerber, J. (2012). Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/36019

Chicago Manual of Style (16th Edition):

Guerber, Jon. “Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters.” 2012. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/36019.

MLA Handbook (7th Edition):

Guerber, Jon. “Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters.” 2012. Web. 13 Apr 2021.

Vancouver:

Guerber J. Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2012. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/36019.

Council of Science Editors:

Guerber J. Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters. [Doctoral Dissertation]. Oregon State University; 2012. Available from: http://hdl.handle.net/1957/36019


Oregon State University

25. Cheng, Jiao. Analysis and design on low-power short-range radios for wireless body area networks.

Degree: PhD, Electrical and Computer Engineering, 2014, Oregon State University

 The release of the IEEE802.15.6 standard has led to increased interest in low-power technologies for wireless body-area-networks (WBANs). The power dissipation, supply voltage, and die… (more)

Subjects/Keywords: Receiver; Body area networks (Electronics)

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APA (6th Edition):

Cheng, J. (2014). Analysis and design on low-power short-range radios for wireless body area networks. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/48942

Chicago Manual of Style (16th Edition):

Cheng, Jiao. “Analysis and design on low-power short-range radios for wireless body area networks.” 2014. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/48942.

MLA Handbook (7th Edition):

Cheng, Jiao. “Analysis and design on low-power short-range radios for wireless body area networks.” 2014. Web. 13 Apr 2021.

Vancouver:

Cheng J. Analysis and design on low-power short-range radios for wireless body area networks. [Internet] [Doctoral dissertation]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/48942.

Council of Science Editors:

Cheng J. Analysis and design on low-power short-range radios for wireless body area networks. [Doctoral Dissertation]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/48942


Oregon State University

26. Chen, Chia-Hung. Micropower incremental analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2013, Oregon State University

 Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended… (more)

Subjects/Keywords: IADC; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Chen, C. (2013). Micropower incremental analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/44655

Chicago Manual of Style (16th Edition):

Chen, Chia-Hung. “Micropower incremental analog-to-digital converters.” 2013. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/44655.

MLA Handbook (7th Edition):

Chen, Chia-Hung. “Micropower incremental analog-to-digital converters.” 2013. Web. 13 Apr 2021.

Vancouver:

Chen C. Micropower incremental analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2013. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/44655.

Council of Science Editors:

Chen C. Micropower incremental analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2013. Available from: http://hdl.handle.net/1957/44655


Oregon State University

27. Prabha, Praveen. Design techniques for VCO based digital sensor readout circuits.

Degree: MS, Electrical and Computer Engineering, 2014, Oregon State University

 Sensors find a variety of applications in portable electronics, automotive and biomedical solutions. The demand for low power and high dynamic range makes the design… (more)

Subjects/Keywords: VCO based ADC; Voltage-controlled oscillators

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APA (6th Edition):

Prabha, P. (2014). Design techniques for VCO based digital sensor readout circuits. (Masters Thesis). Oregon State University. Retrieved from http://hdl.handle.net/1957/46796

Chicago Manual of Style (16th Edition):

Prabha, Praveen. “Design techniques for VCO based digital sensor readout circuits.” 2014. Masters Thesis, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/46796.

MLA Handbook (7th Edition):

Prabha, Praveen. “Design techniques for VCO based digital sensor readout circuits.” 2014. Web. 13 Apr 2021.

Vancouver:

Prabha P. Design techniques for VCO based digital sensor readout circuits. [Internet] [Masters thesis]. Oregon State University; 2014. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/46796.

Council of Science Editors:

Prabha P. Design techniques for VCO based digital sensor readout circuits. [Masters Thesis]. Oregon State University; 2014. Available from: http://hdl.handle.net/1957/46796


Oregon State University

28. Wang, Yan. Design techniques for wideband low-power Delta-Sigma analog-to-digital converters.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of… (more)

Subjects/Keywords: wideband; Analog-to-digital converters  – Design and construction

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APA (6th Edition):

Wang, Y. (2009). Design techniques for wideband low-power Delta-Sigma analog-to-digital converters. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/13664

Chicago Manual of Style (16th Edition):

Wang, Yan. “Design techniques for wideband low-power Delta-Sigma analog-to-digital converters.” 2009. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/13664.

MLA Handbook (7th Edition):

Wang, Yan. “Design techniques for wideband low-power Delta-Sigma analog-to-digital converters.” 2009. Web. 13 Apr 2021.

Vancouver:

Wang Y. Design techniques for wideband low-power Delta-Sigma analog-to-digital converters. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/13664.

Council of Science Editors:

Wang Y. Design techniques for wideband low-power Delta-Sigma analog-to-digital converters. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/13664


Oregon State University

29. Kurahashi, Peter. Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits.

Degree: PhD, Electrical and Computer Engineering, 2009, Oregon State University

 A duty-cycle controlled switched resistor is a tunable resistive element that uses pulse width modulation as the method of tuning. This thesis will describe the… (more)

Subjects/Keywords: Switching circuits  – Mathematical models

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APA (6th Edition):

Kurahashi, P. (2009). Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/13784

Chicago Manual of Style (16th Edition):

Kurahashi, Peter. “Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits.” 2009. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/13784.

MLA Handbook (7th Edition):

Kurahashi, Peter. “Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits.” 2009. Web. 13 Apr 2021.

Vancouver:

Kurahashi P. Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits. [Internet] [Doctoral dissertation]. Oregon State University; 2009. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/13784.

Council of Science Editors:

Kurahashi P. Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits. [Doctoral Dissertation]. Oregon State University; 2009. Available from: http://hdl.handle.net/1957/13784


Oregon State University

30. Shen, Weilun. Low-power double-sampled delta-sigma modulator for broadband applications.

Degree: PhD, Electrical and Computer Engineering, 2010, Oregon State University

 High speed and high resolution analog-to-digital converter is a key building block for broadband wireless communications, high definition video applications, medical images and so on.… (more)

Subjects/Keywords: Analog-to-Digital Converter; Modulators (Electronics)

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APA (6th Edition):

Shen, W. (2010). Low-power double-sampled delta-sigma modulator for broadband applications. (Doctoral Dissertation). Oregon State University. Retrieved from http://hdl.handle.net/1957/17568

Chicago Manual of Style (16th Edition):

Shen, Weilun. “Low-power double-sampled delta-sigma modulator for broadband applications.” 2010. Doctoral Dissertation, Oregon State University. Accessed April 13, 2021. http://hdl.handle.net/1957/17568.

MLA Handbook (7th Edition):

Shen, Weilun. “Low-power double-sampled delta-sigma modulator for broadband applications.” 2010. Web. 13 Apr 2021.

Vancouver:

Shen W. Low-power double-sampled delta-sigma modulator for broadband applications. [Internet] [Doctoral dissertation]. Oregon State University; 2010. [cited 2021 Apr 13]. Available from: http://hdl.handle.net/1957/17568.

Council of Science Editors:

Shen W. Low-power double-sampled delta-sigma modulator for broadband applications. [Doctoral Dissertation]. Oregon State University; 2010. Available from: http://hdl.handle.net/1957/17568

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