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You searched for +publisher:"NSYSU" +contributor:("Yao-Tsung Tsai"). Showing records 1 – 29 of 29 total matches.

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NSYSU

1. Tsai, Ying-chieh. Investigate Short-Channel Effects and Thermal Behavior of a Novel Pseudo Tri-Gate Vertical Ultrathin MOSFETs with Source/Drain Tie.

Degree: Master, Electrical Engineering, 2009, NSYSU

 This paper investigates the device behavior of a novel pseudo tri-gate ultrathin channel vertical MOSFET with source/drain tie (S/D tie), the PTG-SDT VMOS. The S/D… (more)

Subjects/Keywords: thermal stability; short channel effect; vertical MOSFET; self-heating effect

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsai, Y. (2009). Investigate Short-Channel Effects and Thermal Behavior of a Novel Pseudo Tri-Gate Vertical Ultrathin MOSFETs with Source/Drain Tie. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723109-003834

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tsai, Ying-chieh. “Investigate Short-Channel Effects and Thermal Behavior of a Novel Pseudo Tri-Gate Vertical Ultrathin MOSFETs with Source/Drain Tie.” 2009. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723109-003834.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tsai, Ying-chieh. “Investigate Short-Channel Effects and Thermal Behavior of a Novel Pseudo Tri-Gate Vertical Ultrathin MOSFETs with Source/Drain Tie.” 2009. Web. 28 Nov 2020.

Vancouver:

Tsai Y. Investigate Short-Channel Effects and Thermal Behavior of a Novel Pseudo Tri-Gate Vertical Ultrathin MOSFETs with Source/Drain Tie. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723109-003834.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tsai Y. Investigate Short-Channel Effects and Thermal Behavior of a Novel Pseudo Tri-Gate Vertical Ultrathin MOSFETs with Source/Drain Tie. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0723109-003834

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

2. Kang, Shiang-Shi. A Novel Self-aligned TFT with Source/Drain tie and Discontinuous Block Oxide Layer for Suppressing Self-heating Effect and Floating Body Effect.

Degree: Master, Electrical Engineering, 2009, NSYSU

 In this paper, we propose a novel thin film MOSFET with source/drain tie and discontinuously block oxide layers. Improving process is very important, when the… (more)

Subjects/Keywords: self-heating effect; SOI; Floating body effect

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APA (6th Edition):

Kang, S. (2009). A Novel Self-aligned TFT with Source/Drain tie and Discontinuous Block Oxide Layer for Suppressing Self-heating Effect and Floating Body Effect. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0810109-154308

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kang, Shiang-Shi. “A Novel Self-aligned TFT with Source/Drain tie and Discontinuous Block Oxide Layer for Suppressing Self-heating Effect and Floating Body Effect.” 2009. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0810109-154308.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kang, Shiang-Shi. “A Novel Self-aligned TFT with Source/Drain tie and Discontinuous Block Oxide Layer for Suppressing Self-heating Effect and Floating Body Effect.” 2009. Web. 28 Nov 2020.

Vancouver:

Kang S. A Novel Self-aligned TFT with Source/Drain tie and Discontinuous Block Oxide Layer for Suppressing Self-heating Effect and Floating Body Effect. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0810109-154308.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kang S. A Novel Self-aligned TFT with Source/Drain tie and Discontinuous Block Oxide Layer for Suppressing Self-heating Effect and Floating Body Effect. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0810109-154308

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Hsu, Shih-wen. A Study of Self-Aligned SONOS-type Nonvolatile Memory with Internal Block Oxide.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this thesis, we have proposed the self-aligned SONOS-type nonvolatile memory with internal block oxide (SAIBO-SONOS NVM). We use the dry etching method to bury… (more)

Subjects/Keywords: Fowler-Nordheim; NVM; SONOS; retention time; memory window

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APA (6th Edition):

Hsu, S. (2013). A Study of Self-Aligned SONOS-type Nonvolatile Memory with Internal Block Oxide. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001727

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Shih-wen. “A Study of Self-Aligned SONOS-type Nonvolatile Memory with Internal Block Oxide.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001727.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Shih-wen. “A Study of Self-Aligned SONOS-type Nonvolatile Memory with Internal Block Oxide.” 2013. Web. 28 Nov 2020.

Vancouver:

Hsu S. A Study of Self-Aligned SONOS-type Nonvolatile Memory with Internal Block Oxide. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001727.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu S. A Study of Self-Aligned SONOS-type Nonvolatile Memory with Internal Block Oxide. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001727

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Chang, Wan-Rou. Optimized Design of Novel Silicon Thin Film Solar Cells.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this work, combining the advantages of amorphous silicon and microcrystalline silicon, we propose a new structure of solar cell â ITO / p-a-Si:H /… (more)

Subjects/Keywords: Conversion Efficiency; Microcrystalline Silicon; Amorphous Silicon; Single Junction; Thin Film Solar Cell

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APA (6th Edition):

Chang, W. (2013). Optimized Design of Novel Silicon Thin Film Solar Cells. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629113-133204

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Wan-Rou. “Optimized Design of Novel Silicon Thin Film Solar Cells.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629113-133204.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Wan-Rou. “Optimized Design of Novel Silicon Thin Film Solar Cells.” 2013. Web. 28 Nov 2020.

Vancouver:

Chang W. Optimized Design of Novel Silicon Thin Film Solar Cells. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629113-133204.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang W. Optimized Design of Novel Silicon Thin Film Solar Cells. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0629113-133204

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

5. Chen, Yun-ru. A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this paper, we propose a novel triple-gate middle partial insulator (TGMPI) with current bridge structure for capacitorless one transistor dynamic random access memory (1T-DRAM)… (more)

Subjects/Keywords: Middle Partial Insulation; 1T-DRAM; Data Retention Time; Triple-gate MOSFET; Current Bridge

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, Y. (2013). A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001346

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yun-ru. “A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001346.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yun-ru. “A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge.” 2013. Web. 28 Nov 2020.

Vancouver:

Chen Y. A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001346.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630113-001346

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

6. Chen, Kuan-yu. A High Speed and Low Cost Non-Classical CMOS with Elevated Body and Double-Embedded Oxide.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this thesis, we propose a high speed and low cost non-classical CMOS with elevated body and double-embedded oxide (EBDEO). This unipolar CMOS is composed… (more)

Subjects/Keywords: share-terminal output; propagation delay time; inversion current; Unipolar CMOS; EBDEO; figure of merit; punch through current

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APA (6th Edition):

Chen, K. (2013). A High Speed and Low Cost Non-Classical CMOS with Elevated Body and Double-Embedded Oxide. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-141333

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Kuan-yu. “A High Speed and Low Cost Non-Classical CMOS with Elevated Body and Double-Embedded Oxide.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-141333.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Kuan-yu. “A High Speed and Low Cost Non-Classical CMOS with Elevated Body and Double-Embedded Oxide.” 2013. Web. 28 Nov 2020.

Vancouver:

Chen K. A High Speed and Low Cost Non-Classical CMOS with Elevated Body and Double-Embedded Oxide. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-141333.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen K. A High Speed and Low Cost Non-Classical CMOS with Elevated Body and Double-Embedded Oxide. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-141333

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

7. Tsai, Chen-Chi. Study of Non-Classical CMOSs by Using Junctionless and Punch-Through Technology.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this thesis, we propose four types non-classical CMOS inverters which the load use junctionless and punch-through technology. These inverters all use traditional NMOS as… (more)

Subjects/Keywords: low power consumption; 3D fold up; junctionless PMOS; gate P+-I-P+ transistor; two embedded oxide punch-through transistor; gate P-P-P+ transistor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsai, C. (2013). Study of Non-Classical CMOSs by Using Junctionless and Punch-Through Technology. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-145004

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tsai, Chen-Chi. “Study of Non-Classical CMOSs by Using Junctionless and Punch-Through Technology.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-145004.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tsai, Chen-Chi. “Study of Non-Classical CMOSs by Using Junctionless and Punch-Through Technology.” 2013. Web. 28 Nov 2020.

Vancouver:

Tsai C. Study of Non-Classical CMOSs by Using Junctionless and Punch-Through Technology. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-145004.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tsai C. Study of Non-Classical CMOSs by Using Junctionless and Punch-Through Technology. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-145004

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

8. Syu, Shu-huan. Study of Vertical MOSFET with Embedded Oxide.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this thesis, we propose a junction vertical MOSFET with embedded oxide (EO JVFET) and an junctionless vertical MOSFET with embedded oxide (EO JLVFET). We… (more)

Subjects/Keywords: Unity Gain Frequency; Junctionless; Embedded Oxide; Vertical MOSFET; Short Channel Behavior

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Syu, S. (2013). Study of Vertical MOSFET with Embedded Oxide. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-144753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Syu, Shu-huan. “Study of Vertical MOSFET with Embedded Oxide.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-144753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Syu, Shu-huan. “Study of Vertical MOSFET with Embedded Oxide.” 2013. Web. 28 Nov 2020.

Vancouver:

Syu S. Study of Vertical MOSFET with Embedded Oxide. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-144753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Syu S. Study of Vertical MOSFET with Embedded Oxide. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0705113-144753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

9. Lu, You-ren. Study of a Novel High-Integration Vertical TFT-CMOS Technology.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this thesis, we present a novel CMOS inverter with simple process and high integration density. The novel CMOS inverter exploit vertical transistor can improve… (more)

Subjects/Keywords: packing density; vertical structure; buried oxide; propagation delay time; source overlap

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lu, Y. (2013). Study of a Novel High-Integration Vertical TFT-CMOS Technology. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-135814

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lu, You-ren. “Study of a Novel High-Integration Vertical TFT-CMOS Technology.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-135814.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lu, You-ren. “Study of a Novel High-Integration Vertical TFT-CMOS Technology.” 2013. Web. 28 Nov 2020.

Vancouver:

Lu Y. Study of a Novel High-Integration Vertical TFT-CMOS Technology. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-135814.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lu Y. Study of a Novel High-Integration Vertical TFT-CMOS Technology. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-135814

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

10. Wang, Jian-yuan. A Cd-free and ZnS based CIGS Solar Cell with a Wide-Bandgap InGaP Secondary Layer.

Degree: Master, Electrical Engineering, 2013, NSYSU

 In this thesis, we propose two solar cell structures. One is the Cd-free and ZnS based CIGS solar cell with a wide-bandgap InGaP secondary layer,… (more)

Subjects/Keywords: ZnS; InGaP; Back-to-Back parallel; Secondary Layer; CIGS

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wang, J. (2013). A Cd-free and ZnS based CIGS Solar Cell with a Wide-Bandgap InGaP Secondary Layer. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-102028

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Jian-yuan. “A Cd-free and ZnS based CIGS Solar Cell with a Wide-Bandgap InGaP Secondary Layer.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-102028.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Jian-yuan. “A Cd-free and ZnS based CIGS Solar Cell with a Wide-Bandgap InGaP Secondary Layer.” 2013. Web. 28 Nov 2020.

Vancouver:

Wang J. A Cd-free and ZnS based CIGS Solar Cell with a Wide-Bandgap InGaP Secondary Layer. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-102028.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang J. A Cd-free and ZnS based CIGS Solar Cell with a Wide-Bandgap InGaP Secondary Layer. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-102028

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

11. Huang, Hsueh-liang. Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter.

Degree: Master, Electrical Engineering, 2013, NSYSU

 The research discusses a novel CTFET inverter which is composed of a N-typed TFET(NTFET) as a driven transistor and a Gated control I-I-P transistor as… (more)

Subjects/Keywords: Gated control; SOI (Silicon on Insulator); TFET; Low power; High packing density; CTFET

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, H. (2013). Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709113-092337

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Hsueh-liang. “Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter.” 2013. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709113-092337.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Hsueh-liang. “Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter.” 2013. Web. 28 Nov 2020.

Vancouver:

Huang H. Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709113-092337.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang H. Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709113-092337

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

12. Chuang, Nai-chuan. The Study of the Electrical Properties of the Ni-Cr Thin Film Resistor.

Degree: PhD, Electrical Engineering, 2016, NSYSU

 With the demand of electronic devices increasing for information and telecommunication technologies, the passive component with high precision and high reliability properties have become more… (more)

Subjects/Keywords: conduction mechanism; magnetron sputtering; Thin film resistor; NiCr film; Temperature coefficient of resistance

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APA (6th Edition):

Chuang, N. (2016). The Study of the Electrical Properties of the Ni-Cr Thin Film Resistor. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803116-144845

Chicago Manual of Style (16th Edition):

Chuang, Nai-chuan. “The Study of the Electrical Properties of the Ni-Cr Thin Film Resistor.” 2016. Doctoral Dissertation, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803116-144845.

MLA Handbook (7th Edition):

Chuang, Nai-chuan. “The Study of the Electrical Properties of the Ni-Cr Thin Film Resistor.” 2016. Web. 28 Nov 2020.

Vancouver:

Chuang N. The Study of the Electrical Properties of the Ni-Cr Thin Film Resistor. [Internet] [Doctoral dissertation]. NSYSU; 2016. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803116-144845.

Council of Science Editors:

Chuang N. The Study of the Electrical Properties of the Ni-Cr Thin Film Resistor. [Doctoral Dissertation]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803116-144845


NSYSU

13. Huang, Kuo-Dong. Fabrication and Characterization of Polycrystalline Silicon Thin Film Transistor with Novel Buried-Oxide Structure.

Degree: PhD, Electrical Engineering, 2008, NSYSU

 This thesis is mainly proposed and discussed the characteristics of polycrystalline silicon thin film transistor putting forward and probing into four kinds of novel buried-oxide… (more)

Subjects/Keywords: self-heating effect; trenched body; floating-body effect; drain induced barrier lowing

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APA (6th Edition):

Huang, K. (2008). Fabrication and Characterization of Polycrystalline Silicon Thin Film Transistor with Novel Buried-Oxide Structure. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704108-121717

Chicago Manual of Style (16th Edition):

Huang, Kuo-Dong. “Fabrication and Characterization of Polycrystalline Silicon Thin Film Transistor with Novel Buried-Oxide Structure.” 2008. Doctoral Dissertation, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704108-121717.

MLA Handbook (7th Edition):

Huang, Kuo-Dong. “Fabrication and Characterization of Polycrystalline Silicon Thin Film Transistor with Novel Buried-Oxide Structure.” 2008. Web. 28 Nov 2020.

Vancouver:

Huang K. Fabrication and Characterization of Polycrystalline Silicon Thin Film Transistor with Novel Buried-Oxide Structure. [Internet] [Doctoral dissertation]. NSYSU; 2008. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704108-121717.

Council of Science Editors:

Huang K. Fabrication and Characterization of Polycrystalline Silicon Thin Film Transistor with Novel Buried-Oxide Structure. [Doctoral Dissertation]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704108-121717


NSYSU

14. Eng, Yi-Chuen. A Study of Additional-Body Effects in Isolation-Last Quasi-SOI MOSFETs.

Degree: PhD, Electrical Engineering, 2012, NSYSU

 As semiconductor device sizes continue to decrease, the traditional bulk CMOS technology is seen as an obstacle itself by the physical device limitations. One of… (more)

Subjects/Keywords: ZBO; ABEs; isolation-last; QSOI MOSFETs; BO

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APA (6th Edition):

Eng, Y. (2012). A Study of Additional-Body Effects in Isolation-Last Quasi-SOI MOSFETs. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-105314

Chicago Manual of Style (16th Edition):

Eng, Yi-Chuen. “A Study of Additional-Body Effects in Isolation-Last Quasi-SOI MOSFETs.” 2012. Doctoral Dissertation, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-105314.

MLA Handbook (7th Edition):

Eng, Yi-Chuen. “A Study of Additional-Body Effects in Isolation-Last Quasi-SOI MOSFETs.” 2012. Web. 28 Nov 2020.

Vancouver:

Eng Y. A Study of Additional-Body Effects in Isolation-Last Quasi-SOI MOSFETs. [Internet] [Doctoral dissertation]. NSYSU; 2012. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-105314.

Council of Science Editors:

Eng Y. A Study of Additional-Body Effects in Isolation-Last Quasi-SOI MOSFETs. [Doctoral Dissertation]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-105314


NSYSU

15. Tseng, Run-June. Circuit simulator program development of semiconductor physical and electrical behavior.

Degree: Master, Electrical Engineering, 2001, NSYSU

 ABSTRACT This thesis presents the equivalent circuit of basic semicondonductor equations, which are implemented as the device elements of circuit simulator: spice3. We use a… (more)

Subjects/Keywords: circuit simulator

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APA (6th Edition):

Tseng, R. (2001). Circuit simulator program development of semiconductor physical and electrical behavior. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tseng, Run-June. “Circuit simulator program development of semiconductor physical and electrical behavior.” 2001. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tseng, Run-June. “Circuit simulator program development of semiconductor physical and electrical behavior.” 2001. Web. 28 Nov 2020.

Vancouver:

Tseng R. Circuit simulator program development of semiconductor physical and electrical behavior. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tseng R. Circuit simulator program development of semiconductor physical and electrical behavior. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

16. Kuo, Huan-Chou. Three improved operational amplifiers with low power low voltage.

Degree: Master, Electrical Engineering, 2001, NSYSU

 Three improved operational amplifiers with low voltage and rail-to-rail constant are proposed. Two of the amplifiers are modified from the amplifier with a level shifting… (more)

Subjects/Keywords: low power low voltage; CMOS operational amplifier; rail-to-rail

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APA (6th Edition):

Kuo, H. (2001). Three improved operational amplifiers with low power low voltage. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kuo, Huan-Chou. “Three improved operational amplifiers with low power low voltage.” 2001. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kuo, Huan-Chou. “Three improved operational amplifiers with low power low voltage.” 2001. Web. 28 Nov 2020.

Vancouver:

Kuo H. Three improved operational amplifiers with low power low voltage. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kuo H. Three improved operational amplifiers with low power low voltage. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

17. Chien, Yu. CMOS High-Q IF Active Bandpass Filter and Oscillator Design.

Degree: Master, Electrical Engineering, 2001, NSYSU

 A novel CMOS tunable bandpass filter and a novel voltage controlled oscillator are proposed. Both circuits are designed using the UMC 0.5μm CMOS process parameters.… (more)

Subjects/Keywords: CMOS; Oscillator; High-Q; Bandpass Filter

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APA (6th Edition):

Chien, Y. (2001). CMOS High-Q IF Active Bandpass Filter and Oscillator Design. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chien, Yu. “CMOS High-Q IF Active Bandpass Filter and Oscillator Design.” 2001. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chien, Yu. “CMOS High-Q IF Active Bandpass Filter and Oscillator Design.” 2001. Web. 28 Nov 2020.

Vancouver:

Chien Y. CMOS High-Q IF Active Bandpass Filter and Oscillator Design. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chien Y. CMOS High-Q IF Active Bandpass Filter and Oscillator Design. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

18. Chen, Pain-Chin. High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology.

Degree: Master, Electrical Engineering, 2003, NSYSU

 In our thesis, we develop a modified fabrication method based on Ge condensation mechanism to fabricate SGOI (SiGe-on-insulator) Wafer. The advantages of this technique are… (more)

Subjects/Keywords: SGOI; Ge condensation

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APA (6th Edition):

Chen, P. (2003). High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Pain-Chin. “High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology.” 2003. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Pain-Chin. “High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology.” 2003. Web. 28 Nov 2020.

Vancouver:

Chen P. High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology. [Internet] [Thesis]. NSYSU; 2003. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen P. High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology. [Thesis]. NSYSU; 2003. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

19. Chuang, Yao-Jen. A Class D Power Amplifier with Passive RC Feedback.

Degree: Master, Electrical Engineering, 2005, NSYSU

 The primary advantage of Class D amplifier is high power efficiency (typically >90%). However, there are two problems in open-loop Class D design: Total Harmonic… (more)

Subjects/Keywords: total harmonic distortion; power efficiency; class d; thd; power amplifier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chuang, Y. (2005). A Class D Power Amplifier with Passive RC Feedback. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822105-020221

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chuang, Yao-Jen. “A Class D Power Amplifier with Passive RC Feedback.” 2005. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822105-020221.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chuang, Yao-Jen. “A Class D Power Amplifier with Passive RC Feedback.” 2005. Web. 28 Nov 2020.

Vancouver:

Chuang Y. A Class D Power Amplifier with Passive RC Feedback. [Internet] [Thesis]. NSYSU; 2005. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822105-020221.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chuang Y. A Class D Power Amplifier with Passive RC Feedback. [Thesis]. NSYSU; 2005. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822105-020221

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

20. Tzuhsuan, Peng. A Low Jitter High Linearity Voltage Controlled Oscillator.

Degree: Master, Electrical Engineering, 2004, NSYSU

 Phase locked loops (PLL) are used in many applications. Application examples include clock and data recovery, clock synthesis, frequency synthesis, modulator, and de-modulator. In many… (more)

Subjects/Keywords: High linearity; Low jitter; VCO; Regulator

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APA (6th Edition):

Tzuhsuan, P. (2004). A Low Jitter High Linearity Voltage Controlled Oscillator. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715104-141351

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tzuhsuan, Peng. “A Low Jitter High Linearity Voltage Controlled Oscillator.” 2004. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715104-141351.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tzuhsuan, Peng. “A Low Jitter High Linearity Voltage Controlled Oscillator.” 2004. Web. 28 Nov 2020.

Vancouver:

Tzuhsuan P. A Low Jitter High Linearity Voltage Controlled Oscillator. [Internet] [Thesis]. NSYSU; 2004. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715104-141351.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tzuhsuan P. A Low Jitter High Linearity Voltage Controlled Oscillator. [Thesis]. NSYSU; 2004. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715104-141351

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

21. Yan, Zhi-Qing. Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET.

Degree: Master, Electrical Engineering, 2000, NSYSU

 In this thesisï¹ As-grown and H-treated polycrystalline diamond film Metal-Insulator-Semiconductor Field-Effect-Transistor on the p-type surface semiconductive layers of undoped hydrogen-terminated CVD diamond films were successfully… (more)

Subjects/Keywords: hydrogen-terminated; surface conductive layers; MISFET

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APA (6th Edition):

Yan, Z. (2000). Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yan, Zhi-Qing. “Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET.” 2000. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yan, Zhi-Qing. “Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET.” 2000. Web. 28 Nov 2020.

Vancouver:

Yan Z. Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yan Z. Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

22. Chen, Wei-Shiun. Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory.

Degree: Master, Electrical Engineering, 2000, NSYSU

 Abstract Four high-performance circuits design techniques for embedded DRAM are proposed. First, a negative voltage generator having high efficiency is proposed to provide the negative… (more)

Subjects/Keywords: wordline driver; reduced clock-swing driver; embedded dram; read bus amplifier

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APA (6th Edition):

Chen, W. (2000). Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Wei-Shiun. “Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory.” 2000. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Wei-Shiun. “Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory.” 2000. Web. 28 Nov 2020.

Vancouver:

Chen W. Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen W. Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

23. Chang-Chan, Sun-Yu. Two Novel Switched Current Circuits.

Degree: Master, Electrical Engineering, 2000, NSYSU

 Two novel clock feedthrough compensation circuits for switched - current (SI) memory cells are proposed to reduce the clock feedthrough error. One is a current… (more)

Subjects/Keywords: sample and hold; switched current

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APA (6th Edition):

Chang-Chan, S. (2000). Two Novel Switched Current Circuits. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang-Chan, Sun-Yu. “Two Novel Switched Current Circuits.” 2000. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang-Chan, Sun-Yu. “Two Novel Switched Current Circuits.” 2000. Web. 28 Nov 2020.

Vancouver:

Chang-Chan S. Two Novel Switched Current Circuits. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang-Chan S. Two Novel Switched Current Circuits. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

24. Wu, Yi-Ming. CMOS Current Controlled Conveyor and Tunable IF Filter Application.

Degree: Master, Electrical Engineering, 2000, NSYSU

 A second-generation CMOS current controlled conveyor (CCCII) and a tunable IF bandpass filter based on the CCCII are developed. The high frequency property and the… (more)

Subjects/Keywords: tunable; CMOS; current controlled conveyor; bandpass filter

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APA (6th Edition):

Wu, Y. (2000). CMOS Current Controlled Conveyor and Tunable IF Filter Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Yi-Ming. “CMOS Current Controlled Conveyor and Tunable IF Filter Application.” 2000. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Yi-Ming. “CMOS Current Controlled Conveyor and Tunable IF Filter Application.” 2000. Web. 28 Nov 2020.

Vancouver:

Wu Y. CMOS Current Controlled Conveyor and Tunable IF Filter Application. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu Y. CMOS Current Controlled Conveyor and Tunable IF Filter Application. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

25. Lee, Tung-I. A Novel Transimpedance Amplifier and Its Application Circuits.

Degree: Master, Electrical Engineering, 2002, NSYSU

 Abstract A simple negative transimpedance amplifier is proposed. Because of inherent low input and output impedance, the frequency response is higher than that of the… (more)

Subjects/Keywords: filter; transimpedance amplifier

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APA (6th Edition):

Lee, T. (2002). A Novel Transimpedance Amplifier and Its Application Circuits. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lee, Tung-I. “A Novel Transimpedance Amplifier and Its Application Circuits.” 2002. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lee, Tung-I. “A Novel Transimpedance Amplifier and Its Application Circuits.” 2002. Web. 28 Nov 2020.

Vancouver:

Lee T. A Novel Transimpedance Amplifier and Its Application Circuits. [Internet] [Thesis]. NSYSU; 2002. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lee T. A Novel Transimpedance Amplifier and Its Application Circuits. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

26. Wang, Chao-Ho. A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier.

Degree: Master, Electrical Engineering, 2002, NSYSU

 Abstract In this research, we intend to develop a sinusoidal VCO with low harmonic distortion. A new sinusoidal VCO is developed with only two OTAs.… (more)

Subjects/Keywords: Operational Transconductance Amplifier; Oscillator

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APA (6th Edition):

Wang, C. (2002). A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Chao-Ho. “A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier.” 2002. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Chao-Ho. “A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier.” 2002. Web. 28 Nov 2020.

Vancouver:

Wang C. A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier. [Internet] [Thesis]. NSYSU; 2002. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang C. A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

27. Chen, Yung-Tai. A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters.

Degree: Master, Electrical Engineering, 2002, NSYSU

 A novel on chip automatic tuning circuit for Gm â C continuous time filter is presented. The circuit is composed of an integrator, a frequency… (more)

Subjects/Keywords: tuning circuits; Continuous-time Gm-C filter; Q-factor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, Y. (2002). A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yung-Tai. “A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters.” 2002. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yung-Tai. “A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters.” 2002. Web. 28 Nov 2020.

Vancouver:

Chen Y. A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters. [Internet] [Thesis]. NSYSU; 2002. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

28. Lin, Shih-tsong. Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie.

Degree: Master, Electrical Engineering, 2006, NSYSU

 In this thesis, a bottom gate TFT with smart body tie device is realized, For a PDSOI devices, which usually uses large layout areas of… (more)

Subjects/Keywords: Bottom Gate; Self Heating Effect; Kink Effect; TFT

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, S. (2006). Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-103712

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Shih-tsong. “Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie.” 2006. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-103712.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Shih-tsong. “Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie.” 2006. Web. 28 Nov 2020.

Vancouver:

Lin S. Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie. [Internet] [Thesis]. NSYSU; 2006. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-103712.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin S. Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie. [Thesis]. NSYSU; 2006. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-103712

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

29. Wu, Chu-Lun. A novel Poly-Si TFT process method for overcoming Self-heating effect and Floating body effect.

Degree: Master, Electrical Engineering, 2006, NSYSU

 In this thesis, we present a new Poly - Si TFT process method to overcome Self - heating effect and Floating body effect. The main… (more)

Subjects/Keywords: floating body effect; Poly-Si TFT; self-heating effect

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wu, C. (2006). A novel Poly-Si TFT process method for overcoming Self-heating effect and Floating body effect. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-164424

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Chu-Lun. “A novel Poly-Si TFT process method for overcoming Self-heating effect and Floating body effect.” 2006. Thesis, NSYSU. Accessed November 28, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-164424.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Chu-Lun. “A novel Poly-Si TFT process method for overcoming Self-heating effect and Floating body effect.” 2006. Web. 28 Nov 2020.

Vancouver:

Wu C. A novel Poly-Si TFT process method for overcoming Self-heating effect and Floating body effect. [Internet] [Thesis]. NSYSU; 2006. [cited 2020 Nov 28]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-164424.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu C. A novel Poly-Si TFT process method for overcoming Self-heating effect and Floating body effect. [Thesis]. NSYSU; 2006. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731106-164424

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

.