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NSYSU
1. Hung, Tsz-En. A Memory-Cost-Aware Method to Reuse Imposter Billboards for Improving the Performance of Object Rendering on Tile-Based GPUs.
Degree: Master, Computer Science and Engineering, 2017, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0820117-170503
Subjects/Keywords: GPU; Tile based rendering; Billboard textures; GPU memory modeling
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Hung, T. (2017). A Memory-Cost-Aware Method to Reuse Imposter Billboards for Improving the Performance of Object Rendering on Tile-Based GPUs. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0820117-170503
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Hung, Tsz-En. “A Memory-Cost-Aware Method to Reuse Imposter Billboards for Improving the Performance of Object Rendering on Tile-Based GPUs.” 2017. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0820117-170503.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Hung, Tsz-En. “A Memory-Cost-Aware Method to Reuse Imposter Billboards for Improving the Performance of Object Rendering on Tile-Based GPUs.” 2017. Web. 07 Mar 2021.
Vancouver:
Hung T. A Memory-Cost-Aware Method to Reuse Imposter Billboards for Improving the Performance of Object Rendering on Tile-Based GPUs. [Internet] [Thesis]. NSYSU; 2017. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0820117-170503.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Hung T. A Memory-Cost-Aware Method to Reuse Imposter Billboards for Improving the Performance of Object Rendering on Tile-Based GPUs. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0820117-170503
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
2. Lee, Hsin-mau. Designs, Implementations and Applications of Floating-Point Trigonometric Function Units.
Degree: Master, Computer Science and Engineering, 2008, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-203251
Subjects/Keywords: Floating-point; CORDIC
Record Details
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APA (6th Edition):
Lee, H. (2008). Designs, Implementations and Applications of Floating-Point Trigonometric Function Units. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-203251
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lee, Hsin-mau. “Designs, Implementations and Applications of Floating-Point Trigonometric Function Units.” 2008. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-203251.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lee, Hsin-mau. “Designs, Implementations and Applications of Floating-Point Trigonometric Function Units.” 2008. Web. 07 Mar 2021.
Vancouver:
Lee H. Designs, Implementations and Applications of Floating-Point Trigonometric Function Units. [Internet] [Thesis]. NSYSU; 2008. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-203251.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lee H. Designs, Implementations and Applications of Floating-Point Trigonometric Function Units. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-203251
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
3. Lin, Wei-Sen. Design of Unified Arithmetic Units for 3D Graphics Vertex Shader.
Degree: Master, Computer Science and Engineering, 2008, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-114207
Subjects/Keywords: Vertex Shader; higher-order approximation; throughput of the matrix computation
Record Details
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APA (6th Edition):
Lin, W. (2008). Design of Unified Arithmetic Units for 3D Graphics Vertex Shader. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-114207
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lin, Wei-Sen. “Design of Unified Arithmetic Units for 3D Graphics Vertex Shader.” 2008. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-114207.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lin, Wei-Sen. “Design of Unified Arithmetic Units for 3D Graphics Vertex Shader.” 2008. Web. 07 Mar 2021.
Vancouver:
Lin W. Design of Unified Arithmetic Units for 3D Graphics Vertex Shader. [Internet] [Thesis]. NSYSU; 2008. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-114207.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lin W. Design of Unified Arithmetic Units for 3D Graphics Vertex Shader. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902108-114207
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
4. Liu, Yi-cheng. Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3ÃVDD Wide Range Mixed-Voltage-Tolerant I/O Cell.
Degree: Master, Electrical Engineering, 2009, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701109-205501
Subjects/Keywords: I/O cell; Mixed-Voltage-Tolerant; Dynamic Biasing; Sub 3ÃVDD
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Liu, Y. (2009). Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3ÃVDD Wide Range Mixed-Voltage-Tolerant I/O Cell. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701109-205501
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Liu, Yi-cheng. “Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3ÃVDD Wide Range Mixed-Voltage-Tolerant I/O Cell.” 2009. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701109-205501.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Liu, Yi-cheng. “Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3ÃVDD Wide Range Mixed-Voltage-Tolerant I/O Cell.” 2009. Web. 07 Mar 2021.
Vancouver:
Liu Y. Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3ÃVDD Wide Range Mixed-Voltage-Tolerant I/O Cell. [Internet] [Thesis]. NSYSU; 2009. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701109-205501.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Liu Y. Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3ÃVDD Wide Range Mixed-Voltage-Tolerant I/O Cell. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0701109-205501
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
5. Yen, Shao-Fu. A Charger Circuit of Li-ion Batteries and a Capacitor-less LDO for Wireless Biomedical Systems.
Degree: Master, Electrical Engineering, 2009, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706109-135451
Subjects/Keywords: regulator; capacitor-less; Li-ion; ldo; biomedical
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Yen, S. (2009). A Charger Circuit of Li-ion Batteries and a Capacitor-less LDO for Wireless Biomedical Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706109-135451
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Yen, Shao-Fu. “A Charger Circuit of Li-ion Batteries and a Capacitor-less LDO for Wireless Biomedical Systems.” 2009. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706109-135451.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Yen, Shao-Fu. “A Charger Circuit of Li-ion Batteries and a Capacitor-less LDO for Wireless Biomedical Systems.” 2009. Web. 07 Mar 2021.
Vancouver:
Yen S. A Charger Circuit of Li-ion Batteries and a Capacitor-less LDO for Wireless Biomedical Systems. [Internet] [Thesis]. NSYSU; 2009. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706109-135451.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Yen S. A Charger Circuit of Li-ion Batteries and a Capacitor-less LDO for Wireless Biomedical Systems. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706109-135451
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
6. Lai, Yu-ren. Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System.
Degree: Master, Electrical Engineering, 2009, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729109-173040
Subjects/Keywords: Dual-Core; Superscalar; Embedded System; Out-of-Order; Single-Issue
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Lai, Y. (2009). Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729109-173040
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lai, Yu-ren. “Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System.” 2009. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729109-173040.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lai, Yu-ren. “Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System.” 2009. Web. 07 Mar 2021.
Vancouver:
Lai Y. Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System. [Internet] [Thesis]. NSYSU; 2009. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729109-173040.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lai Y. Design of the Superscalar Dual-Core Architecture using Single-Issue Out-of-Order Instruction Pipe for Embedded System. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729109-173040
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
7. Wu, Zong-Lin. Low-Overhead Isolation Cells for Low-Power Multipliers.
Degree: Master, Computer Science and Engineering, 2009, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0730109-174550
Subjects/Keywords: low overhead isolation cell; standard cell; low-power multipliers
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Wu, Z. (2009). Low-Overhead Isolation Cells for Low-Power Multipliers. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0730109-174550
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wu, Zong-Lin. “Low-Overhead Isolation Cells for Low-Power Multipliers.” 2009. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0730109-174550.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wu, Zong-Lin. “Low-Overhead Isolation Cells for Low-Power Multipliers.” 2009. Web. 07 Mar 2021.
Vancouver:
Wu Z. Low-Overhead Isolation Cells for Low-Power Multipliers. [Internet] [Thesis]. NSYSU; 2009. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0730109-174550.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wu Z. Low-Overhead Isolation Cells for Low-Power Multipliers. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0730109-174550
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
8. Lin, Ching-Yuan. Performance Modeling for a 3D Graphics SoC.
Degree: Master, Computer Science and Engineering, 2009, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522
Subjects/Keywords: 3D Graphics; Tile-based; analysis; SystemC; TLM
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Lin, C. (2009). Performance Modeling for a 3D Graphics SoC. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lin, Ching-Yuan. “Performance Modeling for a 3D Graphics SoC.” 2009. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lin, Ching-Yuan. “Performance Modeling for a 3D Graphics SoC.” 2009. Web. 07 Mar 2021.
Vancouver:
Lin C. Performance Modeling for a 3D Graphics SoC. [Internet] [Thesis]. NSYSU; 2009. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lin C. Performance Modeling for a 3D Graphics SoC. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0907109-153522
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
9. Lin, Tzu-chun. Implementation of Action Recognition Algorithm on Multiple-Streaming Multimedia Unit.
Degree: Master, Electrical Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-142110
Subjects/Keywords: SIMD; Action Recognition; Embedded computer vision; MMX; Streaming Processing
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Lin, T. (2010). Implementation of Action Recognition Algorithm on Multiple-Streaming Multimedia Unit. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-142110
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lin, Tzu-chun. “Implementation of Action Recognition Algorithm on Multiple-Streaming Multimedia Unit.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-142110.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lin, Tzu-chun. “Implementation of Action Recognition Algorithm on Multiple-Streaming Multimedia Unit.” 2010. Web. 07 Mar 2021.
Vancouver:
Lin T. Implementation of Action Recognition Algorithm on Multiple-Streaming Multimedia Unit. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-142110.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lin T. Implementation of Action Recognition Algorithm on Multiple-Streaming Multimedia Unit. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-142110
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
10. Lei, Kin-fong. Design of an Asynchronous Ring Bus Architecture for Multi-Core Systems.
Degree: Master, Electrical Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0818110-131743
Subjects/Keywords: On-Chip Interconnect Networks; Asynchronous Ring Bus; Multi-Core Systems
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Lei, K. (2010). Design of an Asynchronous Ring Bus Architecture for Multi-Core Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0818110-131743
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lei, Kin-fong. “Design of an Asynchronous Ring Bus Architecture for Multi-Core Systems.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0818110-131743.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lei, Kin-fong. “Design of an Asynchronous Ring Bus Architecture for Multi-Core Systems.” 2010. Web. 07 Mar 2021.
Vancouver:
Lei K. Design of an Asynchronous Ring Bus Architecture for Multi-Core Systems. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0818110-131743.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lei K. Design of an Asynchronous Ring Bus Architecture for Multi-Core Systems. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0818110-131743
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
11. Lee, Cheng-Han. Design, Analysis and Applications of Hybrid CORDIC Processor Architectures.
Degree: Master, Computer Science and Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831110-160513
Subjects/Keywords: Arithmetic Function Units; CORDIC; Taylor-series expansion
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Lee, C. (2010). Design, Analysis and Applications of Hybrid CORDIC Processor Architectures. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831110-160513
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lee, Cheng-Han. “Design, Analysis and Applications of Hybrid CORDIC Processor Architectures.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831110-160513.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lee, Cheng-Han. “Design, Analysis and Applications of Hybrid CORDIC Processor Architectures.” 2010. Web. 07 Mar 2021.
Vancouver:
Lee C. Design, Analysis and Applications of Hybrid CORDIC Processor Architectures. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831110-160513.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lee C. Design, Analysis and Applications of Hybrid CORDIC Processor Architectures. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831110-160513
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
12. Tsai, Cheng-Hsuan. Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library.
Degree: Master, Computer Science and Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-152704
Subjects/Keywords: CMOS logic; Logic Synthesizer; Standard Cell Library; ASIC Design Flow; Pass-Transition-Logic(PTL)
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Tsai, C. (2010). Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-152704
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Tsai, Cheng-Hsuan. “Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-152704.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Tsai, Cheng-Hsuan. “Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library.” 2010. Web. 07 Mar 2021.
Vancouver:
Tsai C. Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-152704.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Tsai C. Design of Hybrid CMOS/Pass-Transistor-Logic Standard Cell Library. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-152704
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
13. Chiu, Chan-Feng. Design, Implementation, and Verification of a Programmable Low-Cost Vertex Shader Based on Logarithmic Number System.
Degree: Master, Computer Science and Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-170101
Subjects/Keywords: 3D Graph; Logarithmic Number System; Vertex Shader
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Chiu, C. (2010). Design, Implementation, and Verification of a Programmable Low-Cost Vertex Shader Based on Logarithmic Number System. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-170101
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Chiu, Chan-Feng. “Design, Implementation, and Verification of a Programmable Low-Cost Vertex Shader Based on Logarithmic Number System.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-170101.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Chiu, Chan-Feng. “Design, Implementation, and Verification of a Programmable Low-Cost Vertex Shader Based on Logarithmic Number System.” 2010. Web. 07 Mar 2021.
Vancouver:
Chiu C. Design, Implementation, and Verification of a Programmable Low-Cost Vertex Shader Based on Logarithmic Number System. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-170101.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Chiu C. Design, Implementation, and Verification of a Programmable Low-Cost Vertex Shader Based on Logarithmic Number System. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830110-170101
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
14. Chen, Li-Yao. Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader.
Degree: Master, Computer Science and Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943
Subjects/Keywords: Integration; SOC; Programmable; SIMD; Vertex Shader
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Chen, L. (2010). Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Chen, Li-Yao. “Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Chen, Li-Yao. “Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader.” 2010. Web. 07 Mar 2021.
Vancouver:
Chen L. Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Chen L. Software and Hardware Integration of a Programmable Floating- and Fixed-Point Vertex Shader. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0902110-213943
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
15. Wu, Yi-hong. A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems.
Degree: Master, Electrical Engineering, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114950
Subjects/Keywords: stimulation waveform generator; current-limiting; minimum off time one-shot circuit; PFM boost converter; SCS
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Wu, Y. (2013). A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114950
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wu, Yi-hong. “A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114950.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wu, Yi-hong. “A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems.” 2013. Web. 07 Mar 2021.
Vancouver:
Wu Y. A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114950.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wu Y. A 16-channel High-Voltage Stimulation Generator and A Pulse Frequency Modulation Boost Converter for Spinal Cord Stimulation Systems. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114950
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
16. Chen, Sih-Yu. Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit.
Degree: Master, Electrical Engineering, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220
Subjects/Keywords: single-ended; leakage current sensor; power-delay product; load-less; disturb-free; leakage current compensation circuit
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Chen, S. (2013). Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Chen, Sih-Yu. “Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Chen, Sih-Yu. “Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit.” 2013. Web. 07 Mar 2021.
Vancouver:
Chen S. Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Chen S. Single-ended Disturb-free 5T Load-less 4Kb SRAM with Leakage Current Sensor and Compensation Circuit. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0610113-114220
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
17. Wu, Po-han. Table Size Reduction and Optimization in Multiplierless Table-Based Function Evaluation Designs.
Degree: Master, Computer Science and Engineering, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-083045
Subjects/Keywords: compress-tree; error-analysis; look-up-table-and-add; multiplier-less function evaluation method; elementary function evaluation method
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Wu, P. (2013). Table Size Reduction and Optimization in Multiplierless Table-Based Function Evaluation Designs. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-083045
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wu, Po-han. “Table Size Reduction and Optimization in Multiplierless Table-Based Function Evaluation Designs.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-083045.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wu, Po-han. “Table Size Reduction and Optimization in Multiplierless Table-Based Function Evaluation Designs.” 2013. Web. 07 Mar 2021.
Vancouver:
Wu P. Table Size Reduction and Optimization in Multiplierless Table-Based Function Evaluation Designs. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-083045.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wu P. Table Size Reduction and Optimization in Multiplierless Table-Based Function Evaluation Designs. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0631113-083045
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
18. Huang, Jun-ming. Hardware Design of Disparity Estimation Using Belief Propagation.
Degree: Master, Computer Science and Engineering, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727113-103923
Subjects/Keywords: Markov random field; belief propagation; disparity computation; depth map; stereo matching; stereo vision
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Huang, J. (2013). Hardware Design of Disparity Estimation Using Belief Propagation. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727113-103923
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Huang, Jun-ming. “Hardware Design of Disparity Estimation Using Belief Propagation.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727113-103923.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Huang, Jun-ming. “Hardware Design of Disparity Estimation Using Belief Propagation.” 2013. Web. 07 Mar 2021.
Vancouver:
Huang J. Hardware Design of Disparity Estimation Using Belief Propagation. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727113-103923.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Huang J. Hardware Design of Disparity Estimation Using Belief Propagation. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727113-103923
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
19. Huang, Chih-Hong. Hardware Design of Multi-view 3D Stereo Synthesizers Based on Two Image Sequences.
Degree: Master, Computer Science and Engineering, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726113-151411
Subjects/Keywords: stereo matching; hole filling; image warping; disparity estimation; depth-image-based rendering (DIBR); multiview virtual images
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Huang, C. (2013). Hardware Design of Multi-view 3D Stereo Synthesizers Based on Two Image Sequences. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726113-151411
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Huang, Chih-Hong. “Hardware Design of Multi-view 3D Stereo Synthesizers Based on Two Image Sequences.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726113-151411.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Huang, Chih-Hong. “Hardware Design of Multi-view 3D Stereo Synthesizers Based on Two Image Sequences.” 2013. Web. 07 Mar 2021.
Vancouver:
Huang C. Hardware Design of Multi-view 3D Stereo Synthesizers Based on Two Image Sequences. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726113-151411.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Huang C. Hardware Design of Multi-view 3D Stereo Synthesizers Based on Two Image Sequences. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726113-151411
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
20. Wu, Pu-Cheng. Implementation of Low Power Multi-Port Memory and Itâs Applications in Graphic Processing Units.
Degree: Master, Computer Science and Engineering, 2013, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809113-170119
Subjects/Keywords: body-bias; mixed-signal design flow; vertex shader processor; power-gating; low-leakage design; multi-port SRAM
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Wu, P. (2013). Implementation of Low Power Multi-Port Memory and Itâs Applications in Graphic Processing Units. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809113-170119
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wu, Pu-Cheng. “Implementation of Low Power Multi-Port Memory and Itâs Applications in Graphic Processing Units.” 2013. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809113-170119.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wu, Pu-Cheng. “Implementation of Low Power Multi-Port Memory and Itâs Applications in Graphic Processing Units.” 2013. Web. 07 Mar 2021.
Vancouver:
Wu P. Implementation of Low Power Multi-Port Memory and Itâs Applications in Graphic Processing Units. [Internet] [Thesis]. NSYSU; 2013. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809113-170119.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wu P. Implementation of Low Power Multi-Port Memory and Itâs Applications in Graphic Processing Units. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809113-170119
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
21. Hou, Zong-you. Transmitter with Over-Voltage Protection and Bus Driver Controller with Hazard Detection for FlexRay Systems.
Degree: Master, Electrical Engineering, 2014, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-163105
Subjects/Keywords: Bus Driver (BD); state transition; hazard detection; FlexRay transmitter; over-voltage detector
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Hou, Z. (2014). Transmitter with Over-Voltage Protection and Bus Driver Controller with Hazard Detection for FlexRay Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-163105
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Hou, Zong-you. “Transmitter with Over-Voltage Protection and Bus Driver Controller with Hazard Detection for FlexRay Systems.” 2014. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-163105.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Hou, Zong-you. “Transmitter with Over-Voltage Protection and Bus Driver Controller with Hazard Detection for FlexRay Systems.” 2014. Web. 07 Mar 2021.
Vancouver:
Hou Z. Transmitter with Over-Voltage Protection and Bus Driver Controller with Hazard Detection for FlexRay Systems. [Internet] [Thesis]. NSYSU; 2014. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-163105.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Hou Z. Transmitter with Over-Voltage Protection and Bus Driver Controller with Hazard Detection for FlexRay Systems. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-163105
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
22. Tsai, Tsung-Yi. A Process Compensation and Non-linear Calibration Temperature Detector and A Hysteresis Current-Controlled Boost Converter for Battery Management Systems.
Degree: Master, Electrical Engineering, 2014, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135226
Subjects/Keywords: temperature detector; non-linear calibration; hysteresis; boost converter
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Tsai, T. (2014). A Process Compensation and Non-linear Calibration Temperature Detector and A Hysteresis Current-Controlled Boost Converter for Battery Management Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135226
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Tsai, Tsung-Yi. “A Process Compensation and Non-linear Calibration Temperature Detector and A Hysteresis Current-Controlled Boost Converter for Battery Management Systems.” 2014. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135226.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Tsai, Tsung-Yi. “A Process Compensation and Non-linear Calibration Temperature Detector and A Hysteresis Current-Controlled Boost Converter for Battery Management Systems.” 2014. Web. 07 Mar 2021.
Vancouver:
Tsai T. A Process Compensation and Non-linear Calibration Temperature Detector and A Hysteresis Current-Controlled Boost Converter for Battery Management Systems. [Internet] [Thesis]. NSYSU; 2014. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135226.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Tsai T. A Process Compensation and Non-linear Calibration Temperature Detector and A Hysteresis Current-Controlled Boost Converter for Battery Management Systems. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614114-135226
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
23. Tong, Ting-Chi. Bandwidth Optimized Integrated Predictive Pixel Compensator of H.264 Decoder.
Degree: Master, Computer Science and Engineering, 2008, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807108-200335
Subjects/Keywords: Predictive Pixel Compensator; Inter Prediction; Intra Prediction
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Tong, T. (2008). Bandwidth Optimized Integrated Predictive Pixel Compensator of H.264 Decoder. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807108-200335
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Tong, Ting-Chi. “Bandwidth Optimized Integrated Predictive Pixel Compensator of H.264 Decoder.” 2008. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807108-200335.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Tong, Ting-Chi. “Bandwidth Optimized Integrated Predictive Pixel Compensator of H.264 Decoder.” 2008. Web. 07 Mar 2021.
Vancouver:
Tong T. Bandwidth Optimized Integrated Predictive Pixel Compensator of H.264 Decoder. [Internet] [Thesis]. NSYSU; 2008. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807108-200335.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Tong T. Bandwidth Optimized Integrated Predictive Pixel Compensator of H.264 Decoder. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807108-200335
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
24. Wu, Ming-Shiou. Dynamic Multi-channel Multi-path Routing Protocol for Wireless Mesh Networks.
Degree: Master, Electrical Engineering, 2010, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728110-113535
Subjects/Keywords: Routing Protocol; Multi-path; Multi-channel; Wireless Mesh Networks
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Wu, M. (2010). Dynamic Multi-channel Multi-path Routing Protocol for Wireless Mesh Networks. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728110-113535
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wu, Ming-Shiou. “Dynamic Multi-channel Multi-path Routing Protocol for Wireless Mesh Networks.” 2010. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728110-113535.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wu, Ming-Shiou. “Dynamic Multi-channel Multi-path Routing Protocol for Wireless Mesh Networks.” 2010. Web. 07 Mar 2021.
Vancouver:
Wu M. Dynamic Multi-channel Multi-path Routing Protocol for Wireless Mesh Networks. [Internet] [Thesis]. NSYSU; 2010. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728110-113535.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wu M. Dynamic Multi-channel Multi-path Routing Protocol for Wireless Mesh Networks. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728110-113535
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
25. Zhang Jian, Jun-Hong. Design of Low Cost Finite-Impulse Response (FIR) Filters Using Multiple Constant Truncated Multipliers.
Degree: Master, Computer Science and Engineering, 2012, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0910112-142752
Subjects/Keywords: Common Sub-expression Elimination (CSE); Booth recoding; error analysis; truncated multiplier; FIR filter; multiple constant multiplication (MCM); VLSI design; Canonical Signed Digit (CSD) encoding
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Zhang Jian, J. (2012). Design of Low Cost Finite-Impulse Response (FIR) Filters Using Multiple Constant Truncated Multipliers. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0910112-142752
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Zhang Jian, Jun-Hong. “Design of Low Cost Finite-Impulse Response (FIR) Filters Using Multiple Constant Truncated Multipliers.” 2012. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0910112-142752.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Zhang Jian, Jun-Hong. “Design of Low Cost Finite-Impulse Response (FIR) Filters Using Multiple Constant Truncated Multipliers.” 2012. Web. 07 Mar 2021.
Vancouver:
Zhang Jian J. Design of Low Cost Finite-Impulse Response (FIR) Filters Using Multiple Constant Truncated Multipliers. [Internet] [Thesis]. NSYSU; 2012. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0910112-142752.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Zhang Jian J. Design of Low Cost Finite-Impulse Response (FIR) Filters Using Multiple Constant Truncated Multipliers. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0910112-142752
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
26. Wang, Wen-Ling. Hardware Design for Disparity Estimation Using Dynamic Programming.
Degree: Master, Computer Science and Engineering, 2012, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911112-120201
Subjects/Keywords: depth map; disparity; stereo vision; dynamic programming; stereo correspondence; stereo matching
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Wang, W. (2012). Hardware Design for Disparity Estimation Using Dynamic Programming. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911112-120201
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Wang, Wen-Ling. “Hardware Design for Disparity Estimation Using Dynamic Programming.” 2012. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911112-120201.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Wang, Wen-Ling. “Hardware Design for Disparity Estimation Using Dynamic Programming.” 2012. Web. 07 Mar 2021.
Vancouver:
Wang W. Hardware Design for Disparity Estimation Using Dynamic Programming. [Internet] [Thesis]. NSYSU; 2012. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911112-120201.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Wang W. Hardware Design for Disparity Estimation Using Dynamic Programming. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0911112-120201
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
27. Lin, Shin-hung. Improved Bit-Level Truncation with Joint Error Analysis for Table-Based Function Evaluation.
Degree: Master, Computer Science and Engineering, 2012, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-092221
Subjects/Keywords: non-uniform segmentation; piecewise polynomial approximation; error analysis; table-based function evaluation; truncated multipliers; uniform segmentation
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Lin, S. (2012). Improved Bit-Level Truncation with Joint Error Analysis for Table-Based Function Evaluation. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-092221
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Lin, Shin-hung. “Improved Bit-Level Truncation with Joint Error Analysis for Table-Based Function Evaluation.” 2012. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-092221.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Lin, Shin-hung. “Improved Bit-Level Truncation with Joint Error Analysis for Table-Based Function Evaluation.” 2012. Web. 07 Mar 2021.
Vancouver:
Lin S. Improved Bit-Level Truncation with Joint Error Analysis for Table-Based Function Evaluation. [Internet] [Thesis]. NSYSU; 2012. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-092221.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Lin S. Improved Bit-Level Truncation with Joint Error Analysis for Table-Based Function Evaluation. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0912112-092221
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
28. Yang, Chin-lun. A Ray Tracing Acceleration Scheme for Dynamic Scenes.
Degree: Master, Computer Science and Engineering, 2016, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0806116-194815
Subjects/Keywords: Dynamic scene; BVH update; Ray-tracing; Frame coherence; BVH
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Yang, C. (2016). A Ray Tracing Acceleration Scheme for Dynamic Scenes. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0806116-194815
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Yang, Chin-lun. “A Ray Tracing Acceleration Scheme for Dynamic Scenes.” 2016. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0806116-194815.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Yang, Chin-lun. “A Ray Tracing Acceleration Scheme for Dynamic Scenes.” 2016. Web. 07 Mar 2021.
Vancouver:
Yang C. A Ray Tracing Acceleration Scheme for Dynamic Scenes. [Internet] [Thesis]. NSYSU; 2016. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0806116-194815.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Yang C. A Ray Tracing Acceleration Scheme for Dynamic Scenes. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0806116-194815
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
29. Yang, Chih-hsiang. Multi-view Image Generation by Hole Area Partial Rendering in DIBR Hole Filling for 3D Display.
Degree: Master, Computer Science and Engineering, 2016, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807116-111802
Subjects/Keywords: stereoscopic vision; 3D display; multi-view rendering; computer graphic; DIBR
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Yang, C. (2016). Multi-view Image Generation by Hole Area Partial Rendering in DIBR Hole Filling for 3D Display. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807116-111802
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Yang, Chih-hsiang. “Multi-view Image Generation by Hole Area Partial Rendering in DIBR Hole Filling for 3D Display.” 2016. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807116-111802.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Yang, Chih-hsiang. “Multi-view Image Generation by Hole Area Partial Rendering in DIBR Hole Filling for 3D Display.” 2016. Web. 07 Mar 2021.
Vancouver:
Yang C. Multi-view Image Generation by Hole Area Partial Rendering in DIBR Hole Filling for 3D Display. [Internet] [Thesis]. NSYSU; 2016. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807116-111802.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Yang C. Multi-view Image Generation by Hole Area Partial Rendering in DIBR Hole Filling for 3D Display. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807116-111802
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
NSYSU
30. Chen, Zhi-wei. Design and Implementation of Highly-parallel Efficient BVH Tree Builder Architecture for Ray Tracing.
Degree: Master, Computer Science and Engineering, 2017, NSYSU
URL: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0016117-135254
Subjects/Keywords: computer graphics; BVH tree construction; ray-tracing hardware; ray-tracing; BVH
Record Details
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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager
APA (6th Edition):
Chen, Z. (2017). Design and Implementation of Highly-parallel Efficient BVH Tree Builder Architecture for Ray Tracing. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0016117-135254
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Chicago Manual of Style (16th Edition):
Chen, Zhi-wei. “Design and Implementation of Highly-parallel Efficient BVH Tree Builder Architecture for Ray Tracing.” 2017. Thesis, NSYSU. Accessed March 07, 2021. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0016117-135254.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
MLA Handbook (7th Edition):
Chen, Zhi-wei. “Design and Implementation of Highly-parallel Efficient BVH Tree Builder Architecture for Ray Tracing.” 2017. Web. 07 Mar 2021.
Vancouver:
Chen Z. Design and Implementation of Highly-parallel Efficient BVH Tree Builder Architecture for Ray Tracing. [Internet] [Thesis]. NSYSU; 2017. [cited 2021 Mar 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0016117-135254.
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation
Council of Science Editors:
Chen Z. Design and Implementation of Highly-parallel Efficient BVH Tree Builder Architecture for Ray Tracing. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0016117-135254
Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation