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You searched for +publisher:"NSYSU" +contributor:("Robert Rieger"). Showing records 1 – 30 of 30 total matches.

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NSYSU

1. Huang, Yan-ru. A MMC Controller for Wearable Data Logging and Front-end Amplifier.

Degree: Master, Electrical Engineering, 2009, NSYSU

 There are many kinds of commercial memory cards on the market. Due to great improvements in modern technology, they have great amounts of capacity, low… (more)

Subjects/Keywords: MultiMediaCard; SPI mode; Front-end amplifier; ADC; lateral BJT

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, Y. (2009). A MMC Controller for Wearable Data Logging and Front-end Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0813109-165733

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Yan-ru. “A MMC Controller for Wearable Data Logging and Front-end Amplifier.” 2009. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0813109-165733.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Yan-ru. “A MMC Controller for Wearable Data Logging and Front-end Amplifier.” 2009. Web. 07 Apr 2020.

Vancouver:

Huang Y. A MMC Controller for Wearable Data Logging and Front-end Amplifier. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0813109-165733.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang Y. A MMC Controller for Wearable Data Logging and Front-end Amplifier. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0813109-165733

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

2. Chuang, Sheng-Chih. Multi-channel Delay-Line ASIC with Variable Delays towards a VSR System.

Degree: Master, Electrical Engineering, 2015, NSYSU

 This thesis describes the design and evaluation of an integrated circuit (ASIC) implement eight parallel signal channels providing analog-amplitude delay-and-add functionality. This implementation is a… (more)

Subjects/Keywords: Nerve cuff recording; Electroneurogram; Sample-and-hold circuit; Application-specific integrated circuit (ASIC); Low power circuit; Velocity selective recording

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chuang, S. (2015). Multi-channel Delay-Line ASIC with Variable Delays towards a VSR System. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0212115-134634

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chuang, Sheng-Chih. “Multi-channel Delay-Line ASIC with Variable Delays towards a VSR System.” 2015. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0212115-134634.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chuang, Sheng-Chih. “Multi-channel Delay-Line ASIC with Variable Delays towards a VSR System.” 2015. Web. 07 Apr 2020.

Vancouver:

Chuang S. Multi-channel Delay-Line ASIC with Variable Delays towards a VSR System. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0212115-134634.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chuang S. Multi-channel Delay-Line ASIC with Variable Delays towards a VSR System. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0212115-134634

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Lin, Ding-Zhi. Integrated Circuit Designs for a Multi-signal Biomedical Signal Recording Chip.

Degree: Master, Electrical Engineering, 2018, NSYSU

 With the advance of mobile healthcare and the Internet-of-things increasing numbers of applications incorporate low-power miniature sensing devices for various types of input signal. In… (more)

Subjects/Keywords: biomedical chip; adjustable gain; switched capacitor amplifier; integrated circuit; temperature monitoring circuit

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, D. (2018). Integrated Circuit Designs for a Multi-signal Biomedical Signal Recording Chip. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0029118-150639

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Ding-Zhi. “Integrated Circuit Designs for a Multi-signal Biomedical Signal Recording Chip.” 2018. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0029118-150639.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Ding-Zhi. “Integrated Circuit Designs for a Multi-signal Biomedical Signal Recording Chip.” 2018. Web. 07 Apr 2020.

Vancouver:

Lin D. Integrated Circuit Designs for a Multi-signal Biomedical Signal Recording Chip. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0029118-150639.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin D. Integrated Circuit Designs for a Multi-signal Biomedical Signal Recording Chip. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0029118-150639

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Lin, Sheng-En. Design and Evaluation of an Improved 10-bit Integrating CMOS ADC.

Degree: Master, Electrical Engineering, 2017, NSYSU

 The analog-to-digital converter (ADC) is an essential component in modern mixed-signal system applications. This thesis presents the design and evaluation of a single-slope integrating ADC… (more)

Subjects/Keywords: single-slope integrating ADC; voltage-to-time converter; low power circuit design; application-specific integrated circuit (ASIC); biological-signal recording system

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, S. (2017). Design and Evaluation of an Improved 10-bit Integrating CMOS ADC. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0113117-143835

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Sheng-En. “Design and Evaluation of an Improved 10-bit Integrating CMOS ADC.” 2017. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0113117-143835.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Sheng-En. “Design and Evaluation of an Improved 10-bit Integrating CMOS ADC.” 2017. Web. 07 Apr 2020.

Vancouver:

Lin S. Design and Evaluation of an Improved 10-bit Integrating CMOS ADC. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0113117-143835.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin S. Design and Evaluation of an Improved 10-bit Integrating CMOS ADC. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0113117-143835

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

5. Chang, Li-Shen. Comparator-Based Cyclic Analog-to-Digital Conversion with Error-Trimming.

Degree: Master, Electrical Engineering, 2009, NSYSU

 This thesis focuses on the analysis theory, circuit design, simulations, and chip measurements of the transfer stage in the continuously error-trimming comparator-based switched-capacitor charge transfer… (more)

Subjects/Keywords: CBSC; error trimming; cyclic ADC; cyclic analog-to-digital

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chang, L. (2009). Comparator-Based Cyclic Analog-to-Digital Conversion with Error-Trimming. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811109-143534

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Li-Shen. “Comparator-Based Cyclic Analog-to-Digital Conversion with Error-Trimming.” 2009. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811109-143534.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Li-Shen. “Comparator-Based Cyclic Analog-to-Digital Conversion with Error-Trimming.” 2009. Web. 07 Apr 2020.

Vancouver:

Chang L. Comparator-Based Cyclic Analog-to-Digital Conversion with Error-Trimming. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811109-143534.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang L. Comparator-Based Cyclic Analog-to-Digital Conversion with Error-Trimming. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0811109-143534

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

6. Huang, Yuah-tse. A Transceiver System Using the Human Body as Transmission Channel.

Degree: Master, Electrical Engineering, 2009, NSYSU

 This thesis consists of two subjects of research: A Digital Modulation bit error rate study for transmission using the human body as the transmission channel,… (more)

Subjects/Keywords: OOK; Piezo; digital modulation; transceiver

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, Y. (2009). A Transceiver System Using the Human Body as Transmission Channel. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0814109-165038

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Yuah-tse. “A Transceiver System Using the Human Body as Transmission Channel.” 2009. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0814109-165038.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Yuah-tse. “A Transceiver System Using the Human Body as Transmission Channel.” 2009. Web. 07 Apr 2020.

Vancouver:

Huang Y. A Transceiver System Using the Human Body as Transmission Channel. [Internet] [Thesis]. NSYSU; 2009. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0814109-165038.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang Y. A Transceiver System Using the Human Body as Transmission Channel. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0814109-165038

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

7. Huang, Wen-chi. A Readout Circuit for Piezoelectric Sensors with Digital Range-Enhancement.

Degree: Master, Electrical Engineering, 2010, NSYSU

 This thesis presents a fully integratable read-out front-end for recording from piezoelectric sensors. It is proposed to periodically reset the input signal to avoid build-up… (more)

Subjects/Keywords: realignment; pressure recording; piezoelectric sensors; read-out; dynamic range

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, W. (2010). A Readout Circuit for Piezoelectric Sensors with Digital Range-Enhancement. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809110-125517

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Wen-chi. “A Readout Circuit for Piezoelectric Sensors with Digital Range-Enhancement.” 2010. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809110-125517.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Wen-chi. “A Readout Circuit for Piezoelectric Sensors with Digital Range-Enhancement.” 2010. Web. 07 Apr 2020.

Vancouver:

Huang W. A Readout Circuit for Piezoelectric Sensors with Digital Range-Enhancement. [Internet] [Thesis]. NSYSU; 2010. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809110-125517.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang W. A Readout Circuit for Piezoelectric Sensors with Digital Range-Enhancement. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809110-125517

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

8. Yang, Chen-yueh. Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage.

Degree: Master, Electrical Engineering, 2016, NSYSU

 Technologies and applications of biomedical signals processing become increasingly popular as integrated circuit fabrication technology and process advances, a low interference input stage in a… (more)

Subjects/Keywords: ASIC; Low noise; Biomedical signal; Flicker noise; Lateral Bipolar Transistor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yang, C. (2016). Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913116-111333

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Chen-yueh. “Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage.” 2016. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913116-111333.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Chen-yueh. “Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage.” 2016. Web. 07 Apr 2020.

Vancouver:

Yang C. Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage. [Internet] [Thesis]. NSYSU; 2016. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913116-111333.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang C. Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913116-111333

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

9. Chang, Chih-ting. Design and Evaluation of a 10-bit CMOS DAC with Truly Floating Voltage Output.

Degree: Master, Electrical Engineering, 2017, NSYSU

 This thesis realizes an application-specific integrated circuit (ASIC) implementation of 10-bit digital-to-analog converter (DAC) and a Truly Floating Voltage Source output stage in CMOS technology.… (more)

Subjects/Keywords: digital-to-analog converter; TMAP; bio-signal; Truly floating voltage Output; SPI

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chang, C. (2017). Design and Evaluation of a 10-bit CMOS DAC with Truly Floating Voltage Output. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0109117-165426

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Chih-ting. “Design and Evaluation of a 10-bit CMOS DAC with Truly Floating Voltage Output.” 2017. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0109117-165426.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Chih-ting. “Design and Evaluation of a 10-bit CMOS DAC with Truly Floating Voltage Output.” 2017. Web. 07 Apr 2020.

Vancouver:

Chang C. Design and Evaluation of a 10-bit CMOS DAC with Truly Floating Voltage Output. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0109117-165426.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang C. Design and Evaluation of a 10-bit CMOS DAC with Truly Floating Voltage Output. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0109117-165426

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

10. Chen, Yen-yu. On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application.

Degree: Master, Electrical Engineering, 2011, NSYSU

 In recent years, due to advances in semiconductor technology and mature integrated circuit design, complex signal processing equipment is beginning to be replaced by the… (more)

Subjects/Keywords: piezoelectric crystal; programmable frequency generator; resonance frequency; amplitude detector; latch comparator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, Y. (2011). On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yen-yu. “On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application.” 2011. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yen-yu. “On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application.” 2011. Web. 07 Apr 2020.

Vancouver:

Chen Y. On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application. [Internet] [Thesis]. NSYSU; 2011. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. On the design and evaluation of a programmable frequency generator ASIC for acoustic-wave sensor application. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0822111-163935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

11. Hsu, Wen-yen. Battery Emulator Circuit for The Application of Energy Measurement.

Degree: Master, Electrical Engineering, 2015, NSYSU

 In recent years, electronic products became portable and have lowered power consumption because of the limited energy resource availability. The measurement of energy consumption of… (more)

Subjects/Keywords: capacitor changing; simulating battery lifetime; dynamic emulator; current measurement; energy consumption

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, W. (2015). Battery Emulator Circuit for The Application of Energy Measurement. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-130616

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Wen-yen. “Battery Emulator Circuit for The Application of Energy Measurement.” 2015. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-130616.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Wen-yen. “Battery Emulator Circuit for The Application of Energy Measurement.” 2015. Web. 07 Apr 2020.

Vancouver:

Hsu W. Battery Emulator Circuit for The Application of Energy Measurement. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-130616.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu W. Battery Emulator Circuit for The Application of Energy Measurement. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-130616

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

12. Yu, Rui-Hsiu. A Piezoelectric Energy Harvester and MOS Floating Gate Memory towards Wearable Strain Metering.

Degree: Master, Electrical Engineering, 2015, NSYSU

 With increasing levels of health awareness among people, the importance of long-term medical monitoring has increased along with the need for body detection at any… (more)

Subjects/Keywords: Energy Harvesting; Floating gate memory; Piezoelectric; Long-term wearable monitoring; Wearable circuits

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APA (6th Edition):

Yu, R. (2015). A Piezoelectric Energy Harvester and MOS Floating Gate Memory towards Wearable Strain Metering. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-134153

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yu, Rui-Hsiu. “A Piezoelectric Energy Harvester and MOS Floating Gate Memory towards Wearable Strain Metering.” 2015. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-134153.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yu, Rui-Hsiu. “A Piezoelectric Energy Harvester and MOS Floating Gate Memory towards Wearable Strain Metering.” 2015. Web. 07 Apr 2020.

Vancouver:

Yu R. A Piezoelectric Energy Harvester and MOS Floating Gate Memory towards Wearable Strain Metering. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-134153.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yu R. A Piezoelectric Energy Harvester and MOS Floating Gate Memory towards Wearable Strain Metering. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0913115-134153

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

13. Huang, I-Cheng. Circuits and methods towards a wearable piezoelectric foot balance and strain measurement system.

Degree: Master, Electrical Engineering, 2016, NSYSU

 This thesis is concerned with the design, implementation and testing of a shoe-mounted wearable strain monitor for the recording of foot pressure balance. Three piezo-electric… (more)

Subjects/Keywords: Wearable circuits; Piezoelectric; Foot pressure; Floating gate memory; Digital self-calibration

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, I. (2016). Circuits and methods towards a wearable piezoelectric foot balance and strain measurement system. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0223115-120640

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, I-Cheng. “Circuits and methods towards a wearable piezoelectric foot balance and strain measurement system.” 2016. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0223115-120640.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, I-Cheng. “Circuits and methods towards a wearable piezoelectric foot balance and strain measurement system.” 2016. Web. 07 Apr 2020.

Vancouver:

Huang I. Circuits and methods towards a wearable piezoelectric foot balance and strain measurement system. [Internet] [Thesis]. NSYSU; 2016. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0223115-120640.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang I. Circuits and methods towards a wearable piezoelectric foot balance and strain measurement system. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0223115-120640

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

14. Chang, Kuang-Ching. Design and evaluation of a baseband superregenerative amplification circuit for variable gain.

Degree: Master, Electrical Engineering, 2016, NSYSU

 This thesis describes the design and evaluation of an integrated circuit (ASIC) for signal amplification with variable gain. The circuit employs the principle of baseband… (more)

Subjects/Keywords: parasitic capacitance; physiological signals; variable gain; exponential charging; superregenerative amplifier

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APA (6th Edition):

Chang, K. (2016). Design and evaluation of a baseband superregenerative amplification circuit for variable gain. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0503116-141706

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Kuang-Ching. “Design and evaluation of a baseband superregenerative amplification circuit for variable gain.” 2016. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0503116-141706.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Kuang-Ching. “Design and evaluation of a baseband superregenerative amplification circuit for variable gain.” 2016. Web. 07 Apr 2020.

Vancouver:

Chang K. Design and evaluation of a baseband superregenerative amplification circuit for variable gain. [Internet] [Thesis]. NSYSU; 2016. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0503116-141706.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang K. Design and evaluation of a baseband superregenerative amplification circuit for variable gain. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0503116-141706

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

15. Chen, Jing-yuan. Design and Implementation of a Microcontroller-based Axon Emulator Circuit.

Degree: Master, Electrical Engineering, 2012, NSYSU

 In recent years, there has been significant research and development in the area of advanced circuits and systems for the recording of the electroneurogram (ENG)… (more)

Subjects/Keywords: Peripheral nerve; artificial nerve; microcontroller; action potential; SFAP; CAP

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, J. (2012). Design and Implementation of a Microcontroller-based Axon Emulator Circuit. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-164250

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Jing-yuan. “Design and Implementation of a Microcontroller-based Axon Emulator Circuit.” 2012. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-164250.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Jing-yuan. “Design and Implementation of a Microcontroller-based Axon Emulator Circuit.” 2012. Web. 07 Apr 2020.

Vancouver:

Chen J. Design and Implementation of a Microcontroller-based Axon Emulator Circuit. [Internet] [Thesis]. NSYSU; 2012. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-164250.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen J. Design and Implementation of a Microcontroller-based Axon Emulator Circuit. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-164250

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

16. Wu, Yen-cheng. A Neuron Emulator and Headstage Circuit for Patch Clamp Setups.

Degree: Master, Electrical Engineering, 2012, NSYSU

 This thesis presents a neuron emulator and headstage circuit for patch clamp setups and provides simulation, measurement and verification results. The circuit implemented on a… (more)

Subjects/Keywords: patch clamp; neuron emulator; headstage; single electrode; action potential; current clamp; voltage clamp

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Wu, Y. (2012). A Neuron Emulator and Headstage Circuit for Patch Clamp Setups. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-163439

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Yen-cheng. “A Neuron Emulator and Headstage Circuit for Patch Clamp Setups.” 2012. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-163439.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Yen-cheng. “A Neuron Emulator and Headstage Circuit for Patch Clamp Setups.” 2012. Web. 07 Apr 2020.

Vancouver:

Wu Y. A Neuron Emulator and Headstage Circuit for Patch Clamp Setups. [Internet] [Thesis]. NSYSU; 2012. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-163439.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu Y. A Neuron Emulator and Headstage Circuit for Patch Clamp Setups. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0815112-163439

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

17. Teng, Hsin-Liang. Realization of Gain and Balance Control for Wearable Double-differential Amplifier.

Degree: Master, Electrical Engineering, 2012, NSYSU

 Low size, low power, and wearable bio-signal recording systems require acquisition front-ends with high common-mode rejection for interference suppression and adjustable gain to provide an… (more)

Subjects/Keywords: bio-potential; CMOS integrated circuit; automatic gain control (AGC); double-differential amplifier; interference rejection

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Teng, H. (2012). Realization of Gain and Balance Control for Wearable Double-differential Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816112-004753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Teng, Hsin-Liang. “Realization of Gain and Balance Control for Wearable Double-differential Amplifier.” 2012. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816112-004753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Teng, Hsin-Liang. “Realization of Gain and Balance Control for Wearable Double-differential Amplifier.” 2012. Web. 07 Apr 2020.

Vancouver:

Teng H. Realization of Gain and Balance Control for Wearable Double-differential Amplifier. [Internet] [Thesis]. NSYSU; 2012. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816112-004753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Teng H. Realization of Gain and Balance Control for Wearable Double-differential Amplifier. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816112-004753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

18. Lin, Yu-bin. Design of a programmable multi-parameter amplifier front-end for bio-potential recording.

Degree: Master, Electrical Engineering, 2011, NSYSU

 Home medical equipment becomes increasingly popular as VLSI fabrication technology advances. However, there are two important factors for realizing a miniaturized biochip: low noise [1]… (more)

Subjects/Keywords: double-differential amplifier; VLSI; BiCMOS; low power; physiological signals

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, Y. (2011). Design of a programmable multi-parameter amplifier front-end for bio-potential recording. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-223310

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Yu-bin. “Design of a programmable multi-parameter amplifier front-end for bio-potential recording.” 2011. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-223310.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Yu-bin. “Design of a programmable multi-parameter amplifier front-end for bio-potential recording.” 2011. Web. 07 Apr 2020.

Vancouver:

Lin Y. Design of a programmable multi-parameter amplifier front-end for bio-potential recording. [Internet] [Thesis]. NSYSU; 2011. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-223310.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin Y. Design of a programmable multi-parameter amplifier front-end for bio-potential recording. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0830111-223310

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

19. Liao, Jiun-Huei. On the modular design of analog on-chip buffer for circuit testing application.

Degree: Master, Electrical Engineering, 2011, NSYSU

 When designing analog circuits, we must ultimately perform measurements on the fabricated chips to determine whether they work correctly or not. The test results are… (more)

Subjects/Keywords: analog; class AB; modular; buffer; module

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liao, J. (2011). On the modular design of analog on-chip buffer for circuit testing application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831111-223251

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Jiun-Huei. “On the modular design of analog on-chip buffer for circuit testing application.” 2011. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831111-223251.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Jiun-Huei. “On the modular design of analog on-chip buffer for circuit testing application.” 2011. Web. 07 Apr 2020.

Vancouver:

Liao J. On the modular design of analog on-chip buffer for circuit testing application. [Internet] [Thesis]. NSYSU; 2011. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831111-223251.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao J. On the modular design of analog on-chip buffer for circuit testing application. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0831111-223251

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

20. Hsu, Yen-chu. Improving Video Handover Quality Using a Group Management Agent on LTE-A Networks.

Degree: Master, Electrical Engineering, 2015, NSYSU

 On an LTE-A (Long Term Evolution-Advanced) multicast network, a moving UE may handover form a multicast group under a Serving eNodeB to another multicast group… (more)

Subjects/Keywords: NS-3; LTE-A; Multicasting; GMP Agent; Video Quality

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APA (6th Edition):

Hsu, Y. (2015). Improving Video Handover Quality Using a Group Management Agent on LTE-A Networks. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0108115-174546

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Yen-chu. “Improving Video Handover Quality Using a Group Management Agent on LTE-A Networks.” 2015. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0108115-174546.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Yen-chu. “Improving Video Handover Quality Using a Group Management Agent on LTE-A Networks.” 2015. Web. 07 Apr 2020.

Vancouver:

Hsu Y. Improving Video Handover Quality Using a Group Management Agent on LTE-A Networks. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0108115-174546.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu Y. Improving Video Handover Quality Using a Group Management Agent on LTE-A Networks. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0108115-174546

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

21. Liao, Pei-Tong. A mains interference rejection filter design in a wearable biomedical signal monitoring system.

Degree: Master, Electrical Engineering, 2018, NSYSU

 This thesis presents an adjustable filter which can reject the main interference in a wearable health care system. This AFE system is implemented in TSMC… (more)

Subjects/Keywords: Biomedical signal; IoT; SOC chip; high quality factor; notch filter; switched

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APA (6th Edition):

Liao, P. (2018). A mains interference rejection filter design in a wearable biomedical signal monitoring system. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0627118-235810

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Pei-Tong. “A mains interference rejection filter design in a wearable biomedical signal monitoring system.” 2018. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0627118-235810.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Pei-Tong. “A mains interference rejection filter design in a wearable biomedical signal monitoring system.” 2018. Web. 07 Apr 2020.

Vancouver:

Liao P. A mains interference rejection filter design in a wearable biomedical signal monitoring system. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0627118-235810.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao P. A mains interference rejection filter design in a wearable biomedical signal monitoring system. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0627118-235810

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

22. Ma, Jo-Yun. Automatic line interference detection and electrode rebalancing for wearable ECG front-end.

Degree: Master, Electrical Engineering, 2018, NSYSU

 To solve one of the major problems in recording biopotentials, which is the unwanted 60Hz interference produced by power line, an automatically adjusting resistors design… (more)

Subjects/Keywords: biomedical recording; dual potentiometers; undersampling; imbalance impedance; Goertzel algorithm

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ma, J. (2018). Automatic line interference detection and electrode rebalancing for wearable ECG front-end. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626118-223114

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ma, Jo-Yun. “Automatic line interference detection and electrode rebalancing for wearable ECG front-end.” 2018. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626118-223114.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ma, Jo-Yun. “Automatic line interference detection and electrode rebalancing for wearable ECG front-end.” 2018. Web. 07 Apr 2020.

Vancouver:

Ma J. Automatic line interference detection and electrode rebalancing for wearable ECG front-end. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626118-223114.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ma J. Automatic line interference detection and electrode rebalancing for wearable ECG front-end. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0626118-223114

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

23. Lu, Chieh-Feng. Design and implementation of a 20MHz/32MHz PLL frequency Synthesizer in 180nm CMOS.

Degree: Master, Electrical Engineering, 2018, NSYSU

 This thesis presents a PLL based frequency synthesizer which is used to generate system clocks and sampling clocks for the front-end ASIC âIntegrated ExG, Vibration… (more)

Subjects/Keywords: Clock generator; PLL; Pulse Swallow; Synthesizer; Leakage-compensated

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lu, C. (2018). Design and implementation of a 20MHz/32MHz PLL frequency Synthesizer in 180nm CMOS. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623118-212500

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lu, Chieh-Feng. “Design and implementation of a 20MHz/32MHz PLL frequency Synthesizer in 180nm CMOS.” 2018. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623118-212500.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lu, Chieh-Feng. “Design and implementation of a 20MHz/32MHz PLL frequency Synthesizer in 180nm CMOS.” 2018. Web. 07 Apr 2020.

Vancouver:

Lu C. Design and implementation of a 20MHz/32MHz PLL frequency Synthesizer in 180nm CMOS. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623118-212500.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lu C. Design and implementation of a 20MHz/32MHz PLL frequency Synthesizer in 180nm CMOS. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0623118-212500

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

24. Shi, Po-Xu. Design and Implementation of a Quasi Floating-Gate Memory Controlled Oscillator.

Degree: Master, Electrical Engineering, 2018, NSYSU

 This thesis realizes an application-specific integrated circuit (ASIC) implementation of adjustable frequency clock generator which combination of a one-bit quasi floating gate memory as reference… (more)

Subjects/Keywords: quasi floating gate memory; clock generator; adjustable frequency; application-specific integrated circuit; oscillator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Shi, P. (2018). Design and Implementation of a Quasi Floating-Gate Memory Controlled Oscillator. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-144811

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Shi, Po-Xu. “Design and Implementation of a Quasi Floating-Gate Memory Controlled Oscillator.” 2018. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-144811.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Shi, Po-Xu. “Design and Implementation of a Quasi Floating-Gate Memory Controlled Oscillator.” 2018. Web. 07 Apr 2020.

Vancouver:

Shi P. Design and Implementation of a Quasi Floating-Gate Memory Controlled Oscillator. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-144811.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Shi P. Design and Implementation of a Quasi Floating-Gate Memory Controlled Oscillator. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0625118-144811

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

25. Siao, Jhih-Ren. Construction and Reconfiguration Schemes of Reliable Reversed-Routing Tree for Body Sensor Networks.

Degree: Master, Electrical Engineering, 2013, NSYSU

 This paper constructs a reconfigurable and reliable reversed-routing tree (RRT). There are two purposes of building the RRT: (i) to avoid packet collisions, we use… (more)

Subjects/Keywords: LQI; BSN; PLR; collision; RRT

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Siao, J. (2013). Construction and Reconfiguration Schemes of Reliable Reversed-Routing Tree for Body Sensor Networks. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808113-002215

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Siao, Jhih-Ren. “Construction and Reconfiguration Schemes of Reliable Reversed-Routing Tree for Body Sensor Networks.” 2013. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808113-002215.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Siao, Jhih-Ren. “Construction and Reconfiguration Schemes of Reliable Reversed-Routing Tree for Body Sensor Networks.” 2013. Web. 07 Apr 2020.

Vancouver:

Siao J. Construction and Reconfiguration Schemes of Reliable Reversed-Routing Tree for Body Sensor Networks. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808113-002215.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Siao J. Construction and Reconfiguration Schemes of Reliable Reversed-Routing Tree for Body Sensor Networks. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0808113-002215

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

26. Ou, Shih-hao. Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion.

Degree: Master, Electrical Engineering, 2013, NSYSU

 With advances in integrated circuit (IC) processing technology, medical devices are becoming miniature, with low power consumption. Therefore, wearable and implantable applications become feasible, and… (more)

Subjects/Keywords: Common-mode; Differential-mode; Analog-to-digital converter; Voltage-to-time converter; Integrated circuit

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ou, S. (2013). Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0826113-161753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Ou, Shih-hao. “Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion.” 2013. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0826113-161753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Ou, Shih-hao. “Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion.” 2013. Web. 07 Apr 2020.

Vancouver:

Ou S. Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0826113-161753.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Ou S. Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0826113-161753

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

27. Nien, Chen-ming. Implementation of Front-end Compression for a Wireless BAN Sensor Node.

Degree: Master, Electrical Engineering, 2013, NSYSU

 With the aging of the world population, the importance of long-term medical monitoring has increased along with the need for home care services for the… (more)

Subjects/Keywords: Body area network (BAN); Curvature compression; Huffman coding; Microcontroller coding; FPGA digital circuit design

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Nien, C. (2013). Implementation of Front-end Compression for a Wireless BAN Sensor Node. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0827113-191922

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Nien, Chen-ming. “Implementation of Front-end Compression for a Wireless BAN Sensor Node.” 2013. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0827113-191922.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Nien, Chen-ming. “Implementation of Front-end Compression for a Wireless BAN Sensor Node.” 2013. Web. 07 Apr 2020.

Vancouver:

Nien C. Implementation of Front-end Compression for a Wireless BAN Sensor Node. [Internet] [Thesis]. NSYSU; 2013. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0827113-191922.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Nien C. Implementation of Front-end Compression for a Wireless BAN Sensor Node. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0827113-191922

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

28. Prasetya, Nyoman Wira. Pre-Emptive Traffic Management for a Cluster-Based TDMA System in Vehicular Communications.

Degree: Master, Electrical Engineering, 2016, NSYSU

 The IEEE 802.11p is a standard in a vehicular communication system, known as Wireless Access in Vehicular Environment (WAVE). An implementation of that standard as… (more)

Subjects/Keywords: Priority; QoS; TDMA; MAC; VANET; Cluster-based

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Prasetya, N. W. (2016). Pre-Emptive Traffic Management for a Cluster-Based TDMA System in Vehicular Communications. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727115-140815

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Prasetya, Nyoman Wira. “Pre-Emptive Traffic Management for a Cluster-Based TDMA System in Vehicular Communications.” 2016. Thesis, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727115-140815.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Prasetya, Nyoman Wira. “Pre-Emptive Traffic Management for a Cluster-Based TDMA System in Vehicular Communications.” 2016. Web. 07 Apr 2020.

Vancouver:

Prasetya NW. Pre-Emptive Traffic Management for a Cluster-Based TDMA System in Vehicular Communications. [Internet] [Thesis]. NSYSU; 2016. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727115-140815.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Prasetya NW. Pre-Emptive Traffic Management for a Cluster-Based TDMA System in Vehicular Communications. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727115-140815

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

29. Hsu, Chia-Hao. Design and Implementation of One-time Implantable Spinal Cord Stimulation System.

Degree: PhD, Electrical Engineering, 2012, NSYSU

 A prototype of a one-time implantable spinal cord stimulation (SCS) system is presented in this thesis. A pair of inductive coils is used to achieve… (more)

Subjects/Keywords: spinal cord stimulation; implantable; VLSI; ASK; DDFS; I/O buffer

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, C. (2012). Design and Implementation of One-time Implantable Spinal Cord Stimulation System. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707112-050543

Chicago Manual of Style (16th Edition):

Hsu, Chia-Hao. “Design and Implementation of One-time Implantable Spinal Cord Stimulation System.” 2012. Doctoral Dissertation, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707112-050543.

MLA Handbook (7th Edition):

Hsu, Chia-Hao. “Design and Implementation of One-time Implantable Spinal Cord Stimulation System.” 2012. Web. 07 Apr 2020.

Vancouver:

Hsu C. Design and Implementation of One-time Implantable Spinal Cord Stimulation System. [Internet] [Doctoral dissertation]. NSYSU; 2012. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707112-050543.

Council of Science Editors:

Hsu C. Design and Implementation of One-time Implantable Spinal Cord Stimulation System. [Doctoral Dissertation]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707112-050543


NSYSU

30. Huang, Chi-Chung. Design and Implementation of A Personal Gateway for Body Area Networks.

Degree: PhD, Electrical Engineering, 2009, NSYSU

 In this thesis, we propose a personal gateway for wireless body area network(WBAN). By using wireless communication and a proper WBAN topology, patientsâ physiological signal… (more)

Subjects/Keywords: personal gateway; body area networks; mixed-voltage; BPM; ZigBee; ADPLL

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, C. (2009). Design and Implementation of A Personal Gateway for Body Area Networks. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1012109-150819

Chicago Manual of Style (16th Edition):

Huang, Chi-Chung. “Design and Implementation of A Personal Gateway for Body Area Networks.” 2009. Doctoral Dissertation, NSYSU. Accessed April 07, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1012109-150819.

MLA Handbook (7th Edition):

Huang, Chi-Chung. “Design and Implementation of A Personal Gateway for Body Area Networks.” 2009. Web. 07 Apr 2020.

Vancouver:

Huang C. Design and Implementation of A Personal Gateway for Body Area Networks. [Internet] [Doctoral dissertation]. NSYSU; 2009. [cited 2020 Apr 07]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1012109-150819.

Council of Science Editors:

Huang C. Design and Implementation of A Personal Gateway for Body Area Networks. [Doctoral Dissertation]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1012109-150819

.