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You searched for +publisher:"NSYSU" +contributor:("Pei-Yin Chen"). Showing records 1 – 30 of 44 total matches.

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NSYSU

1. You, Tz-Heng. Design of Low-Cost HOG and Its Application to Pedestrian Detection in ADAS.

Degree: Master, Computer Science and Engineering, 2017, NSYSU

 This thesis presents two versions of simplifications, Gradient Comprison HOG (GC-HOG) and Simplified HOG (S-HOG) for Histograms of Oriented Gradients (HOG), a feature extraction algorithm… (more)

Subjects/Keywords: FPGA; Hardware Design; Pedestrian Detection; ADAS; HOG

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

You, T. (2017). Design of Low-Cost HOG and Its Application to Pedestrian Detection in ADAS. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173711

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

You, Tz-Heng. “Design of Low-Cost HOG and Its Application to Pedestrian Detection in ADAS.” 2017. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173711.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

You, Tz-Heng. “Design of Low-Cost HOG and Its Application to Pedestrian Detection in ADAS.” 2017. Web. 21 Aug 2019.

Vancouver:

You T. Design of Low-Cost HOG and Its Application to Pedestrian Detection in ADAS. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173711.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

You T. Design of Low-Cost HOG and Its Application to Pedestrian Detection in ADAS. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173711

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

2. Tsai, Chen-Yen. Architecture Design and Hardware Implementation of LK Optical Flow.

Degree: Master, Computer Science and Engineering, 2017, NSYSU

 Due to rapid advances of machine learning and computer vision, object track recognition and tracking are fundamental technologies in many applications, including the popular advanced… (more)

Subjects/Keywords: Computer vision; LK optical flow; Moving object tracking; Pyramid optical flow; Hardware implementation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Tsai, C. (2017). Architecture Design and Hardware Implementation of LK Optical Flow. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173553

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tsai, Chen-Yen. “Architecture Design and Hardware Implementation of LK Optical Flow.” 2017. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173553.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tsai, Chen-Yen. “Architecture Design and Hardware Implementation of LK Optical Flow.” 2017. Web. 21 Aug 2019.

Vancouver:

Tsai C. Architecture Design and Hardware Implementation of LK Optical Flow. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173553.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tsai C. Architecture Design and Hardware Implementation of LK Optical Flow. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725117-173553

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Chang, Chih-hsuan. Hardware Design of Stereo Matching Based on Guided Image Filtering.

Degree: Master, Computer Science and Engineering, 2017, NSYSU

 Stereo vision has many applications, including 3D movies and the recent advanced driver assisted systems (ADAS). In stereo vision, stereo matching of generating depth information… (more)

Subjects/Keywords: stereo vision; stereo matching; depth information; mean filtering; guided image filtering

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chang, C. (2017). Hardware Design of Stereo Matching Based on Guided Image Filtering. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728117-232935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Chih-hsuan. “Hardware Design of Stereo Matching Based on Guided Image Filtering.” 2017. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728117-232935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Chih-hsuan. “Hardware Design of Stereo Matching Based on Guided Image Filtering.” 2017. Web. 21 Aug 2019.

Vancouver:

Chang C. Hardware Design of Stereo Matching Based on Guided Image Filtering. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728117-232935.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang C. Hardware Design of Stereo Matching Based on Guided Image Filtering. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728117-232935

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Yen, Huai-yu. Power Optimization for 3D Vertex Shader Using Clock Gating.

Degree: Master, Computer Science and Engineering, 2008, NSYSU

 With technology increasingly and the needs of high performance and multiple functionalities, power dissipation has be a bottleneck in microprocessors. And clock power is the… (more)

Subjects/Keywords: instruction schedule; 3D vertex shader; clock gating; Low power

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yen, H. (2008). Power Optimization for 3D Vertex Shader Using Clock Gating. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816108-003258

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yen, Huai-yu. “Power Optimization for 3D Vertex Shader Using Clock Gating.” 2008. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816108-003258.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yen, Huai-yu. “Power Optimization for 3D Vertex Shader Using Clock Gating.” 2008. Web. 21 Aug 2019.

Vancouver:

Yen H. Power Optimization for 3D Vertex Shader Using Clock Gating. [Internet] [Thesis]. NSYSU; 2008. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816108-003258.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yen H. Power Optimization for 3D Vertex Shader Using Clock Gating. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0816108-003258

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

5. Hsu, Hua-Shan. Design and Implementation of Power Management Policy on 3D Graphics System-On-Chip.

Degree: Master, Computer Science and Engineering, 2008, NSYSU

 The 3D applications, until recently restricted to the desktops and workstations, are expanding into the mobile platforms, such as cellular phones and PDAs. Similar to… (more)

Subjects/Keywords: power management; low power; workload estimation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, H. (2008). Design and Implementation of Power Management Policy on 3D Graphics System-On-Chip. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825108-165911

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Hua-Shan. “Design and Implementation of Power Management Policy on 3D Graphics System-On-Chip.” 2008. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825108-165911.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Hua-Shan. “Design and Implementation of Power Management Policy on 3D Graphics System-On-Chip.” 2008. Web. 21 Aug 2019.

Vancouver:

Hsu H. Design and Implementation of Power Management Policy on 3D Graphics System-On-Chip. [Internet] [Thesis]. NSYSU; 2008. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825108-165911.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu H. Design and Implementation of Power Management Policy on 3D Graphics System-On-Chip. [Thesis]. NSYSU; 2008. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0825108-165911

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

6. Liu, Jia-Young. Transmission Modeling and Channel Decoder Implementation Using FPGA for Homplug 1.0 Systems.

Degree: Master, Communications Engineering, 2010, NSYSU

 In this thesis, we introduce a methodology to design and implement a Homeplug1.0 channel decoder that is completely conforming to Homeplug 1.0 specifications definedin HomePlug… (more)

Subjects/Keywords: Homeplug 1.0 specifications; Power-line Channel; Xilinx System Generator; Channel Decoder

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liu, J. (2010). Transmission Modeling and Channel Decoder Implementation Using FPGA for Homplug 1.0 Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-183033

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liu, Jia-Young. “Transmission Modeling and Channel Decoder Implementation Using FPGA for Homplug 1.0 Systems.” 2010. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-183033.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liu, Jia-Young. “Transmission Modeling and Channel Decoder Implementation Using FPGA for Homplug 1.0 Systems.” 2010. Web. 21 Aug 2019.

Vancouver:

Liu J. Transmission Modeling and Channel Decoder Implementation Using FPGA for Homplug 1.0 Systems. [Internet] [Thesis]. NSYSU; 2010. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-183033.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liu J. Transmission Modeling and Channel Decoder Implementation Using FPGA for Homplug 1.0 Systems. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901110-183033

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

7. Li, Yu-Shan. Low-power Instruction Mode Adjustment for 3-D Graphics Processing Unit.

Degree: Master, Computer Science and Engineering, 2014, NSYSU

 With the rapid development of electronic products, portable electronic products have become the mainstream trend of 3C age. To satisfy high output quality of 3-D… (more)

Subjects/Keywords: 3-D Graphics Processing Unit; Multi-precision Arithmetic Units; Low-power Design; Instruction Mode Adjustment

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, Y. (2014). Low-power Instruction Mode Adjustment for 3-D Graphics Processing Unit. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707114-134411

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Yu-Shan. “Low-power Instruction Mode Adjustment for 3-D Graphics Processing Unit.” 2014. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707114-134411.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Yu-Shan. “Low-power Instruction Mode Adjustment for 3-D Graphics Processing Unit.” 2014. Web. 21 Aug 2019.

Vancouver:

Li Y. Low-power Instruction Mode Adjustment for 3-D Graphics Processing Unit. [Internet] [Thesis]. NSYSU; 2014. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707114-134411.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li Y. Low-power Instruction Mode Adjustment for 3-D Graphics Processing Unit. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0707114-134411

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

8. Lin, Bo-ting. Low-power Multi-precision Functional Unit Generator for 3-D Graphics Application.

Degree: Master, Computer Science and Engineering, 2014, NSYSU

 A multi-precision function interpolator generator and a multi-precision MAF generator, which is compliant in with the IEEE-754 single precision floating point standard, is proposed in… (more)

Subjects/Keywords: multi-mode floating point multiply-add-fused; low power; generator; multi-precision function interpolator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, B. (2014). Low-power Multi-precision Functional Unit Generator for 3-D Graphics Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716114-030526

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Bo-ting. “Low-power Multi-precision Functional Unit Generator for 3-D Graphics Application.” 2014. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716114-030526.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Bo-ting. “Low-power Multi-precision Functional Unit Generator for 3-D Graphics Application.” 2014. Web. 21 Aug 2019.

Vancouver:

Lin B. Low-power Multi-precision Functional Unit Generator for 3-D Graphics Application. [Internet] [Thesis]. NSYSU; 2014. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716114-030526.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin B. Low-power Multi-precision Functional Unit Generator for 3-D Graphics Application. [Thesis]. NSYSU; 2014. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716114-030526

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

9. Li, Jia-Ying. Design, Implementation, and Analysis of a Multi-Precision Rasterizer for 3D Graphics Application.

Degree: Master, Computer Science and Engineering, 2016, NSYSU

 With the development of 3D graphics technology, the required computations for processing graphics has become increasingly complex to allow users to enjoy the better image… (more)

Subjects/Keywords: Special Function Unit; Scheduling; Rasterizer; Low-power Design; Multi-precision Mode; 3D Graphics Processing Unit

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Li, J. (2016). Design, Implementation, and Analysis of a Multi-Precision Rasterizer for 3D Graphics Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-205144

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Li, Jia-Ying. “Design, Implementation, and Analysis of a Multi-Precision Rasterizer for 3D Graphics Application.” 2016. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-205144.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Li, Jia-Ying. “Design, Implementation, and Analysis of a Multi-Precision Rasterizer for 3D Graphics Application.” 2016. Web. 21 Aug 2019.

Vancouver:

Li J. Design, Implementation, and Analysis of a Multi-Precision Rasterizer for 3D Graphics Application. [Internet] [Thesis]. NSYSU; 2016. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-205144.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Li J. Design, Implementation, and Analysis of a Multi-Precision Rasterizer for 3D Graphics Application. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0708116-205144

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

10. Lin, Meng-Shun. Integration and Verification of 3D Graphics System with DVFS and Multi-precision Technique.

Degree: Master, Computer Science and Engineering, 2016, NSYSU

 Nowadays, mobile devices such as smart phone, tablet and laptop have been indispensable in peopleâs daily lives. With the rapid development of technology and for… (more)

Subjects/Keywords: 3D Graphics System; Power Management; Multi-precision; Dynamic Voltage and Frequency Scaling; System on Chip; Virtual Platform

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, M. (2016). Integration and Verification of 3D Graphics System with DVFS and Multi-precision Technique. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709116-150213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Meng-Shun. “Integration and Verification of 3D Graphics System with DVFS and Multi-precision Technique.” 2016. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709116-150213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Meng-Shun. “Integration and Verification of 3D Graphics System with DVFS and Multi-precision Technique.” 2016. Web. 21 Aug 2019.

Vancouver:

Lin M. Integration and Verification of 3D Graphics System with DVFS and Multi-precision Technique. [Internet] [Thesis]. NSYSU; 2016. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709116-150213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin M. Integration and Verification of 3D Graphics System with DVFS and Multi-precision Technique. [Thesis]. NSYSU; 2016. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0709116-150213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

11. Sun, Wei-Cheng. Transmission Modeling with Simulink and FPGA implementation of 3072-point FFT for the Homeplug AV system.

Degree: Master, Communications Engineering, 2011, NSYSU

 The rapid growth of communication technology with the success of internet, has brought huge profits and great convenience to our daily life. Computer networks can… (more)

Subjects/Keywords: MATLAB/Simulink; Homeplug AV; Xilinx System Generator; 3072-point FFT processor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Sun, W. (2011). Transmission Modeling with Simulink and FPGA implementation of 3072-point FFT for the Homeplug AV system. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720111-191656

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Sun, Wei-Cheng. “Transmission Modeling with Simulink and FPGA implementation of 3072-point FFT for the Homeplug AV system.” 2011. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720111-191656.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Sun, Wei-Cheng. “Transmission Modeling with Simulink and FPGA implementation of 3072-point FFT for the Homeplug AV system.” 2011. Web. 21 Aug 2019.

Vancouver:

Sun W. Transmission Modeling with Simulink and FPGA implementation of 3072-point FFT for the Homeplug AV system. [Internet] [Thesis]. NSYSU; 2011. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720111-191656.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Sun W. Transmission Modeling with Simulink and FPGA implementation of 3072-point FFT for the Homeplug AV system. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720111-191656

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

12. Liang, Chih-Yuan. Low-Power Viterbi Decoder with Fine-Grained Detection Techniques.

Degree: PhD, Computer Science and Engineering, 2017, NSYSU

 Viterbi decoders are one of the most popular error-correcting channel decoders in wireless communication devices. However, a Viterbi decoder is also usually the dominant module… (more)

Subjects/Keywords: error correction; Viterbi decoder; STC code; error detection; low power

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liang, C. (2017). Low-Power Viterbi Decoder with Fine-Grained Detection Techniques. (Doctoral Dissertation). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720117-181011

Chicago Manual of Style (16th Edition):

Liang, Chih-Yuan. “Low-Power Viterbi Decoder with Fine-Grained Detection Techniques.” 2017. Doctoral Dissertation, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720117-181011.

MLA Handbook (7th Edition):

Liang, Chih-Yuan. “Low-Power Viterbi Decoder with Fine-Grained Detection Techniques.” 2017. Web. 21 Aug 2019.

Vancouver:

Liang C. Low-Power Viterbi Decoder with Fine-Grained Detection Techniques. [Internet] [Doctoral dissertation]. NSYSU; 2017. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720117-181011.

Council of Science Editors:

Liang C. Low-Power Viterbi Decoder with Fine-Grained Detection Techniques. [Doctoral Dissertation]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0720117-181011


NSYSU

13. Chang, Cheng-Hao. Design and Implementation of Fast Guided Filter Hardware Architecture for Underwater Image Dehazing.

Degree: Master, Computer Science and Engineering, 2017, NSYSU

 In an underwater environment, we canât get a clear image because the image is affected by suspended solids. Moreover, the absorption and scattering of light… (more)

Subjects/Keywords: Underwater Image Dehazing; Dark Channel Prior; Fast Guided Filter

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chang, C. (2017). Design and Implementation of Fast Guided Filter Hardware Architecture for Underwater Image Dehazing. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0721117-161609

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Cheng-Hao. “Design and Implementation of Fast Guided Filter Hardware Architecture for Underwater Image Dehazing.” 2017. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0721117-161609.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Cheng-Hao. “Design and Implementation of Fast Guided Filter Hardware Architecture for Underwater Image Dehazing.” 2017. Web. 21 Aug 2019.

Vancouver:

Chang C. Design and Implementation of Fast Guided Filter Hardware Architecture for Underwater Image Dehazing. [Internet] [Thesis]. NSYSU; 2017. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0721117-161609.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang C. Design and Implementation of Fast Guided Filter Hardware Architecture for Underwater Image Dehazing. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0721117-161609

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

14. Jheng, Hao-Yi. An Adaptive Proportional-Integral Controller for Power Management of 3D Graphics System-On-Chip.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 In the past few years, due to the rapid advance in technology and the aid of 3D graphics applications the world of 3D graphics is… (more)

Subjects/Keywords: proportional control; dynamic voltage scaling; Power management; 3D graphics; Integral control

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Jheng, H. (2009). An Adaptive Proportional-Integral Controller for Power Management of 3D Graphics System-On-Chip. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731109-121154

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Jheng, Hao-Yi. “An Adaptive Proportional-Integral Controller for Power Management of 3D Graphics System-On-Chip.” 2009. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731109-121154.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Jheng, Hao-Yi. “An Adaptive Proportional-Integral Controller for Power Management of 3D Graphics System-On-Chip.” 2009. Web. 21 Aug 2019.

Vancouver:

Jheng H. An Adaptive Proportional-Integral Controller for Power Management of 3D Graphics System-On-Chip. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731109-121154.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Jheng H. An Adaptive Proportional-Integral Controller for Power Management of 3D Graphics System-On-Chip. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0731109-121154

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

15. Chou, Hung-I. System level power estimation for power manageable System-on-chip.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 The modern handheld devices have become smaller and more complex nowadays. However, the requirements for its performance and functions have also become higher, which means… (more)

Subjects/Keywords: power management; low-power; framework; power estimation; SystemC; system level

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chou, H. (2009). System level power estimation for power manageable System-on-chip. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805109-102151

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chou, Hung-I. “System level power estimation for power manageable System-on-chip.” 2009. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805109-102151.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chou, Hung-I. “System level power estimation for power manageable System-on-chip.” 2009. Web. 21 Aug 2019.

Vancouver:

Chou H. System level power estimation for power manageable System-on-chip. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805109-102151.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chou H. System level power estimation for power manageable System-on-chip. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0805109-102151

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

16. Lin, Keng-Hsien. Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 In computer graphics technique, the 3D graphic pipeline flow has two processing modules: Geometry module and Rendering module. The geometry module supports vertex coordinate transformation,… (more)

Subjects/Keywords: Clipping algorithm; 3D graphics; Vertex Shader; OpenGL-ES

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, K. (2009). Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-024820

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Keng-Hsien. “Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems.” 2009. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-024820.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Keng-Hsien. “Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems.” 2009. Web. 21 Aug 2019.

Vancouver:

Lin K. Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-024820.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin K. Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-024820

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

17. Chen, Kun-Chih. Design and Analysis of Table-based Arithmetic Units with Memory Reduction.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 In many digital signal processing applications, we often need some special function units which can compute complicated arithmetic functions such as reciprocal and logarithm. Conventionally,… (more)

Subjects/Keywords: Newton-Raphson; Computer arithmetic; polynomial approximation; Non-uniform segmentation; Function approximation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, K. (2009). Design and Analysis of Table-based Arithmetic Units with Memory Reduction. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-041048

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Kun-Chih. “Design and Analysis of Table-based Arithmetic Units with Memory Reduction.” 2009. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-041048.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Kun-Chih. “Design and Analysis of Table-based Arithmetic Units with Memory Reduction.” 2009. Web. 21 Aug 2019.

Vancouver:

Chen K. Design and Analysis of Table-based Arithmetic Units with Memory Reduction. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-041048.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen K. Design and Analysis of Table-based Arithmetic Units with Memory Reduction. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-041048

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

18. Huang, Kuan-min. Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 3D graphics pipeline can be divided into two subsystems: geometry subsystem and rendering subsystem. Hardware implementation of the transformation and lighting in the geometric subsystem… (more)

Subjects/Keywords: Vertex Shader; SIMD; Programmable

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, K. (2009). Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Kuan-min. “Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader.” 2009. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Kuan-min. “Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader.” 2009. Web. 21 Aug 2019.

Vancouver:

Huang K. Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang K. Design, Implementation, And Verification Of A Programmable Floating- And Fixed-Point Vertex Shader. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043304

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

19. Cheng, Yen-Chun. Table-Based Design of Arithmetic Function Units for Angle Rotation and Rectangular-to-Polar-Coordinate Conversion.

Degree: Master, Computer Science and Engineering, 2009, NSYSU

 In this thesis, an efficiency method for reducing the rotation ROM size in table-based architecture is proposed. The original rotation can be divided into two… (more)

Subjects/Keywords: interpolation; CORDIC; Newton-Raphson; piecewise; Taylor-series expansion

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cheng, Y. (2009). Table-Based Design of Arithmetic Function Units for Angle Rotation and Rectangular-to-Polar-Coordinate Conversion. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043220

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cheng, Yen-Chun. “Table-Based Design of Arithmetic Function Units for Angle Rotation and Rectangular-to-Polar-Coordinate Conversion.” 2009. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043220.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cheng, Yen-Chun. “Table-Based Design of Arithmetic Function Units for Angle Rotation and Rectangular-to-Polar-Coordinate Conversion.” 2009. Web. 21 Aug 2019.

Vancouver:

Cheng Y. Table-Based Design of Arithmetic Function Units for Angle Rotation and Rectangular-to-Polar-Coordinate Conversion. [Internet] [Thesis]. NSYSU; 2009. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043220.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cheng Y. Table-Based Design of Arithmetic Function Units for Angle Rotation and Rectangular-to-Polar-Coordinate Conversion. [Thesis]. NSYSU; 2009. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0901109-043220

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

20. Guo, Cang-yuan. Multiple Precision Iterative Floating-Point Multiplier for Low-Power Applications.

Degree: Master, Computer Science and Engineering, 2010, NSYSU

 In many multimedia applications, a little error in the output results is allowable. Therefore, this thesis presents an iterative floating-point multiplier with multiple precision to… (more)

Subjects/Keywords: multiple precision; multiplier; iterative; Low power

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Guo, C. (2010). Multiple Precision Iterative Floating-Point Multiplier for Low-Power Applications. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0203110-215114

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Guo, Cang-yuan. “Multiple Precision Iterative Floating-Point Multiplier for Low-Power Applications.” 2010. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0203110-215114.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Guo, Cang-yuan. “Multiple Precision Iterative Floating-Point Multiplier for Low-Power Applications.” 2010. Web. 21 Aug 2019.

Vancouver:

Guo C. Multiple Precision Iterative Floating-Point Multiplier for Low-Power Applications. [Internet] [Thesis]. NSYSU; 2010. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0203110-215114.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Guo C. Multiple Precision Iterative Floating-Point Multiplier for Low-Power Applications. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0203110-215114

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

21. Chang, Kai-cheng. High-performance Low-power Configurable Montgomery Multiplier for RSA Cryptosystems.

Degree: Master, Computer Science and Engineering, 2010, NSYSU

 The communication technology is changing rapidly every day, and the internet has played a very important role in our lives. Through specific protocols, people transform… (more)

Subjects/Keywords: Modular Exponentiation Algorithm; RSA Cryptosystems; Montgomery Modular Multiplier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chang, K. (2010). High-performance Low-power Configurable Montgomery Multiplier for RSA Cryptosystems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-151148

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang, Kai-cheng. “High-performance Low-power Configurable Montgomery Multiplier for RSA Cryptosystems.” 2010. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-151148.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang, Kai-cheng. “High-performance Low-power Configurable Montgomery Multiplier for RSA Cryptosystems.” 2010. Web. 21 Aug 2019.

Vancouver:

Chang K. High-performance Low-power Configurable Montgomery Multiplier for RSA Cryptosystems. [Internet] [Thesis]. NSYSU; 2010. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-151148.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang K. High-performance Low-power Configurable Montgomery Multiplier for RSA Cryptosystems. [Thesis]. NSYSU; 2010. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0803110-151148

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

22. Chi, Wei-Chung. Low-power Precision Assignment for Special Function Instructions of 3-D Graphics Processing Units.

Degree: Master, Computer Science and Engineering, 2013, NSYSU

 Today COMS process and 3-D graphics technology are quickly developed, and 3-D graphics processing units (3-D GPU) have already been used in the handheld devices.… (more)

Subjects/Keywords: affine arithmetic error model; low power; multi-precision function interpolator; 3-D graphics processing units; tabu search; instruction precision assignment

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chi, W. (2013). Low-power Precision Assignment for Special Function Instructions of 3-D Graphics Processing Units. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-135539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chi, Wei-Chung. “Low-power Precision Assignment for Special Function Instructions of 3-D Graphics Processing Units.” 2013. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-135539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chi, Wei-Chung. “Low-power Precision Assignment for Special Function Instructions of 3-D Graphics Processing Units.” 2013. Web. 21 Aug 2019.

Vancouver:

Chi W. Low-power Precision Assignment for Special Function Instructions of 3-D Graphics Processing Units. [Internet] [Thesis]. NSYSU; 2013. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-135539.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chi W. Low-power Precision Assignment for Special Function Instructions of 3-D Graphics Processing Units. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0712113-135539

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

23. Liao, Yi-Jwu. High-Performance Hardware Architecture of Montgomery Point Multiplication Algorithm for Elliptic Curve Cryptosystem.

Degree: Master, Computer Science and Engineering, 2013, NSYSU

 The public key cryptosystem (asymmetric cryptography system) is an agreement in cryptography, and RSA (Rivest - Shamir - Adleman) and elliptic curve cryptography (ECC) are… (more)

Subjects/Keywords: digit-serial multiplier; irreducible polynomial; polynomial basis; Montgomery Point Multiplication Algorithm; Elliptic Curve Cryptosystem; ASIC design; VLSI; finite field multiplier; loop folding; loop chaining

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Liao, Y. (2013). High-Performance Hardware Architecture of Montgomery Point Multiplication Algorithm for Elliptic Curve Cryptosystem. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715113-130236

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Yi-Jwu. “High-Performance Hardware Architecture of Montgomery Point Multiplication Algorithm for Elliptic Curve Cryptosystem.” 2013. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715113-130236.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Yi-Jwu. “High-Performance Hardware Architecture of Montgomery Point Multiplication Algorithm for Elliptic Curve Cryptosystem.” 2013. Web. 21 Aug 2019.

Vancouver:

Liao Y. High-Performance Hardware Architecture of Montgomery Point Multiplication Algorithm for Elliptic Curve Cryptosystem. [Internet] [Thesis]. NSYSU; 2013. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715113-130236.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao Y. High-Performance Hardware Architecture of Montgomery Point Multiplication Algorithm for Elliptic Curve Cryptosystem. [Thesis]. NSYSU; 2013. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715113-130236

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

24. Cheng, Chien-Kang. Multi-precision Function Interpolator for Multimedia Applications.

Degree: Master, Computer Science and Engineering, 2012, NSYSU

 A multi-precision function interpolator, which is fitted in with the IEEE-754 single precision floating point standard, is proposed in this paper. It provides logarithms, exponentials,… (more)

Subjects/Keywords: minimax approximation; multi-precision function interpolator; look-up table; clock gating; low power

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Cheng, C. (2012). Multi-precision Function Interpolator for Multimedia Applications. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-112632

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Cheng, Chien-Kang. “Multi-precision Function Interpolator for Multimedia Applications.” 2012. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-112632.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Cheng, Chien-Kang. “Multi-precision Function Interpolator for Multimedia Applications.” 2012. Web. 21 Aug 2019.

Vancouver:

Cheng C. Multi-precision Function Interpolator for Multimedia Applications. [Internet] [Thesis]. NSYSU; 2012. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-112632.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Cheng C. Multi-precision Function Interpolator for Multimedia Applications. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-112632

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

25. Chen, Chia-Wen. Energy-Efficient Multiple-Word Montgomery Modular Multiplier.

Degree: Master, Computer Science and Engineering, 2012, NSYSU

 Nowadays, Internet plays an indispensable role in human lives. People use Internet to search information, transmit data, download ?le, and so on. The data transformed… (more)

Subjects/Keywords: Multiple-Word Radix-2 Montgomery Algorithm; Low-Power; Energy-Efficient; RSA Cryptosystems; Montgomeryâs Algorithm

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, C. (2012). Energy-Efficient Multiple-Word Montgomery Modular Multiplier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-103944

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Chia-Wen. “Energy-Efficient Multiple-Word Montgomery Modular Multiplier.” 2012. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-103944.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Chia-Wen. “Energy-Efficient Multiple-Word Montgomery Modular Multiplier.” 2012. Web. 21 Aug 2019.

Vancouver:

Chen C. Energy-Efficient Multiple-Word Montgomery Modular Multiplier. [Internet] [Thesis]. NSYSU; 2012. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-103944.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen C. Energy-Efficient Multiple-Word Montgomery Modular Multiplier. [Thesis]. NSYSU; 2012. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-103944

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

26. Hsu, Wei-Chiang. High Speed Scalar Multiplication Architecture for Elliptic Curve Cryptosystem.

Degree: Master, Computer Science and Engineering, 2011, NSYSU

 An important advantage of Elliptic Curve Cryptosystem (ECC) is the shorter key length in public key cryptographic systems. It can provide adequate security when the… (more)

Subjects/Keywords: Elliptic Curve Cryptosystem; Polynomial Basis; Irreducible Polynomial; Montgomery Scalar Multiplication; Finite Field

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, W. (2011). High Speed Scalar Multiplication Architecture for Elliptic Curve Cryptosystem. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728111-165403

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Wei-Chiang. “High Speed Scalar Multiplication Architecture for Elliptic Curve Cryptosystem.” 2011. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728111-165403.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Wei-Chiang. “High Speed Scalar Multiplication Architecture for Elliptic Curve Cryptosystem.” 2011. Web. 21 Aug 2019.

Vancouver:

Hsu W. High Speed Scalar Multiplication Architecture for Elliptic Curve Cryptosystem. [Internet] [Thesis]. NSYSU; 2011. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728111-165403.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu W. High Speed Scalar Multiplication Architecture for Elliptic Curve Cryptosystem. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0728111-165403

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

27. Hsu, Huan-Wei. High-performance Low-power Montgomery Modular Multiplier for RSA Cryptosystems.

Degree: Master, Computer Science and Engineering, 2011, NSYSU

 The explosive growth in the data communications industry has positioned the internet to hold very important roles in our lives. Sending or receiving data on… (more)

Subjects/Keywords: Modular Exponentiation Algorithm; RSA Cryptosystems; Montgomery Modular Multiplier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, H. (2011). High-performance Low-power Montgomery Modular Multiplier for RSA Cryptosystems. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729111-140615

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Huan-Wei. “High-performance Low-power Montgomery Modular Multiplier for RSA Cryptosystems.” 2011. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729111-140615.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Huan-Wei. “High-performance Low-power Montgomery Modular Multiplier for RSA Cryptosystems.” 2011. Web. 21 Aug 2019.

Vancouver:

Hsu H. High-performance Low-power Montgomery Modular Multiplier for RSA Cryptosystems. [Internet] [Thesis]. NSYSU; 2011. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729111-140615.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu H. High-performance Low-power Montgomery Modular Multiplier for RSA Cryptosystems. [Thesis]. NSYSU; 2011. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729111-140615

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

28. Chen, Chun-Chi. A Generalized Design Method for High-radix Word-based Montgomery Modular Multipliers.

Degree: Master, Computer Science and Engineering, 2015, NSYSU

 With the rapid development of the Internet, human can not live without the Internet today.Moreover,the trading behavior through the Internet is more frequently. Therefore,much attention… (more)

Subjects/Keywords: Montgomery Modular Multiplier; RSA Cryptosystems; Public-key Cryptosystems; High-radix Word-based Montgomery Modular Multiplier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, C. (2015). A Generalized Design Method for High-radix Word-based Montgomery Modular Multipliers. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-155954

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Chun-Chi. “A Generalized Design Method for High-radix Word-based Montgomery Modular Multipliers.” 2015. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-155954.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Chun-Chi. “A Generalized Design Method for High-radix Word-based Montgomery Modular Multipliers.” 2015. Web. 21 Aug 2019.

Vancouver:

Chen C. A Generalized Design Method for High-radix Word-based Montgomery Modular Multipliers. [Internet] [Thesis]. NSYSU; 2015. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-155954.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen C. A Generalized Design Method for High-radix Word-based Montgomery Modular Multipliers. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-155954

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

29. Hsu, Li-wei. A Variable-precision Architecture for Special Function and Floating-point Multiply-add-fused Operation.

Degree: Master, Computer Science and Engineering, 2015, NSYSU

 This thesis presents a variable-precision floating-point arithmetic unit based on IEEE-754 single precision floating standard. This arithmetic unit combines special function interpolator and floating-point multiply-add-fused.… (more)

Subjects/Keywords: A Variable-precision floating point multiply-add-fused; low power; A Variable-precision function interpolator

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, L. (2015). A Variable-precision Architecture for Special Function and Floating-point Multiply-add-fused Operation. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-162031

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Li-wei. “A Variable-precision Architecture for Special Function and Floating-point Multiply-add-fused Operation.” 2015. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-162031.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Li-wei. “A Variable-precision Architecture for Special Function and Floating-point Multiply-add-fused Operation.” 2015. Web. 21 Aug 2019.

Vancouver:

Hsu L. A Variable-precision Architecture for Special Function and Floating-point Multiply-add-fused Operation. [Internet] [Thesis]. NSYSU; 2015. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-162031.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu L. A Variable-precision Architecture for Special Function and Floating-point Multiply-add-fused Operation. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0630115-162031

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

30. Huang, I-Chang. Hardware Architecture of Dehazing System for Enhancing Underwater Image with/without Extreme Contrast.

Degree: Master, Computer Science and Engineering, 2018, NSYSU

 The impurity in the water affects the clarity of underwater images, leading to great limitations on the application of underwater images in visual analysis and… (more)

Subjects/Keywords: Dark Channel Prior; Low Contrast; Fast Guided Filter; Enhancing Image; Underwater Image Dehazing; Extreme Contrast; VLSI Hardware Implementation

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Huang, I. (2018). Hardware Architecture of Dehazing System for Enhancing Underwater Image with/without Extreme Contrast. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715118-124339

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, I-Chang. “Hardware Architecture of Dehazing System for Enhancing Underwater Image with/without Extreme Contrast.” 2018. Thesis, NSYSU. Accessed August 21, 2019. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715118-124339.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, I-Chang. “Hardware Architecture of Dehazing System for Enhancing Underwater Image with/without Extreme Contrast.” 2018. Web. 21 Aug 2019.

Vancouver:

Huang I. Hardware Architecture of Dehazing System for Enhancing Underwater Image with/without Extreme Contrast. [Internet] [Thesis]. NSYSU; 2018. [cited 2019 Aug 21]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715118-124339.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang I. Hardware Architecture of Dehazing System for Enhancing Underwater Image with/without Extreme Contrast. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715118-124339

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

[1] [2]

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