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You searched for +publisher:"NSYSU" +contributor:("Jinn-Shyan Wang"). Showing records 1 – 24 of 24 total matches.

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NSYSU

1. Lu, Dai-Rong. Novel Vertical Transistor with N-channel and Isolation Oxide for 1T-DRAM Application.

Degree: Master, Electrical Engineering, 2015, NSYSU

 In this thesis, we propose vertical transistor with n-channel and isolation oxide(NCIOVT) 1T-DRAM and vertical transistor with n-channel and trench(NCTVT) 1T-DRAM with ultra-thin body structure… (more)

Subjects/Keywords: junctionless channel; floating-body effect; isolation oxide; vertical transistor; ultra-thin body; 1T-DRAM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lu, D. (2015). Novel Vertical Transistor with N-channel and Isolation Oxide for 1T-DRAM Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706115-093828

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lu, Dai-Rong. “Novel Vertical Transistor with N-channel and Isolation Oxide for 1T-DRAM Application.” 2015. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706115-093828.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lu, Dai-Rong. “Novel Vertical Transistor with N-channel and Isolation Oxide for 1T-DRAM Application.” 2015. Web. 02 Dec 2020.

Vancouver:

Lu D. Novel Vertical Transistor with N-channel and Isolation Oxide for 1T-DRAM Application. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706115-093828.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lu D. Novel Vertical Transistor with N-channel and Isolation Oxide for 1T-DRAM Application. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0706115-093828

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

2. Huang, Tzu-Hao. A New Interdigitated Nanopillar HIT Solar Cell by Using Silicon-Carbide-Based Window Layer.

Degree: Master, Electrical Engineering, 2015, NSYSU

 In this paper, a New Interdigitated Nanopillar HIT Solar Cells using Silicon-Carbide-based window layer (INSC-HIT) was proposed. By using Silvaco TCAD simulation, we demonstrated that… (more)

Subjects/Keywords: Nanopillar; Parasitic absorption loss; Heterojunction; Window layer; Silicon carbide

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APA (6th Edition):

Huang, T. (2015). A New Interdigitated Nanopillar HIT Solar Cell by Using Silicon-Carbide-Based Window Layer. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-004537

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Huang, Tzu-Hao. “A New Interdigitated Nanopillar HIT Solar Cell by Using Silicon-Carbide-Based Window Layer.” 2015. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-004537.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Huang, Tzu-Hao. “A New Interdigitated Nanopillar HIT Solar Cell by Using Silicon-Carbide-Based Window Layer.” 2015. Web. 02 Dec 2020.

Vancouver:

Huang T. A New Interdigitated Nanopillar HIT Solar Cell by Using Silicon-Carbide-Based Window Layer. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-004537.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Huang T. A New Interdigitated Nanopillar HIT Solar Cell by Using Silicon-Carbide-Based Window Layer. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-004537

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

3. Wang, Yu-Chun. Two Novel Capacitorless One-Transistor DRAMs with Multi-Gate and Nano-Pillar Structures.

Degree: Master, Electrical Engineering, 2015, NSYSU

 In this thesis, we propose two novel capacitorless 1T-DRAMs, with the multi-gate and nano-pillar structures : The first type is a double-gate Nanowire TFT, with… (more)

Subjects/Keywords: Nano-Pillar; Double-Gate Nanowire TFT; GIDL Mechanism; Capacitorless 1T-DRAM; Vertical Current Bridge MOSFET; Multi-Gate

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APA (6th Edition):

Wang, Y. (2015). Two Novel Capacitorless One-Transistor DRAMs with Multi-Gate and Nano-Pillar Structures. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-094440

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Yu-Chun. “Two Novel Capacitorless One-Transistor DRAMs with Multi-Gate and Nano-Pillar Structures.” 2015. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-094440.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Yu-Chun. “Two Novel Capacitorless One-Transistor DRAMs with Multi-Gate and Nano-Pillar Structures.” 2015. Web. 02 Dec 2020.

Vancouver:

Wang Y. Two Novel Capacitorless One-Transistor DRAMs with Multi-Gate and Nano-Pillar Structures. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-094440.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang Y. Two Novel Capacitorless One-Transistor DRAMs with Multi-Gate and Nano-Pillar Structures. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-094440

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

4. Lin, Yong-Huang. An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application.

Degree: Master, Electrical Engineering, 2015, NSYSU

 The aim of this thesis is to develop a PMOS-like NMOS for use in an ultra-low power high speed all-NMOS unipolar CMOS circuits and systems… (more)

Subjects/Keywords: share-terminal output; propagation delay time; CMOS; Unipolar CMOS; punch-through effect; figure of merit

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APA (6th Edition):

Lin, Y. (2015). An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-120006

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Yong-Huang. “An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application.” 2015. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-120006.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Yong-Huang. “An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application.” 2015. Web. 02 Dec 2020.

Vancouver:

Lin Y. An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application. [Internet] [Thesis]. NSYSU; 2015. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-120006.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin Y. An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application. [Thesis]. NSYSU; 2015. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0704115-120006

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

5. Yu, Cyuan-You. Vertical Transistor with N-Bridge and Body on Gate for Low-Power 1T-DRAM Application.

Degree: Master, Electrical Engineering, 2017, NSYSU

 In this thesis, we use Sentaurus TCAD 12.0 software tool to design memory device. We proposed the Vertical Transistor with N-Bridge and Body on Gate… (more)

Subjects/Keywords: Isolation Oxide Layer; Electron Bridge Transistor; Programming Window; Data Retention Time; Junctionless Transistor; Capacitorless DRAM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yu, C. (2017). Vertical Transistor with N-Bridge and Body on Gate for Low-Power 1T-DRAM Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-175351

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yu, Cyuan-You. “Vertical Transistor with N-Bridge and Body on Gate for Low-Power 1T-DRAM Application.” 2017. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-175351.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yu, Cyuan-You. “Vertical Transistor with N-Bridge and Body on Gate for Low-Power 1T-DRAM Application.” 2017. Web. 02 Dec 2020.

Vancouver:

Yu C. Vertical Transistor with N-Bridge and Body on Gate for Low-Power 1T-DRAM Application. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-175351.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yu C. Vertical Transistor with N-Bridge and Body on Gate for Low-Power 1T-DRAM Application. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-175351

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

6. Lin, Chih-chia. Two Doping Less Bridge Single-Transistor DRAMs for Low-Power Supply and High-Speed Application.

Degree: Master, Electrical Engineering, 2017, NSYSU

 In this thesis, we propose two architectures of Single-Transistor Dynamic Random Access Memory (1T-DRAM) using dopingless bridge. This is also the first time using the… (more)

Subjects/Keywords: Low Power Supply; Fast Operation; Vertical Device; 1T-DRAM; Dopingless Bridge; Raised Body Structure

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APA (6th Edition):

Lin, C. (2017). Two Doping Less Bridge Single-Transistor DRAMs for Low-Power Supply and High-Speed Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715117-151732

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Chih-chia. “Two Doping Less Bridge Single-Transistor DRAMs for Low-Power Supply and High-Speed Application.” 2017. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715117-151732.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Chih-chia. “Two Doping Less Bridge Single-Transistor DRAMs for Low-Power Supply and High-Speed Application.” 2017. Web. 02 Dec 2020.

Vancouver:

Lin C. Two Doping Less Bridge Single-Transistor DRAMs for Low-Power Supply and High-Speed Application. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715117-151732.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin C. Two Doping Less Bridge Single-Transistor DRAMs for Low-Power Supply and High-Speed Application. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0715117-151732

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

7. Hsu, Ting-pi. Vertical Channel Non-Classical CMOS with Low Power Dissipation and High Integration Density.

Degree: Master, Electrical Engineering, 2017, NSYSU

 In this thesis, we propose a vertical channel non-classical CMOS (VNCCMOS) with low power dissipation and high integration density. Junctionless transistor and punch through transistor… (more)

Subjects/Keywords: CMOS; punch through transistor; junctionless transistor; high integration density; low power dissipation; vertical channel

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Hsu, T. (2017). Vertical Channel Non-Classical CMOS with Low Power Dissipation and High Integration Density. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716117-154234

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Hsu, Ting-pi. “Vertical Channel Non-Classical CMOS with Low Power Dissipation and High Integration Density.” 2017. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716117-154234.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Hsu, Ting-pi. “Vertical Channel Non-Classical CMOS with Low Power Dissipation and High Integration Density.” 2017. Web. 02 Dec 2020.

Vancouver:

Hsu T. Vertical Channel Non-Classical CMOS with Low Power Dissipation and High Integration Density. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716117-154234.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Hsu T. Vertical Channel Non-Classical CMOS with Low Power Dissipation and High Integration Density. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716117-154234

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

8. Lai, Jing-Hau. Low Power Non-Classical Recessed-Gate CMOS Inverter with Unique Shared Contact.

Degree: Master, Electrical Engineering, 2017, NSYSU

 This thesis presents a non-classical recessed-gate CMOS inverter with unique shared contact and low power supply applications, which called recessed-gate unique-shared CMOS (RUCMOS). We design… (more)

Subjects/Keywords: Low power supply; Power dissipation; Recessed gate; CMOS; Punch through

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APA (6th Edition):

Lai, J. (2017). Low Power Non-Classical Recessed-Gate CMOS Inverter with Unique Shared Contact. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-143503

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lai, Jing-Hau. “Low Power Non-Classical Recessed-Gate CMOS Inverter with Unique Shared Contact.” 2017. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-143503.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lai, Jing-Hau. “Low Power Non-Classical Recessed-Gate CMOS Inverter with Unique Shared Contact.” 2017. Web. 02 Dec 2020.

Vancouver:

Lai J. Low Power Non-Classical Recessed-Gate CMOS Inverter with Unique Shared Contact. [Internet] [Thesis]. NSYSU; 2017. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-143503.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lai J. Low Power Non-Classical Recessed-Gate CMOS Inverter with Unique Shared Contact. [Thesis]. NSYSU; 2017. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718117-143503

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

9. Yeh, Chih-Ting. Characteristics of Gated-PN iTFETs with Exploiting Induced Channel Layer.

Degree: Master, Institute Of Electrical Engineering, 2018, NSYSU

 In this thesis we proposed a new type Gated-PN iTFET whose source and gate overlap increases the line tunneling area and improve the on current.… (more)

Subjects/Keywords: subthreshold swing; trap-assisted tunneling effect; ambipolar effect; line tunneling; induced channel layer; ON/OFF current ratio

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Yeh, C. (2018). Characteristics of Gated-PN iTFETs with Exploiting Induced Channel Layer. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-110228

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yeh, Chih-Ting. “Characteristics of Gated-PN iTFETs with Exploiting Induced Channel Layer.” 2018. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-110228.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yeh, Chih-Ting. “Characteristics of Gated-PN iTFETs with Exploiting Induced Channel Layer.” 2018. Web. 02 Dec 2020.

Vancouver:

Yeh C. Characteristics of Gated-PN iTFETs with Exploiting Induced Channel Layer. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-110228.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yeh C. Characteristics of Gated-PN iTFETs with Exploiting Induced Channel Layer. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-110228

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

10. Chen, Yi-Jei. Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM.

Degree: Master, Institute Of Electrical Engineering, 2018, NSYSU

 In this thesis, we propose a Vertical double gate transistor with n-bridge DRAM (VN-DRAM) for low power applications. Unlike conventional current bridge architecture which has… (more)

Subjects/Keywords: Data Retention Time; Programming Window; n-bridge; Vertical Channel; 1T-DRAM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, Y. (2018). Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-102927

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yi-Jei. “Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM.” 2018. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-102927.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yi-Jei. “Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM.” 2018. Web. 02 Dec 2020.

Vancouver:

Chen Y. Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-102927.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-102927

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

11. Liao, Chi-Sheng. Body-Raised Punch Through CMOS for Low Power Supply Applications.

Degree: Master, Electrical Engineering, 2018, NSYSU

 In this thesis, we propose a punch through complementary metal oxide semiconductor (PTCMOS) with a raised body for suppressing diffusion current (BR-PTCMOS) in low power… (more)

Subjects/Keywords: low power dissipation; punch through transistor; power-delay product; CMOS; low power supply

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APA (6th Edition):

Liao, C. (2018). Body-Raised Punch Through CMOS for Low Power Supply Applications. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-160311

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Liao, Chi-Sheng. “Body-Raised Punch Through CMOS for Low Power Supply Applications.” 2018. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-160311.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Liao, Chi-Sheng. “Body-Raised Punch Through CMOS for Low Power Supply Applications.” 2018. Web. 02 Dec 2020.

Vancouver:

Liao C. Body-Raised Punch Through CMOS for Low Power Supply Applications. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-160311.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Liao C. Body-Raised Punch Through CMOS for Low Power Supply Applications. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0717118-160311

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

12. Lin, Hung-Hsiu. Doping-less 1T-DRAM With Schottky Contact and Raised Body For Low Power Application.

Degree: Master, Chinese Literature, 2018, NSYSU

 In this thesis, we propose a novel structure of Doping-less 1T-DRAM with raised body and Schottky contact S/D. As the device has not any physical… (more)

Subjects/Keywords: Raised Body; Schottky Source/Drain; Capacitorless; Doping-less; 1T-DRAM

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Lin, H. (2018). Doping-less 1T-DRAM With Schottky Contact and Raised Body For Low Power Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-163047

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lin, Hung-Hsiu. “Doping-less 1T-DRAM With Schottky Contact and Raised Body For Low Power Application.” 2018. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-163047.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lin, Hung-Hsiu. “Doping-less 1T-DRAM With Schottky Contact and Raised Body For Low Power Application.” 2018. Web. 02 Dec 2020.

Vancouver:

Lin H. Doping-less 1T-DRAM With Schottky Contact and Raised Body For Low Power Application. [Internet] [Thesis]. NSYSU; 2018. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-163047.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lin H. Doping-less 1T-DRAM With Schottky Contact and Raised Body For Low Power Application. [Thesis]. NSYSU; 2018. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0714118-163047

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

13. Tseng, Run-June. Circuit simulator program development of semiconductor physical and electrical behavior.

Degree: Master, Electrical Engineering, 2001, NSYSU

 ABSTRACT This thesis presents the equivalent circuit of basic semicondonductor equations, which are implemented as the device elements of circuit simulator: spice3. We use a… (more)

Subjects/Keywords: circuit simulator

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APA (6th Edition):

Tseng, R. (2001). Circuit simulator program development of semiconductor physical and electrical behavior. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Tseng, Run-June. “Circuit simulator program development of semiconductor physical and electrical behavior.” 2001. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Tseng, Run-June. “Circuit simulator program development of semiconductor physical and electrical behavior.” 2001. Web. 02 Dec 2020.

Vancouver:

Tseng R. Circuit simulator program development of semiconductor physical and electrical behavior. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Tseng R. Circuit simulator program development of semiconductor physical and electrical behavior. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-120213

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

14. Kuo, Huan-Chou. Three improved operational amplifiers with low power low voltage.

Degree: Master, Electrical Engineering, 2001, NSYSU

 Three improved operational amplifiers with low voltage and rail-to-rail constant are proposed. Two of the amplifiers are modified from the amplifier with a level shifting… (more)

Subjects/Keywords: low power low voltage; CMOS operational amplifier; rail-to-rail

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APA (6th Edition):

Kuo, H. (2001). Three improved operational amplifiers with low power low voltage. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Kuo, Huan-Chou. “Three improved operational amplifiers with low power low voltage.” 2001. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Kuo, Huan-Chou. “Three improved operational amplifiers with low power low voltage.” 2001. Web. 02 Dec 2020.

Vancouver:

Kuo H. Three improved operational amplifiers with low power low voltage. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Kuo H. Three improved operational amplifiers with low power low voltage. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0710101-184930

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

15. Chien, Yu. CMOS High-Q IF Active Bandpass Filter and Oscillator Design.

Degree: Master, Electrical Engineering, 2001, NSYSU

 A novel CMOS tunable bandpass filter and a novel voltage controlled oscillator are proposed. Both circuits are designed using the UMC 0.5μm CMOS process parameters.… (more)

Subjects/Keywords: CMOS; Oscillator; High-Q; Bandpass Filter

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APA (6th Edition):

Chien, Y. (2001). CMOS High-Q IF Active Bandpass Filter and Oscillator Design. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chien, Yu. “CMOS High-Q IF Active Bandpass Filter and Oscillator Design.” 2001. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chien, Yu. “CMOS High-Q IF Active Bandpass Filter and Oscillator Design.” 2001. Web. 02 Dec 2020.

Vancouver:

Chien Y. CMOS High-Q IF Active Bandpass Filter and Oscillator Design. [Internet] [Thesis]. NSYSU; 2001. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chien Y. CMOS High-Q IF Active Bandpass Filter and Oscillator Design. [Thesis]. NSYSU; 2001. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0716101-111219

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

16. Chen, Pain-Chin. High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology.

Degree: Master, Electrical Engineering, 2003, NSYSU

 In our thesis, we develop a modified fabrication method based on Ge condensation mechanism to fabricate SGOI (SiGe-on-insulator) Wafer. The advantages of this technique are… (more)

Subjects/Keywords: SGOI; Ge condensation

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APA (6th Edition):

Chen, P. (2003). High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Pain-Chin. “High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology.” 2003. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Pain-Chin. “High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology.” 2003. Web. 02 Dec 2020.

Vancouver:

Chen P. High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology. [Internet] [Thesis]. NSYSU; 2003. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen P. High quality SGOI (SiGe-On-Insulator) substrate preparation using Ge-Condensation technology. [Thesis]. NSYSU; 2003. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718103-085942

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

17. Yan, Zhi-Qing. Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET.

Degree: Master, Electrical Engineering, 2000, NSYSU

 In this thesisï¹ As-grown and H-treated polycrystalline diamond film Metal-Insulator-Semiconductor Field-Effect-Transistor on the p-type surface semiconductive layers of undoped hydrogen-terminated CVD diamond films were successfully… (more)

Subjects/Keywords: hydrogen-terminated; surface conductive layers; MISFET

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APA (6th Edition):

Yan, Z. (2000). Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yan, Zhi-Qing. “Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET.” 2000. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yan, Zhi-Qing. “Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET.” 2000. Web. 02 Dec 2020.

Vancouver:

Yan Z. Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yan Z. Fabrication and Characterization of the Polycrystalline-Diamond-Film MISFET. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-142551

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

18. Chen, Wei-Shiun. Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory.

Degree: Master, Electrical Engineering, 2000, NSYSU

 Abstract Four high-performance circuits design techniques for embedded DRAM are proposed. First, a negative voltage generator having high efficiency is proposed to provide the negative… (more)

Subjects/Keywords: wordline driver; reduced clock-swing driver; embedded dram; read bus amplifier

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, W. (2000). Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Wei-Shiun. “Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory.” 2000. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Wei-Shiun. “Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory.” 2000. Web. 02 Dec 2020.

Vancouver:

Chen W. Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen W. Study of High Performance Circuits for 2.0V Embedded Dynamic Random Access Memory. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0727100-013623

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

19. Chang-Chan, Sun-Yu. Two Novel Switched Current Circuits.

Degree: Master, Electrical Engineering, 2000, NSYSU

 Two novel clock feedthrough compensation circuits for switched - current (SI) memory cells are proposed to reduce the clock feedthrough error. One is a current… (more)

Subjects/Keywords: sample and hold; switched current

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APA (6th Edition):

Chang-Chan, S. (2000). Two Novel Switched Current Circuits. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chang-Chan, Sun-Yu. “Two Novel Switched Current Circuits.” 2000. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chang-Chan, Sun-Yu. “Two Novel Switched Current Circuits.” 2000. Web. 02 Dec 2020.

Vancouver:

Chang-Chan S. Two Novel Switched Current Circuits. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chang-Chan S. Two Novel Switched Current Circuits. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-200736

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

20. Wu, Yi-Ming. CMOS Current Controlled Conveyor and Tunable IF Filter Application.

Degree: Master, Electrical Engineering, 2000, NSYSU

 A second-generation CMOS current controlled conveyor (CCCII) and a tunable IF bandpass filter based on the CCCII are developed. The high frequency property and the… (more)

Subjects/Keywords: tunable; CMOS; current controlled conveyor; bandpass filter

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APA (6th Edition):

Wu, Y. (2000). CMOS Current Controlled Conveyor and Tunable IF Filter Application. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wu, Yi-Ming. “CMOS Current Controlled Conveyor and Tunable IF Filter Application.” 2000. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wu, Yi-Ming. “CMOS Current Controlled Conveyor and Tunable IF Filter Application.” 2000. Web. 02 Dec 2020.

Vancouver:

Wu Y. CMOS Current Controlled Conveyor and Tunable IF Filter Application. [Internet] [Thesis]. NSYSU; 2000. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wu Y. CMOS Current Controlled Conveyor and Tunable IF Filter Application. [Thesis]. NSYSU; 2000. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0726100-225205

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

21. Lee, Tung-I. A Novel Transimpedance Amplifier and Its Application Circuits.

Degree: Master, Electrical Engineering, 2002, NSYSU

 Abstract A simple negative transimpedance amplifier is proposed. Because of inherent low input and output impedance, the frequency response is higher than that of the… (more)

Subjects/Keywords: filter; transimpedance amplifier

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APA (6th Edition):

Lee, T. (2002). A Novel Transimpedance Amplifier and Its Application Circuits. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Lee, Tung-I. “A Novel Transimpedance Amplifier and Its Application Circuits.” 2002. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Lee, Tung-I. “A Novel Transimpedance Amplifier and Its Application Circuits.” 2002. Web. 02 Dec 2020.

Vancouver:

Lee T. A Novel Transimpedance Amplifier and Its Application Circuits. [Internet] [Thesis]. NSYSU; 2002. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Lee T. A Novel Transimpedance Amplifier and Its Application Circuits. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-153308

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

22. Wang, Chao-Ho. A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier.

Degree: Master, Electrical Engineering, 2002, NSYSU

 Abstract In this research, we intend to develop a sinusoidal VCO with low harmonic distortion. A new sinusoidal VCO is developed with only two OTAs.… (more)

Subjects/Keywords: Operational Transconductance Amplifier; Oscillator

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APA (6th Edition):

Wang, C. (2002). A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Wang, Chao-Ho. “A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier.” 2002. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Wang, Chao-Ho. “A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier.” 2002. Web. 02 Dec 2020.

Vancouver:

Wang C. A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier. [Internet] [Thesis]. NSYSU; 2002. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Wang C. A Novel Voltage-Control Sinusoidal Oscillator using Operational Transconductance Amplifier. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0719102-173216

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

23. Yang, Shun-Pin. A High Efficiency Switched-Capacitor DC-DC up Converter.

Degree: Master, Electrical Engineering, 2003, NSYSU

 A new DC-DC up converter with high efficiency and low output ripple is proposed. We replace previous charge pump converters by switched-capacitor converters to improve… (more)

Subjects/Keywords: voltage regulator; switched-capacitor; low-ripple; high efficiency

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APA (6th Edition):

Yang, S. (2003). A High Efficiency Switched-Capacitor DC-DC up Converter. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725103-101956

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Yang, Shun-Pin. “A High Efficiency Switched-Capacitor DC-DC up Converter.” 2003. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725103-101956.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Yang, Shun-Pin. “A High Efficiency Switched-Capacitor DC-DC up Converter.” 2003. Web. 02 Dec 2020.

Vancouver:

Yang S. A High Efficiency Switched-Capacitor DC-DC up Converter. [Internet] [Thesis]. NSYSU; 2003. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725103-101956.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Yang S. A High Efficiency Switched-Capacitor DC-DC up Converter. [Thesis]. NSYSU; 2003. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725103-101956

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation


NSYSU

24. Chen, Yung-Tai. A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters.

Degree: Master, Electrical Engineering, 2002, NSYSU

 A novel on chip automatic tuning circuit for Gm â C continuous time filter is presented. The circuit is composed of an integrator, a frequency… (more)

Subjects/Keywords: tuning circuits; Continuous-time Gm-C filter; Q-factor

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Chen, Y. (2002). A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters. (Thesis). NSYSU. Retrieved from http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Chicago Manual of Style (16th Edition):

Chen, Yung-Tai. “A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters.” 2002. Thesis, NSYSU. Accessed December 02, 2020. http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

MLA Handbook (7th Edition):

Chen, Yung-Tai. “A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters.” 2002. Web. 02 Dec 2020.

Vancouver:

Chen Y. A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters. [Internet] [Thesis]. NSYSU; 2002. [cited 2020 Dec 02]. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558.

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

Council of Science Editors:

Chen Y. A Novel Q-Tuning Scheme for High-Q Continuous-Time Gm-C Filters. [Thesis]. NSYSU; 2002. Available from: http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0718102-142558

Note: this citation may be lacking information needed for this citation format:
Not specified: Masters Thesis or Doctoral Dissertation

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