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You searched for +publisher:"Georgia Tech" +contributor:("Swaminathan, Madhavan"). Showing records 1 – 30 of 62 total matches.

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Georgia Tech

1. Suresh, Srinidhi. Modeling, design and fabrication of substrate-embedded inductors with high inductance density and low DC resistance for integrated voltage regulators.

Degree: MS, Materials Science and Engineering, 2020, Georgia Tech

 There is an increasing need for voltage regulators to be integrated closer to active devices such as CPUs and GPUs. These integrated voltage regulators (IVRs)… (more)

Subjects/Keywords: Integrated voltage regulator; Inductor; Metal polymer composite; Toroid inductor; 48V-1V; Inductance density; DC resistance; Fabrication process

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APA (6th Edition):

Suresh, S. (2020). Modeling, design and fabrication of substrate-embedded inductors with high inductance density and low DC resistance for integrated voltage regulators. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/62819

Chicago Manual of Style (16th Edition):

Suresh, Srinidhi. “Modeling, design and fabrication of substrate-embedded inductors with high inductance density and low DC resistance for integrated voltage regulators.” 2020. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/62819.

MLA Handbook (7th Edition):

Suresh, Srinidhi. “Modeling, design and fabrication of substrate-embedded inductors with high inductance density and low DC resistance for integrated voltage regulators.” 2020. Web. 06 Aug 2020.

Vancouver:

Suresh S. Modeling, design and fabrication of substrate-embedded inductors with high inductance density and low DC resistance for integrated voltage regulators. [Internet] [Masters thesis]. Georgia Tech; 2020. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/62819.

Council of Science Editors:

Suresh S. Modeling, design and fabrication of substrate-embedded inductors with high inductance density and low DC resistance for integrated voltage regulators. [Masters Thesis]. Georgia Tech; 2020. Available from: http://hdl.handle.net/1853/62819


Georgia Tech

2. Mutnuri, Keertana. Channel adaptive process resilient ultra low-power transmitter design with simulated-annealing based self-discovery.

Degree: MS, Electrical and Computer Engineering, 2014, Georgia Tech

 Modern day wireless communication systems are constantly facing increasing bandwidth demands due to a growing consumer base. To cope up with it, they are required… (more)

Subjects/Keywords: Ofdm; Papr; Companding; Simulated-annealing; Power-amplifier

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APA (6th Edition):

Mutnuri, K. (2014). Channel adaptive process resilient ultra low-power transmitter design with simulated-annealing based self-discovery. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/53402

Chicago Manual of Style (16th Edition):

Mutnuri, Keertana. “Channel adaptive process resilient ultra low-power transmitter design with simulated-annealing based self-discovery.” 2014. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/53402.

MLA Handbook (7th Edition):

Mutnuri, Keertana. “Channel adaptive process resilient ultra low-power transmitter design with simulated-annealing based self-discovery.” 2014. Web. 06 Aug 2020.

Vancouver:

Mutnuri K. Channel adaptive process resilient ultra low-power transmitter design with simulated-annealing based self-discovery. [Internet] [Masters thesis]. Georgia Tech; 2014. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/53402.

Council of Science Editors:

Mutnuri K. Channel adaptive process resilient ultra low-power transmitter design with simulated-annealing based self-discovery. [Masters Thesis]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/53402


Georgia Tech

3. Omprakash, Anup. Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments.

Degree: MS, Electrical and Computer Engineering, 2016, Georgia Tech

 The objective of this work is to characterize and investigate the effect of extreme environments, such as high temperature (up to 300^∘C) and radiation, on… (more)

Subjects/Keywords: SiGe; SiGe HBTs; High temperature; Total dose effects; Reliability; Thermal instability

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APA (6th Edition):

Omprakash, A. (2016). Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/58195

Chicago Manual of Style (16th Edition):

Omprakash, Anup. “Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments.” 2016. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/58195.

MLA Handbook (7th Edition):

Omprakash, Anup. “Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments.” 2016. Web. 06 Aug 2020.

Vancouver:

Omprakash A. Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments. [Internet] [Masters thesis]. Georgia Tech; 2016. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/58195.

Council of Science Editors:

Omprakash A. Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments. [Masters Thesis]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/58195


Georgia Tech

4. Natu, Nitish Umesh. Design and prototyping of temperature resilient clock distribution networks.

Degree: MS, Electrical and Computer Engineering, 2014, Georgia Tech

 Clock Distribution Networks play a vital role in performance and reliability of a system. However, temperature gradients observed in 3D ICs hamper the functionality of… (more)

Subjects/Keywords: 3D IC; Through silicon via; Clock distribution network (CDN); Skew; Propagation delay; Adaptive voltage; Controllable delay; FPGA; Test vehicle; ASIC buffer design; Three-dimensional integrated circuits; Integrated circuits

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APA (6th Edition):

Natu, N. U. (2014). Design and prototyping of temperature resilient clock distribution networks. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/51812

Chicago Manual of Style (16th Edition):

Natu, Nitish Umesh. “Design and prototyping of temperature resilient clock distribution networks.” 2014. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/51812.

MLA Handbook (7th Edition):

Natu, Nitish Umesh. “Design and prototyping of temperature resilient clock distribution networks.” 2014. Web. 06 Aug 2020.

Vancouver:

Natu NU. Design and prototyping of temperature resilient clock distribution networks. [Internet] [Masters thesis]. Georgia Tech; 2014. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/51812.

Council of Science Editors:

Natu NU. Design and prototyping of temperature resilient clock distribution networks. [Masters Thesis]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/51812

5. Roper, Joshua. Design of a circular reflectarray with a performance comparable to the typical rectangular reflectarray.

Degree: MS, Electrical and Computer Engineering, 2017, Georgia Tech

 A circular reflectarray is a novel design combining the unit-ring artificial magnetic conductor with the reflectarray concept. It is shown through simulation that a circular… (more)

Subjects/Keywords: Antenna; Microwave

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APA (6th Edition):

Roper, J. (2017). Design of a circular reflectarray with a performance comparable to the typical rectangular reflectarray. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/59292

Chicago Manual of Style (16th Edition):

Roper, Joshua. “Design of a circular reflectarray with a performance comparable to the typical rectangular reflectarray.” 2017. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/59292.

MLA Handbook (7th Edition):

Roper, Joshua. “Design of a circular reflectarray with a performance comparable to the typical rectangular reflectarray.” 2017. Web. 06 Aug 2020.

Vancouver:

Roper J. Design of a circular reflectarray with a performance comparable to the typical rectangular reflectarray. [Internet] [Masters thesis]. Georgia Tech; 2017. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/59292.

Council of Science Editors:

Roper J. Design of a circular reflectarray with a performance comparable to the typical rectangular reflectarray. [Masters Thesis]. Georgia Tech; 2017. Available from: http://hdl.handle.net/1853/59292


Georgia Tech

6. Lee, Minah. Automated I/O library generation for interposer based system-in-package integration of multiple heterogeneous dies.

Degree: MS, Electrical and Computer Engineering, 2019, Georgia Tech

 System-in-Package (SiP) integration of multiple dies in a single package can achieve much higher performance than on-board integration of ICs while reducing the design cost/effort… (more)

Subjects/Keywords: System-in-package (SiP); 2.5D integration; Interface circuits; I/O library; Automated flow

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APA (6th Edition):

Lee, M. (2019). Automated I/O library generation for interposer based system-in-package integration of multiple heterogeneous dies. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/62366

Chicago Manual of Style (16th Edition):

Lee, Minah. “Automated I/O library generation for interposer based system-in-package integration of multiple heterogeneous dies.” 2019. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/62366.

MLA Handbook (7th Edition):

Lee, Minah. “Automated I/O library generation for interposer based system-in-package integration of multiple heterogeneous dies.” 2019. Web. 06 Aug 2020.

Vancouver:

Lee M. Automated I/O library generation for interposer based system-in-package integration of multiple heterogeneous dies. [Internet] [Masters thesis]. Georgia Tech; 2019. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/62366.

Council of Science Editors:

Lee M. Automated I/O library generation for interposer based system-in-package integration of multiple heterogeneous dies. [Masters Thesis]. Georgia Tech; 2019. Available from: http://hdl.handle.net/1853/62366


Georgia Tech

7. Carlo, Sergio. Load-Aware Power Conversion and Integration for Heterogeneous Systems.

Degree: PhD, Electrical and Computer Engineering, 2015, Georgia Tech

 In this thesis we develop a holistic co-design approach to optimize the conversion systems in order to perform relevant trade-offs taking into account system-level converter,… (more)

Subjects/Keywords: Power conversion 3D single inductor multiple output SIMO control design power management

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APA (6th Edition):

Carlo, S. (2015). Load-Aware Power Conversion and Integration for Heterogeneous Systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/56182

Chicago Manual of Style (16th Edition):

Carlo, Sergio. “Load-Aware Power Conversion and Integration for Heterogeneous Systems.” 2015. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/56182.

MLA Handbook (7th Edition):

Carlo, Sergio. “Load-Aware Power Conversion and Integration for Heterogeneous Systems.” 2015. Web. 06 Aug 2020.

Vancouver:

Carlo S. Load-Aware Power Conversion and Integration for Heterogeneous Systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2015. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/56182.

Council of Science Editors:

Carlo S. Load-Aware Power Conversion and Integration for Heterogeneous Systems. [Doctoral Dissertation]. Georgia Tech; 2015. Available from: http://hdl.handle.net/1853/56182


Georgia Tech

8. Park, Sung Joo. Managing signal, power, and thermal integrity for three-dimensional integrated circuits.

Degree: PhD, Electrical and Computer Engineering, 2016, Georgia Tech

 A full thermal-electrical model of a 3-D system consisting of a PCB, an interposer, TSVs, and stacked dies was built and simulated. From the results… (more)

Subjects/Keywords: 3-D integration; TSV; Electrical-thermal

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APA (6th Edition):

Park, S. J. (2016). Managing signal, power, and thermal integrity for three-dimensional integrated circuits. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/58604

Chicago Manual of Style (16th Edition):

Park, Sung Joo. “Managing signal, power, and thermal integrity for three-dimensional integrated circuits.” 2016. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/58604.

MLA Handbook (7th Edition):

Park, Sung Joo. “Managing signal, power, and thermal integrity for three-dimensional integrated circuits.” 2016. Web. 06 Aug 2020.

Vancouver:

Park SJ. Managing signal, power, and thermal integrity for three-dimensional integrated circuits. [Internet] [Doctoral dissertation]. Georgia Tech; 2016. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/58604.

Council of Science Editors:

Park SJ. Managing signal, power, and thermal integrity for three-dimensional integrated circuits. [Doctoral Dissertation]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/58604


Georgia Tech

9. Ha, Myunghyun. EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 As the current electronic trend is toward integrating multiple functions in a single electronic device, there is a clear need for increasing integration density which… (more)

Subjects/Keywords: Unconditionally stable method; Finite-difference time-domain; Computational electromagentics; Laguerre-FDTD; Interconnects (Integrated circuit technology); Integrated circuits; Three-dimensional integrated circuits; Semiconductors

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APA (6th Edition):

Ha, M. (2011). EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/42850

Chicago Manual of Style (16th Edition):

Ha, Myunghyun. “EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections.” 2011. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/42850.

MLA Handbook (7th Edition):

Ha, Myunghyun. “EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections.” 2011. Web. 06 Aug 2020.

Vancouver:

Ha M. EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/42850.

Council of Science Editors:

Ha M. EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/42850


Georgia Tech

10. Pardue, Colin Andrew. Wireless power transfer using integrated and emerging technologies.

Degree: PhD, Electrical and Computer Engineering, 2018, Georgia Tech

 To support the next generation of compact low power devices, a wireless power transfer solution needs to have an improved combination of receiver coil area… (more)

Subjects/Keywords: Wireless power transfer; Internet of things; Integrated inductor; Packaging; Rf near field coupling; Power integrity

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APA (6th Edition):

Pardue, C. A. (2018). Wireless power transfer using integrated and emerging technologies. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/60216

Chicago Manual of Style (16th Edition):

Pardue, Colin Andrew. “Wireless power transfer using integrated and emerging technologies.” 2018. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/60216.

MLA Handbook (7th Edition):

Pardue, Colin Andrew. “Wireless power transfer using integrated and emerging technologies.” 2018. Web. 06 Aug 2020.

Vancouver:

Pardue CA. Wireless power transfer using integrated and emerging technologies. [Internet] [Doctoral dissertation]. Georgia Tech; 2018. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/60216.

Council of Science Editors:

Pardue CA. Wireless power transfer using integrated and emerging technologies. [Doctoral Dissertation]. Georgia Tech; 2018. Available from: http://hdl.handle.net/1853/60216


Georgia Tech

11. Nasir, Saad Bin. Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators.

Degree: PhD, Electrical and Computer Engineering, 2017, Georgia Tech

 On-chip voltage conversion and regulation right at the point-of-load using digital and digitally-assisted linear voltage regulators was proposed. On-chip voltage conversion and regulation minimizes power… (more)

Subjects/Keywords: On-chip power delivery; Digital and digitally assisted linear voltage regulators; LDO

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APA (6th Edition):

Nasir, S. B. (2017). Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/60708

Chicago Manual of Style (16th Edition):

Nasir, Saad Bin. “Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators.” 2017. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/60708.

MLA Handbook (7th Edition):

Nasir, Saad Bin. “Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators.” 2017. Web. 06 Aug 2020.

Vancouver:

Nasir SB. Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators. [Internet] [Doctoral dissertation]. Georgia Tech; 2017. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/60708.

Council of Science Editors:

Nasir SB. Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators. [Doctoral Dissertation]. Georgia Tech; 2017. Available from: http://hdl.handle.net/1853/60708


Georgia Tech

12. Han, Kyuhwan. Magneto-dielectric material characterization and RF antenna design.

Degree: PhD, Electrical and Computer Engineering, 2015, Georgia Tech

 A novel material characterization method for magneto-dielectric composite material was proposed. MD materials have been reported as providing new opportunities for effective antenna size reduction… (more)

Subjects/Keywords: Magneto-dielectric material; Material characterization method; RF antenna design; Ferromagentic material

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APA (6th Edition):

Han, K. (2015). Magneto-dielectric material characterization and RF antenna design. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/53863

Chicago Manual of Style (16th Edition):

Han, Kyuhwan. “Magneto-dielectric material characterization and RF antenna design.” 2015. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/53863.

MLA Handbook (7th Edition):

Han, Kyuhwan. “Magneto-dielectric material characterization and RF antenna design.” 2015. Web. 06 Aug 2020.

Vancouver:

Han K. Magneto-dielectric material characterization and RF antenna design. [Internet] [Doctoral dissertation]. Georgia Tech; 2015. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/53863.

Council of Science Editors:

Han K. Magneto-dielectric material characterization and RF antenna design. [Doctoral Dissertation]. Georgia Tech; 2015. Available from: http://hdl.handle.net/1853/53863


Georgia Tech

13. Zhang, David Chong. Design of power delivery networks using power transmission lines for high speed I/O signaling in complex electronic systems.

Degree: PhD, Electrical and Computer Engineering, 2016, Georgia Tech

 A power distribution network (PDN) is designed to provide clean power and facilitate high signal integrity in modern electronic systems. However, the design of a… (more)

Subjects/Keywords: Power delivery network; Power transmission line; Signal integrity; Power integrity; Return path discontinuity

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APA (6th Edition):

Zhang, D. C. (2016). Design of power delivery networks using power transmission lines for high speed I/O signaling in complex electronic systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/56282

Chicago Manual of Style (16th Edition):

Zhang, David Chong. “Design of power delivery networks using power transmission lines for high speed I/O signaling in complex electronic systems.” 2016. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/56282.

MLA Handbook (7th Edition):

Zhang, David Chong. “Design of power delivery networks using power transmission lines for high speed I/O signaling in complex electronic systems.” 2016. Web. 06 Aug 2020.

Vancouver:

Zhang DC. Design of power delivery networks using power transmission lines for high speed I/O signaling in complex electronic systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2016. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/56282.

Council of Science Editors:

Zhang DC. Design of power delivery networks using power transmission lines for high speed I/O signaling in complex electronic systems. [Doctoral Dissertation]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/56282


Georgia Tech

14. Peng, Yarui. CAD tools and methodologies for reliable 3D IC design, analysis, and optimization.

Degree: PhD, Electrical and Computer Engineering, 2016, Georgia Tech

 As one of more-than-Moore technologies, 3D ICs enable next-generation systems with much higher device density without needs for technology scaling. However, designing reliable 3D IC… (more)

Subjects/Keywords: 3D IC; CAD; Methodology; Reliable; Power integrity; Signal integrity

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APA (6th Edition):

Peng, Y. (2016). CAD tools and methodologies for reliable 3D IC design, analysis, and optimization. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/56330

Chicago Manual of Style (16th Edition):

Peng, Yarui. “CAD tools and methodologies for reliable 3D IC design, analysis, and optimization.” 2016. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/56330.

MLA Handbook (7th Edition):

Peng, Yarui. “CAD tools and methodologies for reliable 3D IC design, analysis, and optimization.” 2016. Web. 06 Aug 2020.

Vancouver:

Peng Y. CAD tools and methodologies for reliable 3D IC design, analysis, and optimization. [Internet] [Doctoral dissertation]. Georgia Tech; 2016. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/56330.

Council of Science Editors:

Peng Y. CAD tools and methodologies for reliable 3D IC design, analysis, and optimization. [Doctoral Dissertation]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/56330

15. Laddha, Vishal. Correlation of PDN impedance with jitter and voltage margin in high speed channels.

Degree: MS, Electrical and Computer Engineering, 2008, Georgia Tech

 Jitter and noise on package and printed circuit board interconnects are limiting factors in the performance of high speed digital channels. The simultaneous switching noise… (more)

Subjects/Keywords: PDN impedance; Jitter; Noise margin; Impedance (Electricity); Genetic algorithms

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APA (6th Edition):

Laddha, V. (2008). Correlation of PDN impedance with jitter and voltage margin in high speed channels. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/26521

Chicago Manual of Style (16th Edition):

Laddha, Vishal. “Correlation of PDN impedance with jitter and voltage margin in high speed channels.” 2008. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/26521.

MLA Handbook (7th Edition):

Laddha, Vishal. “Correlation of PDN impedance with jitter and voltage margin in high speed channels.” 2008. Web. 06 Aug 2020.

Vancouver:

Laddha V. Correlation of PDN impedance with jitter and voltage margin in high speed channels. [Internet] [Masters thesis]. Georgia Tech; 2008. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/26521.

Council of Science Editors:

Laddha V. Correlation of PDN impedance with jitter and voltage margin in high speed channels. [Masters Thesis]. Georgia Tech; 2008. Available from: http://hdl.handle.net/1853/26521

16. Huang, Min-Yu. Ultra-compact concurrent multi-directional beamforming receiving network for high-efficiency wireless power transfer (WPT).

Degree: MS, Electrical and Computer Engineering, 2018, Georgia Tech

 This thesis demonstrates an all-passive ultra-compact low-loss array-based beamforming rectenna array for high-efficiency wireless power transfer (WPT). The detailed circuit analysis and theoretical derivation are… (more)

Subjects/Keywords: Array factor; Beamforming; Field-of-view; Phased array; Rectifier; Rectenna array; Wireless power transfer

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APA (6th Edition):

Huang, M. (2018). Ultra-compact concurrent multi-directional beamforming receiving network for high-efficiency wireless power transfer (WPT). (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/60829

Chicago Manual of Style (16th Edition):

Huang, Min-Yu. “Ultra-compact concurrent multi-directional beamforming receiving network for high-efficiency wireless power transfer (WPT).” 2018. Masters Thesis, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/60829.

MLA Handbook (7th Edition):

Huang, Min-Yu. “Ultra-compact concurrent multi-directional beamforming receiving network for high-efficiency wireless power transfer (WPT).” 2018. Web. 06 Aug 2020.

Vancouver:

Huang M. Ultra-compact concurrent multi-directional beamforming receiving network for high-efficiency wireless power transfer (WPT). [Internet] [Masters thesis]. Georgia Tech; 2018. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/60829.

Council of Science Editors:

Huang M. Ultra-compact concurrent multi-directional beamforming receiving network for high-efficiency wireless power transfer (WPT). [Masters Thesis]. Georgia Tech; 2018. Available from: http://hdl.handle.net/1853/60829


Georgia Tech

17. Sung, Wang-Kyung. High-frequency tri-axial resonant gyroscopes.

Degree: PhD, Electrical and Computer Engineering, 2013, Georgia Tech

 This dissertation reports on the design and implementation of a high-frequency, tri-axial capacitive resonant gyroscopes integrated on a single chip. The components that construct tri-axial… (more)

Subjects/Keywords: Gyroscope; MEMS gyroscope; High-frequency gyroscope; Micromachined gyroscope; Resonant gyroscope; Planar gyroscope; Mode-matched gyroscope; Inertial sensor; Inertial measurement unit; Sensor integration

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APA (6th Edition):

Sung, W. (2013). High-frequency tri-axial resonant gyroscopes. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/52936

Chicago Manual of Style (16th Edition):

Sung, Wang-Kyung. “High-frequency tri-axial resonant gyroscopes.” 2013. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/52936.

MLA Handbook (7th Edition):

Sung, Wang-Kyung. “High-frequency tri-axial resonant gyroscopes.” 2013. Web. 06 Aug 2020.

Vancouver:

Sung W. High-frequency tri-axial resonant gyroscopes. [Internet] [Doctoral dissertation]. Georgia Tech; 2013. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/52936.

Council of Science Editors:

Sung W. High-frequency tri-axial resonant gyroscopes. [Doctoral Dissertation]. Georgia Tech; 2013. Available from: http://hdl.handle.net/1853/52936

18. Hwang, Seunghyun Eddy. Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 The goal of the research in this dissertation is to develop techniques for 1) system-on-package integration of passive circuits using ultra-thin advanced polymers called RXP… (more)

Subjects/Keywords: RXP; Bandpass; Organic; TSV; Silicon interposer; Filter; Integrated circuits; Microelectronics; Thin films; Thin-film circuits

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APA (6th Edition):

Hwang, S. E. (2011). Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/41146

Chicago Manual of Style (16th Edition):

Hwang, Seunghyun Eddy. “Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency.” 2011. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/41146.

MLA Handbook (7th Edition):

Hwang, Seunghyun Eddy. “Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency.” 2011. Web. 06 Aug 2020.

Vancouver:

Hwang SE. Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/41146.

Council of Science Editors:

Hwang SE. Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/41146

19. Barabadi, Banafsheh. Transient Joule heating in nano-scale embedded on-chip interconnects.

Degree: PhD, Mechanical Engineering, 2013, Georgia Tech

 Major challenges in maintaining quality and reliability in today’s microelectronics devices come from the ever increasing level of integration in the device fabrication, as well… (more)

Subjects/Keywords: Joule heating; Interconnects; Nano-scale heat transfer; Multi-scale thermal modeling; Interconnects (Integrated circuit technology); Nanoelectromechanical systems; Heat Transmission

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APA (6th Edition):

Barabadi, B. (2013). Transient Joule heating in nano-scale embedded on-chip interconnects. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/51786

Chicago Manual of Style (16th Edition):

Barabadi, Banafsheh. “Transient Joule heating in nano-scale embedded on-chip interconnects.” 2013. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/51786.

MLA Handbook (7th Edition):

Barabadi, Banafsheh. “Transient Joule heating in nano-scale embedded on-chip interconnects.” 2013. Web. 06 Aug 2020.

Vancouver:

Barabadi B. Transient Joule heating in nano-scale embedded on-chip interconnects. [Internet] [Doctoral dissertation]. Georgia Tech; 2013. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/51786.

Council of Science Editors:

Barabadi B. Transient Joule heating in nano-scale embedded on-chip interconnects. [Doctoral Dissertation]. Georgia Tech; 2013. Available from: http://hdl.handle.net/1853/51786

20. Hsiao, Sen-Wen. Built-in test for performance characterization and calibration of phase-locked loops.

Degree: PhD, Electrical and Computer Engineering, 2014, Georgia Tech

 The objective of this dissertation is to propose circuit architectures and techniques for built-in test and calibration of phase-locked loops. The design of phase-locked loops… (more)

Subjects/Keywords: Phase-locked loop; Built-in test; Built-in self-test; Calibration; Analog sensor; Reference spur; Frequency synthesizers; Telecommunication systems; Phase detectors; Phase-locked loops

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APA (6th Edition):

Hsiao, S. (2014). Built-in test for performance characterization and calibration of phase-locked loops. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/51790

Chicago Manual of Style (16th Edition):

Hsiao, Sen-Wen. “Built-in test for performance characterization and calibration of phase-locked loops.” 2014. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/51790.

MLA Handbook (7th Edition):

Hsiao, Sen-Wen. “Built-in test for performance characterization and calibration of phase-locked loops.” 2014. Web. 06 Aug 2020.

Vancouver:

Hsiao S. Built-in test for performance characterization and calibration of phase-locked loops. [Internet] [Doctoral dissertation]. Georgia Tech; 2014. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/51790.

Council of Science Editors:

Hsiao S. Built-in test for performance characterization and calibration of phase-locked loops. [Doctoral Dissertation]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/51790

21. Jung, Moongon. Low power and reliable design methodologies for 3D ICs.

Degree: PhD, Electrical and Computer Engineering, 2014, Georgia Tech

 The main objective of this dissertation is to explore and develop computer-aided-design methodologies and optimization techniques for reliability, performance, and power of through-silicon-via-based 3D IC… (more)

Subjects/Keywords: 3D IC; TSV; Low power design; Thermo-mechanical reliability; Power delivery; Three-dimensional integrated circuits; Integrated circuits; Integrated circuits Design and construction

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APA (6th Edition):

Jung, M. (2014). Low power and reliable design methodologies for 3D ICs. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/51824

Chicago Manual of Style (16th Edition):

Jung, Moongon. “Low power and reliable design methodologies for 3D ICs.” 2014. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/51824.

MLA Handbook (7th Edition):

Jung, Moongon. “Low power and reliable design methodologies for 3D ICs.” 2014. Web. 06 Aug 2020.

Vancouver:

Jung M. Low power and reliable design methodologies for 3D ICs. [Internet] [Doctoral dissertation]. Georgia Tech; 2014. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/51824.

Council of Science Editors:

Jung M. Low power and reliable design methodologies for 3D ICs. [Doctoral Dissertation]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/51824

22. Tzou, Nicholas. Low-cost sub-Nyquist sampling hardware and algorithm co-design for wideband and high-speed signal characterization and measurement.

Degree: PhD, Electrical and Computer Engineering, 2014, Georgia Tech

 Cost reduction has been and will continue to be a primary driving force in the evolution of hardware design and associated technologies. The objective of… (more)

Subjects/Keywords: Low-cost; Sub-Nyquist; Algorithm; Hardware; Measurement; Multi-rate; Band-interleaved; Undersampling; Jitter; Crosstalk separation; Broadband communication systems Equipment and supplies; Algorithms

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APA (6th Edition):

Tzou, N. (2014). Low-cost sub-Nyquist sampling hardware and algorithm co-design for wideband and high-speed signal characterization and measurement. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/51876

Chicago Manual of Style (16th Edition):

Tzou, Nicholas. “Low-cost sub-Nyquist sampling hardware and algorithm co-design for wideband and high-speed signal characterization and measurement.” 2014. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/51876.

MLA Handbook (7th Edition):

Tzou, Nicholas. “Low-cost sub-Nyquist sampling hardware and algorithm co-design for wideband and high-speed signal characterization and measurement.” 2014. Web. 06 Aug 2020.

Vancouver:

Tzou N. Low-cost sub-Nyquist sampling hardware and algorithm co-design for wideband and high-speed signal characterization and measurement. [Internet] [Doctoral dissertation]. Georgia Tech; 2014. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/51876.

Council of Science Editors:

Tzou N. Low-cost sub-Nyquist sampling hardware and algorithm co-design for wideband and high-speed signal characterization and measurement. [Doctoral Dissertation]. Georgia Tech; 2014. Available from: http://hdl.handle.net/1853/51876

23. Huh, Suzanne Lynn. Design of power delivery networks for noise suppression and isolation using power transmission lines.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 In conventional design of power delivery networks (PDNs), the PDN impedance is required to be less than the target impedance over the frequency range of… (more)

Subjects/Keywords: Power delivery network; Switching noise; Electromagnetic band gap; Power transmission; Semiconductors; Microelectronics; Mixed signal circuits

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APA (6th Edition):

Huh, S. L. (2011). Design of power delivery networks for noise suppression and isolation using power transmission lines. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/42842

Chicago Manual of Style (16th Edition):

Huh, Suzanne Lynn. “Design of power delivery networks for noise suppression and isolation using power transmission lines.” 2011. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/42842.

MLA Handbook (7th Edition):

Huh, Suzanne Lynn. “Design of power delivery networks for noise suppression and isolation using power transmission lines.” 2011. Web. 06 Aug 2020.

Vancouver:

Huh SL. Design of power delivery networks for noise suppression and isolation using power transmission lines. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/42842.

Council of Science Editors:

Huh SL. Design of power delivery networks for noise suppression and isolation using power transmission lines. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/42842

24. Dutton, Marcus. Flexible architecture methods for graphics processing.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 The FPGA GPU architecture proposed in this thesis was motivated by underserved markets for graphics processing that desire flexibility, long-term device availability, scalability, certifiability, and… (more)

Subjects/Keywords: GPU; FPGA; Graphics processing units; Computer graphics; Field programmable gate arrays; Application-specific integrated circuits; Integrated circuits

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APA (6th Edition):

Dutton, M. (2011). Flexible architecture methods for graphics processing. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/43658

Chicago Manual of Style (16th Edition):

Dutton, Marcus. “Flexible architecture methods for graphics processing.” 2011. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/43658.

MLA Handbook (7th Edition):

Dutton, Marcus. “Flexible architecture methods for graphics processing.” 2011. Web. 06 Aug 2020.

Vancouver:

Dutton M. Flexible architecture methods for graphics processing. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/43658.

Council of Science Editors:

Dutton M. Flexible architecture methods for graphics processing. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/43658

25. Moon, Thomas. Testing and characterization of high-speed signals using incoherent undersampling driven signal reconstruction algorithms.

Degree: PhD, Electrical and Computer Engineering, 2015, Georgia Tech

 The objective of the proposed research is to develop a framework for the signal reconstruction algorithm with sub-Nyquist sampling rate and the low-cost hardware design… (more)

Subjects/Keywords: High-speed signal characterization; Sub-Nyquist rate reconstruction; Direct subsampling; Low-cost test

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APA (6th Edition):

Moon, T. (2015). Testing and characterization of high-speed signals using incoherent undersampling driven signal reconstruction algorithms. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/54326

Chicago Manual of Style (16th Edition):

Moon, Thomas. “Testing and characterization of high-speed signals using incoherent undersampling driven signal reconstruction algorithms.” 2015. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/54326.

MLA Handbook (7th Edition):

Moon, Thomas. “Testing and characterization of high-speed signals using incoherent undersampling driven signal reconstruction algorithms.” 2015. Web. 06 Aug 2020.

Vancouver:

Moon T. Testing and characterization of high-speed signals using incoherent undersampling driven signal reconstruction algorithms. [Internet] [Doctoral dissertation]. Georgia Tech; 2015. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/54326.

Council of Science Editors:

Moon T. Testing and characterization of high-speed signals using incoherent undersampling driven signal reconstruction algorithms. [Doctoral Dissertation]. Georgia Tech; 2015. Available from: http://hdl.handle.net/1853/54326

26. Xie, Biancun. Modeling and simulation of silicon interposers for 3-d integrated systems.

Degree: PhD, Electrical and Computer Engineering, 2015, Georgia Tech

 Three-dimensional (3-D) system integration is believed to be a promising technology and has gained tremendous momentum in the semiconductor industry recently. The Silicon interposer is… (more)

Subjects/Keywords: 3-D integration; Through-silicon via; Non-conformal domain decomposition; Multi-scale; Silicon interposer; Signal integrity; Power integrity

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APA (6th Edition):

Xie, B. (2015). Modeling and simulation of silicon interposers for 3-d integrated systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/53922

Chicago Manual of Style (16th Edition):

Xie, Biancun. “Modeling and simulation of silicon interposers for 3-d integrated systems.” 2015. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/53922.

MLA Handbook (7th Edition):

Xie, Biancun. “Modeling and simulation of silicon interposers for 3-d integrated systems.” 2015. Web. 06 Aug 2020.

Vancouver:

Xie B. Modeling and simulation of silicon interposers for 3-d integrated systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2015. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/53922.

Council of Science Editors:

Xie B. Modeling and simulation of silicon interposers for 3-d integrated systems. [Doctoral Dissertation]. Georgia Tech; 2015. Available from: http://hdl.handle.net/1853/53922

27. Altunyurt, Nevin. Integration and miniaturization of antennas for system-on-package applications.

Degree: PhD, Electrical and Computer Engineering, 2010, Georgia Tech

 Wireless communications have been an indispensable aspect of everyday life, and there is an increasing consumer demand for accessing several wireless communication technologies from a… (more)

Subjects/Keywords: Design; LCP; Conformal; Material characterization; 60 GHz; Multi-beam; Antenna; System-on-package; SOP; Magneto-dielectric; Miniaturization; Integration; WLAN; WiMAX; Flexible antenna; Reactive impedance surface; RIS; LTSA; Slot antenna; Multichip modules (Microelectronics); Microelectronic packaging; Slot anteannas

…Research Center at Georgia Tech. Two characterization methods that are based on measuring easy… 

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APA (6th Edition):

Altunyurt, N. (2010). Integration and miniaturization of antennas for system-on-package applications. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/33903

Chicago Manual of Style (16th Edition):

Altunyurt, Nevin. “Integration and miniaturization of antennas for system-on-package applications.” 2010. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/33903.

MLA Handbook (7th Edition):

Altunyurt, Nevin. “Integration and miniaturization of antennas for system-on-package applications.” 2010. Web. 06 Aug 2020.

Vancouver:

Altunyurt N. Integration and miniaturization of antennas for system-on-package applications. [Internet] [Doctoral dissertation]. Georgia Tech; 2010. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/33903.

Council of Science Editors:

Altunyurt N. Integration and miniaturization of antennas for system-on-package applications. [Doctoral Dissertation]. Georgia Tech; 2010. Available from: http://hdl.handle.net/1853/33903

28. Ahmed, Khondker Zakir. Efficient power management circuits for energy harvesting applications.

Degree: PhD, Electrical and Computer Engineering, 2016, Georgia Tech

 Low power IoT devices are growing in numbers and by 2020 there will be more than 25 Billion of those in areas such as wearables,… (more)

Subjects/Keywords: Boost regulator; Pulse frequency modulation; PFM; Buck regulator; Single inductor multiple output; SIMO; Energy harvesting; TEG; Photovoltaic cell; Low power circuits; Internet of things; Wireless sensor network; WSN; IOT

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APA (6th Edition):

Ahmed, K. Z. (2016). Efficient power management circuits for energy harvesting applications. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/56236

Chicago Manual of Style (16th Edition):

Ahmed, Khondker Zakir. “Efficient power management circuits for energy harvesting applications.” 2016. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/56236.

MLA Handbook (7th Edition):

Ahmed, Khondker Zakir. “Efficient power management circuits for energy harvesting applications.” 2016. Web. 06 Aug 2020.

Vancouver:

Ahmed KZ. Efficient power management circuits for energy harvesting applications. [Internet] [Doctoral dissertation]. Georgia Tech; 2016. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/56236.

Council of Science Editors:

Ahmed KZ. Efficient power management circuits for energy harvesting applications. [Doctoral Dissertation]. Georgia Tech; 2016. Available from: http://hdl.handle.net/1853/56236

29. Kim, Dae Hyun. Design methodologies for scalable and reliable memory systems.

Degree: PhD, Electrical and Computer Engineering, 2017, Georgia Tech

 The objective of this research is to develop design methodologies for scalable and reliable memory systems in the presence of scalability and reliability issues exacerbated… (more)

Subjects/Keywords: Memory; Scaling; Reliability; System; Circuit; Test; Repair; Design; Error-correcting codes

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APA (6th Edition):

Kim, D. H. (2017). Design methodologies for scalable and reliable memory systems. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/58654

Chicago Manual of Style (16th Edition):

Kim, Dae Hyun. “Design methodologies for scalable and reliable memory systems.” 2017. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/58654.

MLA Handbook (7th Edition):

Kim, Dae Hyun. “Design methodologies for scalable and reliable memory systems.” 2017. Web. 06 Aug 2020.

Vancouver:

Kim DH. Design methodologies for scalable and reliable memory systems. [Internet] [Doctoral dissertation]. Georgia Tech; 2017. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/58654.

Council of Science Editors:

Kim DH. Design methodologies for scalable and reliable memory systems. [Doctoral Dissertation]. Georgia Tech; 2017. Available from: http://hdl.handle.net/1853/58654

30. Terizhandur Varadharajan, Narayanan. Fast methods for full-wave electromagnetic simulations of integrated circuit package modules.

Degree: PhD, Electrical and Computer Engineering, 2011, Georgia Tech

 Fast methods for the electromagnetic simulation of integrated circuit (IC) package modules through model order reduction are demonstrated. The 3D integration of multiple functional IC… (more)

Subjects/Keywords: Electromagnetic simulation; Model order reduction; Microelectronic packaging; Electromagnetic interference; Integrated circuits Computer simulation

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APA (6th Edition):

Terizhandur Varadharajan, N. (2011). Fast methods for full-wave electromagnetic simulations of integrated circuit package modules. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/41059

Chicago Manual of Style (16th Edition):

Terizhandur Varadharajan, Narayanan. “Fast methods for full-wave electromagnetic simulations of integrated circuit package modules.” 2011. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/41059.

MLA Handbook (7th Edition):

Terizhandur Varadharajan, Narayanan. “Fast methods for full-wave electromagnetic simulations of integrated circuit package modules.” 2011. Web. 06 Aug 2020.

Vancouver:

Terizhandur Varadharajan N. Fast methods for full-wave electromagnetic simulations of integrated circuit package modules. [Internet] [Doctoral dissertation]. Georgia Tech; 2011. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/41059.

Council of Science Editors:

Terizhandur Varadharajan N. Fast methods for full-wave electromagnetic simulations of integrated circuit package modules. [Doctoral Dissertation]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/41059

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