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You searched for +publisher:"Georgia Tech" +contributor:("Hasler, Paul E."). Showing records 1 – 6 of 6 total matches.

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1. George, Suma. Simulink modeling and implementation of cmos dendrites using fpaa.

Degree: MS, Electrical and Computer Engineering, 2011, Georgia Tech

 In this thesis, I have studied CMOS dendrites, implemented them on a reconfigurable analog platform and modeled them using MATLAB Simulink. The dendrite model was… (more)

Subjects/Keywords: HMM classifier; Dendrites; Wordspotting; Simulink model; Reconfigurable analog; Dendrites; Metal oxide semiconductors, Complementary; Biological systems Computer simulation; Field programmable gate arrays

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APA (6th Edition):

George, S. (2011). Simulink modeling and implementation of cmos dendrites using fpaa. (Masters Thesis). Georgia Tech. Retrieved from http://hdl.handle.net/1853/44915

Chicago Manual of Style (16th Edition):

George, Suma. “Simulink modeling and implementation of cmos dendrites using fpaa.” 2011. Masters Thesis, Georgia Tech. Accessed December 06, 2019. http://hdl.handle.net/1853/44915.

MLA Handbook (7th Edition):

George, Suma. “Simulink modeling and implementation of cmos dendrites using fpaa.” 2011. Web. 06 Dec 2019.

Vancouver:

George S. Simulink modeling and implementation of cmos dendrites using fpaa. [Internet] [Masters thesis]. Georgia Tech; 2011. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1853/44915.

Council of Science Editors:

George S. Simulink modeling and implementation of cmos dendrites using fpaa. [Masters Thesis]. Georgia Tech; 2011. Available from: http://hdl.handle.net/1853/44915

2. Park, Jongmin. CMOS analog spectrum processing techniques for cognitive radio applications.

Degree: PhD, Electrical and Computer Engineering, 2009, Georgia Tech

 The objective of the research is to develop analog spectrum processing techniques for cognitive radio (CR) applications in CMOS technology. CR systems aim to use… (more)

Subjects/Keywords: Spectrum sensing; Energy detector; Testbed; Cognitive radio; Reconfigurable filter; Sensing threshold; Metal oxide semiconductors, Complementary; Cognitive radio networks

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APA (6th Edition):

Park, J. (2009). CMOS analog spectrum processing techniques for cognitive radio applications. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/37230

Chicago Manual of Style (16th Edition):

Park, Jongmin. “CMOS analog spectrum processing techniques for cognitive radio applications.” 2009. Doctoral Dissertation, Georgia Tech. Accessed December 06, 2019. http://hdl.handle.net/1853/37230.

MLA Handbook (7th Edition):

Park, Jongmin. “CMOS analog spectrum processing techniques for cognitive radio applications.” 2009. Web. 06 Dec 2019.

Vancouver:

Park J. CMOS analog spectrum processing techniques for cognitive radio applications. [Internet] [Doctoral dissertation]. Georgia Tech; 2009. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1853/37230.

Council of Science Editors:

Park J. CMOS analog spectrum processing techniques for cognitive radio applications. [Doctoral Dissertation]. Georgia Tech; 2009. Available from: http://hdl.handle.net/1853/37230

3. Gray, Jordan D. Large scale reconfigurable analog system design enabled through floating-gate transistors.

Degree: PhD, Electrical and Computer Engineering, 2009, Georgia Tech

 This work is concerned with the implementation and implication of non-volatile charge storage on VLSI system design. To that end, the floating-gate pFET (fg-pFET) is… (more)

Subjects/Keywords: Analog computation; Floating-gate transistor; Floating-gate programming; Reprogrammable analog; Reconfigurable analog; Linear integrated circuits; Digital-to-analog converters

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APA (6th Edition):

Gray, J. D. (2009). Large scale reconfigurable analog system design enabled through floating-gate transistors. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/34660

Chicago Manual of Style (16th Edition):

Gray, Jordan D. “Large scale reconfigurable analog system design enabled through floating-gate transistors.” 2009. Doctoral Dissertation, Georgia Tech. Accessed December 06, 2019. http://hdl.handle.net/1853/34660.

MLA Handbook (7th Edition):

Gray, Jordan D. “Large scale reconfigurable analog system design enabled through floating-gate transistors.” 2009. Web. 06 Dec 2019.

Vancouver:

Gray JD. Large scale reconfigurable analog system design enabled through floating-gate transistors. [Internet] [Doctoral dissertation]. Georgia Tech; 2009. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1853/34660.

Council of Science Editors:

Gray JD. Large scale reconfigurable analog system design enabled through floating-gate transistors. [Doctoral Dissertation]. Georgia Tech; 2009. Available from: http://hdl.handle.net/1853/34660

4. Huang, Walter. Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic.

Degree: PhD, Electrical and Computer Engineering, 2009, Georgia Tech

 When computational resources are limited, especially multipliers, distributed arithmetic (DA) is used in lieu of the typical multiplier-based filtering structures. However, DA is not well… (more)

Subjects/Keywords: Mixed-signal implementations; Reprogrammable; Distributed arithmetic; Adaptive filtering implementations; Adaptive filters; Signal processing Digital techniques Mathematics; Adaptive signal processing; Computer arithmetic and logic units; Computer algorithms

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APA (6th Edition):

Huang, W. (2009). Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/31653

Chicago Manual of Style (16th Edition):

Huang, Walter. “Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic.” 2009. Doctoral Dissertation, Georgia Tech. Accessed December 06, 2019. http://hdl.handle.net/1853/31653.

MLA Handbook (7th Edition):

Huang, Walter. “Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic.” 2009. Web. 06 Dec 2019.

Vancouver:

Huang W. Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic. [Internet] [Doctoral dissertation]. Georgia Tech; 2009. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1853/31653.

Council of Science Editors:

Huang W. Implementation of adaptive digital FIR and reprogrammable mixed-signal filters using distributed arithmetic. [Doctoral Dissertation]. Georgia Tech; 2009. Available from: http://hdl.handle.net/1853/31653


Georgia Tech

5. Terlemez, Bortecene. Oscillation Control in CMOS Phase-Locked Loops.

Degree: PhD, Electrical and Computer Engineering, 2004, Georgia Tech

 Recent advances in voltage-controlled oscillator (VCO) design and the trend of CMOS processing indicate that the oscillator control is quickly becoming one of the forefront… (more)

Subjects/Keywords: Charge pump; PLL; Phase-locked loops; Mixed-signal circuits; Voltage-controlled oscillators; Digital electronics; Digital-to-analog converters; Metal oxide semiconductors, Complementary

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APA (6th Edition):

Terlemez, B. (2004). Oscillation Control in CMOS Phase-Locked Loops. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/4841

Chicago Manual of Style (16th Edition):

Terlemez, Bortecene. “Oscillation Control in CMOS Phase-Locked Loops.” 2004. Doctoral Dissertation, Georgia Tech. Accessed December 06, 2019. http://hdl.handle.net/1853/4841.

MLA Handbook (7th Edition):

Terlemez, Bortecene. “Oscillation Control in CMOS Phase-Locked Loops.” 2004. Web. 06 Dec 2019.

Vancouver:

Terlemez B. Oscillation Control in CMOS Phase-Locked Loops. [Internet] [Doctoral dissertation]. Georgia Tech; 2004. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1853/4841.

Council of Science Editors:

Terlemez B. Oscillation Control in CMOS Phase-Locked Loops. [Doctoral Dissertation]. Georgia Tech; 2004. Available from: http://hdl.handle.net/1853/4841


Georgia Tech

6. Ravula, Surendra Kumar. A Multielectrode Microcompartment Platform for Signal Transduction in the Nervous System.

Degree: PhD, Electrical and Computer Engineering, 2006, Georgia Tech

 This dissertation presents the development of a multielectrode microcompartment platform for understanding signal transduction in the nervous system. The design and fabrication of the system… (more)

Subjects/Keywords: Neurons; Compartmented cultures; Multielectrode array; Nervous system Degeneration; Cellular signal transduction; Cell compartmentation; Axonal transport

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APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Ravula, S. K. (2006). A Multielectrode Microcompartment Platform for Signal Transduction in the Nervous System. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/11527

Chicago Manual of Style (16th Edition):

Ravula, Surendra Kumar. “A Multielectrode Microcompartment Platform for Signal Transduction in the Nervous System.” 2006. Doctoral Dissertation, Georgia Tech. Accessed December 06, 2019. http://hdl.handle.net/1853/11527.

MLA Handbook (7th Edition):

Ravula, Surendra Kumar. “A Multielectrode Microcompartment Platform for Signal Transduction in the Nervous System.” 2006. Web. 06 Dec 2019.

Vancouver:

Ravula SK. A Multielectrode Microcompartment Platform for Signal Transduction in the Nervous System. [Internet] [Doctoral dissertation]. Georgia Tech; 2006. [cited 2019 Dec 06]. Available from: http://hdl.handle.net/1853/11527.

Council of Science Editors:

Ravula SK. A Multielectrode Microcompartment Platform for Signal Transduction in the Nervous System. [Doctoral Dissertation]. Georgia Tech; 2006. Available from: http://hdl.handle.net/1853/11527

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