Advanced search options

Advanced Search Options 🞨

Browse by author name (“Author name starts with…”).

Find ETDs with:

in
/  
in
/  
in
/  
in

Written in Published in Earliest date Latest date

Sorted by

Results per page:

Sorted by: relevance · author · university · dateNew search

You searched for +publisher:"Georgia Tech" +contributor:("Dr. Paul Hasler"). Showing records 1 – 2 of 2 total matches.

Search Limiters

Last 2 Years | English Only

No search limiters apply to these results.

▼ Search Limiters


Georgia Tech

1. Twigg, Christopher M. Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing.

Degree: PhD, Electrical and Computer Engineering, 2006, Georgia Tech

Large-scale reconfigurable and programmable analog devices provide a new option for prototyping and synthesizing analog circuits for analog signal processing and beyond. Field-programmable analog arrays (FPAAs) built upon floating gate transistor technologies provide the analog reconfigurability and programmability density required for large-scale devices on a single integrated circuit (IC). A wide variety of synthesized circuits, such as OTA followers, band-pass filters, and capacitively coupled summation/difference circuits, were measured to demonstrate the flexibility of FPAAs. Three generations of devices were designed and tested to verify the viability of such floating gate based large-scale FPAAs. Various architectures and circuit topologies were also designed and tested to explore the trade-offs present in reconfigurable analog systems. In addition, large-scale FPAAs have been incorporated into class laboratory exercises, which provide students with a much broader range of circuit and IC design experiences than have been previously possible. By combining reconfigurable analog technologies with an equivalent large-scale digital device, such as a field-programmable gate array (FPGA), an extremely powerful and flexible mixed signal development system can be produced that will enable all of the benefits possible through cooperative analog/digital signal processing (CADSP). Advisors/Committee Members: Dr. Paul Hasler (Committee Chair), Aaron D. Lanterman (Committee Member), David V. Anderson (Committee Member), John B. Peatman (Committee Member).

Subjects/Keywords: fpaa reconfigurable programmable analog; Signal processing; Linear integrated circuits; Integrated circuits Very large scale integration; Field programmable gate arrays

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Twigg, C. M. (2006). Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/11601

Chicago Manual of Style (16th Edition):

Twigg, Christopher M. “Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing.” 2006. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/11601.

MLA Handbook (7th Edition):

Twigg, Christopher M. “Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing.” 2006. Web. 06 Aug 2020.

Vancouver:

Twigg CM. Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing. [Internet] [Doctoral dissertation]. Georgia Tech; 2006. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/11601.

Council of Science Editors:

Twigg CM. Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing. [Doctoral Dissertation]. Georgia Tech; 2006. Available from: http://hdl.handle.net/1853/11601


Georgia Tech

2. Srinivasan, Venkatesh. Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning.

Degree: PhD, Electrical and Computer Engineering, 2006, Georgia Tech

In this work, programmable analog techniques using floating-gate transistors have been developed to design precision analog circuits, low-power signal processing primitives and adaptive systems that learn on-chip. Traditional analog implementations lack programmability with the result that issues such as mismatch are corrected at the expense of area. Techniques have been proposed that use floating-gate transistors as an integral part of the circuit of interest to provide both programmability and the ability to correct for mismatch. Traditionally, signal processing has been performed in the digital domain with analog circuits handling the interface with the outside world. Such a partitioning of responsibilities is inefficient as signal processing involves repeated multiplication and addition operations that are both very power efficient in the analog domain. Using programmable analog techniques, fundamental signal processing primitives such as multipliers have been developed in a low-power fashion while preserving accuracy. This results in a paradigm shift in signal processing. A co-operative analog/digital signal processing framework is now possible such that the partitioning of tasks between the analog and digital domains is performed in a power efficient manner. Complex signal processing tasks such as adaptive filtering that learn the weight coefficients are implemented by exploiting the non-linearities inherent with floating-gate programming. The resulting floating-gate synapses are compact, low-power and offer the benefits of non-volatile weight storage. In summary, this research involves developing techniques for improving analog circuit performance and in developing power-efficient techniques for signal processing and on-chip learning. Advisors/Committee Members: Dr. Paul Hasler (Committee Chair), Dr. Alan Doolittle (Committee Member), Dr. David Anderson (Committee Member), Dr. Farrokh Ayazi (Committee Member), Dr. Mark Smith (Committee Member).

Subjects/Keywords: Programmable multipliers; Adaptive filters; Voltage references; Offset cancellation; Floating-gate transistors; Synapse; Neural networks (Computer science); Signal processing; Adaptive signal processing; Electronic analog computers Circuits; Gate array circuits

Record DetailsSimilar RecordsGoogle PlusoneFacebookTwitterCiteULikeMendeleyreddit

APA · Chicago · MLA · Vancouver · CSE | Export to Zotero / EndNote / Reference Manager

APA (6th Edition):

Srinivasan, V. (2006). Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning. (Doctoral Dissertation). Georgia Tech. Retrieved from http://hdl.handle.net/1853/11588

Chicago Manual of Style (16th Edition):

Srinivasan, Venkatesh. “Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning.” 2006. Doctoral Dissertation, Georgia Tech. Accessed August 06, 2020. http://hdl.handle.net/1853/11588.

MLA Handbook (7th Edition):

Srinivasan, Venkatesh. “Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning.” 2006. Web. 06 Aug 2020.

Vancouver:

Srinivasan V. Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning. [Internet] [Doctoral dissertation]. Georgia Tech; 2006. [cited 2020 Aug 06]. Available from: http://hdl.handle.net/1853/11588.

Council of Science Editors:

Srinivasan V. Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning. [Doctoral Dissertation]. Georgia Tech; 2006. Available from: http://hdl.handle.net/1853/11588

.