Full Record

New Search | Similar Records

Title 次世代パワー半導体デバイスの適用を考慮した高周波PWMインバータのひずみ・ノイズ低減に関する研究
Publication Date
Degree 博士(工学)
Discipline/Department 工学
Degree Level doctoral
University/Publisher Hokkaido University

Recently, inverters which are the key technology component in power electronics are widely used in many fields for energy saving. The switching speed of next-generation switching devices is expected to improve to 10-fold that of conventional Si IGBTs by using wide band gap semiconductors, which are SiC and GaN. These devices can improve PWM inverter carrier frequency which is difficult to operate conventional inverters. High-frequency PWM inverter can output high response waveform and be downsized. However, High-frequency PWM inverters will increase output voltage distortion and EMI(electromagnetic interference). Major reasons of these problems are dead-time and common-mode voltage. Dead-time is essential for inverters to prevent a short circuit induced by delaying the time of devices. Dead-time generates output voltage error which is proportional to the carriar frequency. Common-mode current, which caused by common-mode voltage, flows through the loop consisting of main circuit, ground-line and power source. Therefore, common-mode current injects into other devices connecting to same power source and causes conducted EMI. Furthermore, the high-frequency common-mode current flowing in the main circuit may cause radiated EMI. To solve above problems, this paper describes the following topics using 100 kHz PWM inverter. 1. A novel feedback-type dead-time compensation method with high-speed and high-response is proposed. The basic operation of proposed method is matching the pulse width of the output signal to that of input signal. If the short pulses, which are shorter than minimum output pulse of PWM inverter, are input, proposed method generates an output pulse after a few input pulses so that the average voltage of output signal equal to the input signal. Therefore, proposed method has no compensation limit theoretically. Experimental result using PWM signal shows that proposed method has low voltage distortion and high-voltage utilization factor characteristics. 2. To cancel the common-mode voltage which causes common-mode noise, active common-noise canceler(ACC) is applied to 100 kHz PWM inverter. An ACC for 100 kHz PWM inverter is designed and constructed for compare with an ACC for 10 kHz PWM inverter. Although the weight of a part of the ACC for 100 kHz PWM inverter is 16% of that of the ACC for 10 kHz PWM inverter, the prototype ACC cancels the common-mode voltage equivalent to the ACC for 10 kHz PWM inverter. A new circuit configuration of the ACC for 100 kHz SVPWM inverter is proposed. A new circuit configuration has small size because it operates without another power supply and large parts. Combination of above 2 methods, high-frequency PWM inverter reducing distortion and noise will be developed.


Subjects/Keywords 高周波 PWM インバータ; 次世代パワー半導体デバイ; デッドタイム補償; フィー ドバック型; コモンモード電圧; アクティブコモン ノイズキャンセラ; High-frequency PWM i nverters; next-generation power semiconductor devices; dead-time compensation; feedback-type; common-mode voltage; active common-noise canceler
Contributors 小笠原, 悟司; 北, 裕幸; 竹本, 真紹
Language ja
Country of Publication jp
Format application/pdf
Record ID handle:2115/58923
Repository hokkaido
Date Retrieved
Date Indexed 2020-01-06
Grantor 北海道大学

Sample Search Hits | Sample Images

…vc 23 Fig. 2-17. Loop flowing common-mode noise of AC induction motor drive system 2.3 EMI の低減法 EMIの原因であるコモンモード電圧、コモンモード電流を低減するため、様々な研究が 行 わ れ て い る 。 高 電 圧 ア プ リ ケ ー シ ョ ン の た め 提 案 さ れ た NPC(Neutral-Point-Clamped)PWMインバータは、HighとLowと0を…