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Title An Integrated Segmented Gate Driver with Adjustable Driving Capability for Efficiency Optimization
Publication Date
Date Available
Degree Level masters
University/Publisher University of Toronto

A novel gate driver design is proposed to improve the conversion efficiency of DC-DC converters. Conventional gate drivers provide a fixed gate driving strength (capability) over the entire output load range. However, it is demonstrated that to optimize the overall conversion efficiency, the driving capability of the gate driver circuit should be adjusted according to the loading condition. The proposed segmented gate driver consists of 8 parallel driver segments that can be turned on/off allowing the power consumption of the gate driver circuit to be dynamically adjusted. The post layout simulation results in high voltage TSMC 0.25µm CMOS process shows that up to 7% improvement in the efficiency can be achieved. Furthermore, in addition to efficiency improvements, a 60% reduction in the ringing and overshoot/undershoot was observed. An integrated segmented gate driver IC designed for AMSP35HV process was submitted for fabrication with the support from CMC.


Subjects/Keywords Gate Driver; Adjustable Driving Capability
Contributors Ng, Wai Tung; Electrical and Computer Engineering
Language en
Country of Publication ca
Record ID handle:1807/24526
Repository toronto-thes
Date Retrieved
Date Indexed 2017-12-19

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